void LPC17xx_40xx_SSP2_Require(
T_uezGPIOPortPin aPinSCK2,
T_uezGPIOPortPin aPinMISO2,
T_uezGPIOPortPin aPinMOSI2,
T_uezGPIOPortPin aPinSSEL2)
{
static const T_LPC17xx_40xx_IOCON_ConfigList sck2[] = {
{GPIO_P1_0, IOCON_D_DEFAULT(4)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList ssel2[] = {
{GPIO_P1_8, IOCON_D_DEFAULT(4)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList miso2[] = {
{GPIO_P1_4, IOCON_D_DEFAULT(4)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList mosi2[] = {
{GPIO_P1_1, IOCON_D_DEFAULT(4)},
};
HAL_DEVICE_REQUIRE_ONCE();
// Register SSP2
HALInterfaceRegister("SSP2",
(T_halInterface *)&SSP_LPC17xx_40xx_Port2_Interface, 0, 0);
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSCK2, sck2, ARRAY_COUNT(sck2));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSSEL2, ssel2, ARRAY_COUNT(ssel2));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMISO2, miso2, ARRAY_COUNT(miso2));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMOSI2, mosi2, ARRAY_COUNT(mosi2));
LPC17xx_40xxPowerOn(1<<20);
// Setup interrupt, but do not enable
InterruptRegister(SSP2_IRQn, ISSP2IRQ, INTERRUPT_PRIORITY_HIGH, "SSP2");
InterruptDisable(SSP2_IRQn);
}
/*---------------------------------------------------------------------------*
* Routine: LPC17xx_40xx_Serial_Configure
*---------------------------------------------------------------------------*
* Description:
* Link the serial port to a pair of callback routines and an
* associated callback workspace. The callbacks are called when
* a byte is received and when the transmit buffer becomes empty.
* Inputs:
* void *aWorkspace -- Serial port workspace
* void *aCallbackWorkspace -- Callback's workspace
* HAL_Serial_Callback_Received_Byte aReceivedByteCallback
* -- Callback routine for received bytes
* HAL_Serial_Callback_Transmit_Empty aTransmitEmptyCallback
* -- Callback routine for transmit empty
* Outputs:
* T_uezError -- Error code
*---------------------------------------------------------------------------*/
T_uezError LPC17xx_40xx_Serial_Configure(
void *aWorkspace,
void *aCallbackWorkspace,
HAL_Serial_Callback_Received_Byte aReceivedByteCallback,
HAL_Serial_Callback_Transmit_Empty aTransmitEmptyCallback)
{
T_Serial_LPC17xx_40xx_Workspace *p = (T_Serial_LPC17xx_40xx_Workspace *)aWorkspace;
const T_Serial_LPC17xx_40xx_SerialInfo *p_info = p->iInfo;
TUInt32 divider;
InterruptDisable(p->iInfo->iInterruptChannel);
// Ensure power is on to the part
LPC17xx_40xxPowerOn(1UL << p->iInfo->iPowerBitIndex);
LPC17xx_40xxPowerOn(1UL << p->iInfo->iPowerBitIndex);
p->iReceivedByteFunc = aReceivedByteCallback;
p->iTransmitEmptyFunc = aTransmitEmptyCallback;
p->iCallbackWorkspace = aCallbackWorkspace;
divider = BAUD_DIVIDER(SERIAL_PORTS_DEFAULT_BAUD);
// Set the FIFO enable bit in the FCR register. This bit must be set for
// proper UART operation.
p_info->iUART->reg08.FCR = 7; // FCRFE|RFR|TFR
// Set baudrate
p_info->iUART->LCR |= 0x80;
p_info->iUART->reg00.DLL = divider & 0x00ff;
p_info->iUART->reg04.DLM = (divider >> 8) & 0x00ff;
p_info->iUART->LCR &= ~0x80;
// Set default mode (8 bits, 1 stop bit, no parity)
p_info->iUART->LCR = 0x03;
//Enable UART0 interrupts
p_info->iUART->reg04.IER = 0x03; // Interrupts and TX and RX
InterruptRegister(p_info->iInterruptChannel, p_info->iISR,
p_info->iPriority, p->iHAL->iInterface.iName);
//TBD: For now, leave serial port deactivated
// InterruptEnable(p_info->iInterruptChannel);
return UEZ_ERROR_NONE;
}
void LPC17xx_40xx_SSP1_Require(
T_uezGPIOPortPin aPinSCK1,
T_uezGPIOPortPin aPinMISO1,
T_uezGPIOPortPin aPinMOSI1,
T_uezGPIOPortPin aPinSSEL1)
{
static const T_LPC17xx_40xx_IOCON_ConfigList sck1[] = {
{GPIO_P0_7, IOCON_W_DEFAULT(2)},
{GPIO_P1_19, IOCON_D_DEFAULT(5)},
{GPIO_P1_31, IOCON_A_DEFAULT(2)},
{GPIO_P4_20, IOCON_D_DEFAULT(3)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList ssel1[] = {
{GPIO_P0_6, IOCON_D_DEFAULT(2)},
{GPIO_P0_14, IOCON_D_DEFAULT(2)},
{GPIO_P4_21, IOCON_D_DEFAULT(3)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList miso1[] = {
{GPIO_P0_8, IOCON_W_DEFAULT(2)},
{GPIO_P0_12, IOCON_A_DEFAULT(2)},
{GPIO_P1_18, IOCON_D_DEFAULT(5)},
{GPIO_P4_22, IOCON_D_DEFAULT(3)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList mosi1[] = {
{GPIO_P0_9, IOCON_W_DEFAULT(2)},
{GPIO_P0_13, IOCON_A_DEFAULT(2)},
{GPIO_P1_22, IOCON_D_DEFAULT(5)},
{GPIO_P4_23, IOCON_D_DEFAULT(3)},
};
HAL_DEVICE_REQUIRE_ONCE();
// Register SSP1
HALInterfaceRegister("SSP1",
(T_halInterface *)&SSP_LPC17xx_40xx_Port1_Interface, 0, 0);
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSCK1, sck1, ARRAY_COUNT(sck1));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSSEL1, ssel1, ARRAY_COUNT(ssel1));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMISO1, miso1, ARRAY_COUNT(miso1));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMOSI1, mosi1, ARRAY_COUNT(mosi1));
LPC17xx_40xxPowerOn(1<<10);
// Setup interrupt, but do not enable
InterruptRegister(SSP1_IRQn, ISSP1IRQ, INTERRUPT_PRIORITY_HIGH, "SSP1");
InterruptDisable(SSP1_IRQn);
}
/*---------------------------------------------------------------------------*
* Requirement routines:
*---------------------------------------------------------------------------*/
void LPC17xx_40xx_SSP0_Require(
T_uezGPIOPortPin aPinSCK0,
T_uezGPIOPortPin aPinMISO0,
T_uezGPIOPortPin aPinMOSI0,
T_uezGPIOPortPin aPinSSEL0)
{
static const T_LPC17xx_40xx_IOCON_ConfigList sck0[] = {
{GPIO_P0_15, IOCON_D_DEFAULT(2)},
{GPIO_P1_20, IOCON_D_DEFAULT(5)},
{GPIO_P2_22, IOCON_D_DEFAULT(2)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList ssel0[] = {
{GPIO_P0_16, IOCON_D_DEFAULT(2)},
{GPIO_P1_21, IOCON_D_DEFAULT(3)},
{GPIO_P1_28, IOCON_D_DEFAULT(5)},
{GPIO_P2_23, IOCON_D_DEFAULT(2)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList miso0[] = {
{GPIO_P0_17, IOCON_D_DEFAULT(2)},
{GPIO_P1_23, IOCON_D_DEFAULT(5)},
{GPIO_P2_26, IOCON_D_DEFAULT(2)},
};
static const T_LPC17xx_40xx_IOCON_ConfigList mosi0[] = {
{GPIO_P0_18, IOCON_D_DEFAULT(2)},
{GPIO_P1_24, IOCON_D_DEFAULT(5)},
{GPIO_P2_27, IOCON_D_DEFAULT(2)},
};
HAL_DEVICE_REQUIRE_ONCE();
// Register SSP0
HALInterfaceRegister("SSP0",
(T_halInterface *)&SSP_LPC17xx_40xx_Port0_Interface, 0, 0);
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSCK0, sck0, ARRAY_COUNT(sck0));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinSSEL0, ssel0, ARRAY_COUNT(ssel0));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMISO0, miso0, ARRAY_COUNT(miso0));
LPC17xx_40xx_IOCON_ConfigPinOrNone(aPinMOSI0, mosi0, ARRAY_COUNT(mosi0));
LPC17xx_40xxPowerOn(1<<21);
// Setup interrupt, but do not enable
InterruptRegister(SSP0_IRQn, ISSP0IRQ, INTERRUPT_PRIORITY_HIGH, "SSP0");
InterruptDisable(SSP0_IRQn);
}
/*---------------------------------------------------------------------------*
* Routine: LPC17xx_40xx_Timer_SetMatchRegisterFunctions
*---------------------------------------------------------------------------*
* Description:
* Setup one of several timer's match registers and what to do on
* a match.
* Inputs:
* void *aWorkspace -- Timer's workspace
* TUInt8 aMatchRegister -- Index to match register (0-3)
* T_Timer_MatchPointFunction aFunctions -- List of functions to perform
* when the timer reaches this match point.
* TUInt32 aMatchPoint -- Point at which functions trigger
* Outputs:
* T_uezError -- Returns UEZ_ERROR_ILLEGAL_PARAMETER if match register
* does not exist. Returns UEZ_ERROR_ILLEGAL_OPERATION if a
* function in aFunctions is not supported. Otherwise, returns
* UEZ_ERROR_NONE.
*---------------------------------------------------------------------------*/
static T_uezError LPC17xx_40xx_Timer_SetMatchRegisterFunctions(
void *aWorkspace,
TUInt8 aMatchRegister,
T_Timer_MatchPointFunction aFunctions,
TUInt32 aMatchPoint)
{
T_LPC17xx_40xx_Timer_Workspace *p = (T_LPC17xx_40xx_Timer_Workspace *)aWorkspace;
T_LPC17xx_40xx_Timer_Registers *r = p->iReg;
TUInt32 aFlags = 0;
const T_LPC17xx_40xx_Timer_Info *p_info = p->iInfo;
// Determine if legal match register
if (aMatchRegister >= 4)
return UEZ_ERROR_ILLEGAL_PARAMETER;
//Make sure Power to the Timer is turned on
LPC17xx_40xxPowerOn(1UL << p_info->iPCONBitIndex);
if (aFunctions & ~(TIMER_MATCH_POINT_FUNC_INTERRUPT
| TIMER_MATCH_POINT_FUNC_RESET | TIMER_MATCH_POINT_FUNC_STOP))
return UEZ_ERROR_ILLEGAL_OPERATION;
// Determine what the combined flags are
if (aFunctions & TIMER_MATCH_POINT_FUNC_INTERRUPT)
aFlags |= (1 << 0);
if (aFunctions & TIMER_MATCH_POINT_FUNC_RESET)
aFlags |= (1 << 1);
if (aFunctions & TIMER_MATCH_POINT_FUNC_STOP)
aFlags |= (1 << 2);
// Set the actions on the match
r->iMCR &= ~(7 << (aMatchRegister * 3));
r->iMCR |= (aFlags << (aMatchRegister * 3));
// Change the match register
r->iMR[aMatchRegister] = aMatchPoint / (PROCESSOR_OSCILLATOR_FREQUENCY
/ PCLK_FREQUENCY);
return UEZ_ERROR_NONE;
}
/*---------------------------------------------------------------------------*
* Routine: LPC17xx_40xx_Timer_SetMatchRegister
*---------------------------------------------------------------------------*
* Description:
* Setup one of several timer's match registers and what do on
* a match.
* Outputs:
* void *aWorkspace -- Timer's workspace
* TUInt8 aMatchRegister -- Index to match register (0-3)
* TUInt32 aMatchPoint -- Number of CPU cycles until match
* TBool aDoInterrupt -- ETrue if want an interrupt, else EFalse
* (NOTE: Interrupts currently not
* implemented)
* TBool aDoCounterReset -- ETrue if counter for this Timer is
* to be reset on match.
* TBool aDoStop -- ETrue if counter is to be stopped
* when match occurs.
*---------------------------------------------------------------------------*/
static T_uezError LPC17xx_40xx_Timer_SetMatchRegister(
void *aWorkspace,
TUInt8 aMatchRegister,
TUInt32 aMatchPoint,
TBool aDoInterrupt,
TBool aDoCounterReset,
TBool aDoStop)
{
T_LPC17xx_40xx_Timer_Workspace *p = (T_LPC17xx_40xx_Timer_Workspace *)aWorkspace;
T_LPC17xx_40xx_Timer_Registers *r = p->iReg;
const T_LPC17xx_40xx_Timer_Info *p_info = p->iInfo;
TUInt32 aFlags = 0;
//Make sure Power to the Timer is turned on
LPC17xx_40xxPowerOn(1 << p_info->iPCONBitIndex);
// Determine if legal match register
if (aMatchRegister >= 4)
return UEZ_ERROR_ILLEGAL_PARAMETER;
// Determine what the combined flags are
if (aDoInterrupt)
aFlags |= (1 << 0);
if (aDoCounterReset)
aFlags |= (1 << 1);
if (aDoStop)
aFlags |= (1 << 2);
// Set the actions on the match
r->iMCR &= ~(7 << (aMatchRegister * 3));
r->iMCR |= (aFlags << (aMatchRegister * 3));
// Change the match register
r->iMR[aMatchRegister] = aMatchPoint / (PROCESSOR_OSCILLATOR_FREQUENCY
/ PCLK_FREQUENCY);
return UEZ_ERROR_NONE;
}
void CANConfigure ( void )
{
#if (UEZ_PROCESSOR==NXP_LPC2478)
UEZGPIOSetMux(GPIO_P0_0, 1);
UEZGPIOSetMux(GPIO_P0_1, 1);
// unsigned int n = ((Fcclk/4)/125000)-1;
PCONP |= PCONP_PCAN1;
PCLKSEL0 |= (2<<PCLKSEL0_PCLK_CAN1_BIT)|(2<<PCLKSEL0_PCLK_ACF_BIT);
C1MOD = 0x00000001; /* Set CAN controller into reset */
C1BTR = 0x001C0011; /* Set bit timing to 125k -- old value from 2119 0x1D */
C1IER = 0x00000000; /* Disable the Receive interrupt */
AFMR = 0x00000002; /* Bypass acceptance filters to receive all CAN traffic */
C1TFI1 = 0x00080000; /* Set DLC to transmit 8 bytes */
C1TID1 = 0x00000555; /* Set CAN ID to '555' */
#if 1
C1MOD = 0x00000000; /* Release CAN controller */
#endif
#endif
#if (UEZ_PROCESSOR==NXP_LPC1788)
UEZGPIOSetMux(GPIO_P0_0, 1);
UEZGPIOSetMux(GPIO_P0_1, 1);
// unsigned int n = ((Fcclk/4)/125000)-1;
//PCONP |= PCONP_PCAN1;
LPC17xx_40xxPowerOn(1<<13); // CAN1 power on
//PCLKSEL0 |= (2<<PCLKSEL0_PCLK_CAN1_BIT)|(2<<PCLKSEL0_PCLK_ACF_BIT);
LPC_CAN1->MOD = 0x00000001; /* Set CAN controller into reset */
LPC_CAN1->BTR = 0x001C0000|(30-1); /* Set bit timing to 125k -- old value from 2119 0x1D */
LPC_CAN1->IER = 0x00000000; /* Disable the Receive interrupt */
LPC_CANAF->AFMR = 0x00000002; /* Bypass acceptance filters to receive all CAN traffic */
LPC_CAN1->TFI1 = 0x00080000; /* Set DLC to transmit 8 bytes */
LPC_CAN1->TID1 = 0x00000555; /* Set CAN ID to '555' */
#if 1
LPC_CAN1->MOD = 0x00000000; /* Release CAN controller */
#endif
#endif
G_canConfigured = 1;
}
/*---------------------------------------------------------------------------*
* Routine: Host_Init
*---------------------------------------------------------------------------*
* Description:
* Initializes the LPC17xx_40xx host controller with buffers
* Inputs:
* void *aWorkspace -- USB Host controller workspace
*---------------------------------------------------------------------------*/
static T_uezError Host_Init(void *aWorkspace)
{
extern void USBSharedInterruptSetup(void);
T_LPC17xx_40xx_USBHost_Workspace *p = (T_LPC17xx_40xx_USBHost_Workspace *)aWorkspace;
// Setup memory from start
p->iAllocBase = G_usbHostMemory;
p->iAllocRemaining = sizeof(G_usbHostMemory);
// Ensure power to the USB is on
LPC17xx_40xxPowerOn(1UL<<31);
// Enable the USB interrupt source
if (p->iPortIndex == USB_HOST_PORT_INDEX_PORT_A) {
LPC_USB->OTGClkCtrl = 0x0000001B;
while ((LPC_USB->OTGClkSt & 0x0000001B) != 0x1B) {
;
}
LPC_USB->OTGStCtrl = 0x00000003;
} else if (p->iPortIndex == USB_HOST_PORT_INDEX_PORT_B) {
LPC_USB->OTGClkCtrl = 0x00000001;
while ((LPC_USB->OTGClkSt & 0x00000001) == 0) {
;
}
}
// Allocate standard buffers
Hcca = IAllocBuffer(p, sizeof(HCCA));
TDHead = IAllocBuffer(p, sizeof(HCTD));
TDTail = IAllocBuffer(p, sizeof(HCTD));
EDCtrl = IAllocBuffer(p, sizeof(HCED));
EDBulkIn = IAllocBuffer(p, sizeof(HCED));
EDBulkOut = IAllocBuffer(p, sizeof(HCED));
TDBuffer = IAllocBuffer(p, 128);
// And then initialize those buffers
IHost_EDInit(EDCtrl);
IHost_EDInit(EDBulkIn);
IHost_EDInit(EDBulkOut);
IHost_TDInit(TDHead);
IHost_TDInit(TDTail);
IHost_HCCAInit(Hcca);
// About to reset, first delay
Host_DelayMS(50);
LPC_USB->HcControl = 0;
LPC_USB->HcControlHeadED = 0;
LPC_USB->HcBulkHeadED = 0;
// Now do the software reset and go back to the largest packet size
LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
// Put HC in operational state and set global power
LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
LPC_USB->HcHCCA = (TUInt32)Hcca;
// Remember the workspace for the interrupt routine
// This also indirectly flags the interrupt routine by letting
// the system know that we can now process interrupts.
if (p->iPortIndex == USB_HOST_PORT_INDEX_PORT_A) {
G_usbHostWorkspacePortA = p;
} else {
G_usbHostWorkspacePortB = p;
}
// Enable these interrupts
LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
OR_INTR_ENABLE_WDH |
OR_INTR_ENABLE_RHSC;
p->iState = USB_HOST_STATE_CLEAR;
USBSharedInterruptSetup();
// Remember the reset condition
p->iResetAllocBase = p->iAllocBase;
p->iResetAllocRemaining = p->iAllocRemaining;
return UEZ_ERROR_NONE;
}
