/******************************************************************************
** Main Function main()
******************************************************************************/
int main (void)
{
uint32_t i, portnum = PORT_NUM;
/* SystemClockUpdate() updates the SystemFrequency variable */
SystemClockUpdate();
if ( portnum == 0 )
SSP0Init(); /* initialize SSP port */
else if ( portnum == 1 )
SSP1Init();
for ( i = 0; i < SSP_BUFSIZE; i++ )
{
src_addr[i] = (uint8_t)i;
dest_addr[i] = 0;
}
#if TX_RX_ONLY
/* For the inter-board communication, one board is set as
master transmit, the other is set to slave receive. */
#if SSP_SLAVE
/* Slave receive */
SSPReceive( portnum, (uint8_t *)dest_addr, SSP_BUFSIZE );
for ( i = 0; i < SSP_BUFSIZE; i++ )
{
if ( src_addr[i] != dest_addr[i] )
{
while ( 1 ); /* Verification failure, fatal error */
}
}
#else
/* Master transmit */
SSPSend( portnum, (uint8_t *)src_addr, SSP_BUFSIZE);
#endif
#else
/* TX_RX_ONLY=0, it's either an internal loopback test
within SSP peripheral or communicate with a serial EEPROM. */
#if LOOPBACK_MODE
LoopbackTest( portnum, LOCATION_NUM );
#else
SEEPROMTest( portnum, LOCATION_NUM );
#endif /* endif NOT LOOPBACK_MODE */
#endif /* endif NOT TX_RX_ONLY */
/* Never exit from main(), for easy debugging. */
while ( 1 );
return 0;
}
/**
*
* Runs a self-test on the driver/device. The self-test is destructive in that
* a reset of the device is performed in order to check the reset values of
* the registers and to get the device into a known state. A simple loopback
* test is also performed to verify that transmit and receive are working
* properly. The device is changed to master mode for the loopback test, since
* only a master can initiate a data transfer.
*
* Upon successful return from the self-test, the device is reset.
*
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
*
* @return
* - XST_SUCCESS if successful.
* - XST_REGISTER_ERROR indicates a register did not read or write
* correctly.
* - XST_LOOPBACK_ERROR if a loopback error occurred.
*
* @note None.
*
******************************************************************************/
int XSpi_SelfTest(XSpi *InstancePtr)
{
int Result;
u32 Register;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/* Return Success if XIP Mode */
if((InstancePtr->XipMode) == 1) {
return XST_SUCCESS;
}
/*
* Reset the SPI device to leave it in a known good state.
*/
XSpi_Reset(InstancePtr);
if(InstancePtr->XipMode)
{
Register = XSpi_GetControlReg(InstancePtr);
if (Register != XSP_CR_RESET_STATE) {
return XST_REGISTER_ERROR;
}
Register = XSpi_GetStatusReg(InstancePtr);
if ((Register & XSP_SR_RESET_STATE) != XSP_SR_RESET_STATE) {
return XST_REGISTER_ERROR;
}
}
/*
* All the SPI registers should be in their default state right now.
*/
Register = XSpi_GetControlReg(InstancePtr);
if (Register != XSP_CR_RESET_STATE) {
return XST_REGISTER_ERROR;
}
Register = XSpi_GetStatusReg(InstancePtr);
if ((Register & XSP_SR_RESET_STATE) != XSP_SR_RESET_STATE) {
return XST_REGISTER_ERROR;
}
/*
* Each supported slave select bit should be set to 1.
*/
Register = XSpi_GetSlaveSelectReg(InstancePtr);
if (Register != InstancePtr->SlaveSelectMask) {
return XST_REGISTER_ERROR;
}
/*
* If configured with FIFOs, the occupancy values should be 0.
*/
if (InstancePtr->HasFifos) {
Register = XSpi_ReadReg(InstancePtr->BaseAddr,
XSP_TFO_OFFSET);
if (Register != 0) {
return XST_REGISTER_ERROR;
}
Register = XSpi_ReadReg(InstancePtr->BaseAddr,
XSP_RFO_OFFSET);
if (Register != 0) {
return XST_REGISTER_ERROR;
}
}
/*
* Run loopback test only in case of standard SPI mode.
*/
if (InstancePtr->SpiMode != XSP_STANDARD_MODE) {
return XST_SUCCESS;
}
/*
* Run an internal loopback test on the SPI.
*/
Result = LoopbackTest(InstancePtr);
if (Result != XST_SUCCESS) {
return Result;
}
/*
* Reset the SPI device to leave it in a known good state.
*/
XSpi_Reset(InstancePtr);
return XST_SUCCESS;
}