/**
* The main initialisation method to setup pins and interrupts
*/
void DWire::_initMain( void ) {
// Initialise the receiver buffer and related variables
rxReadIndex = 0;
rxReadLength = 0;
requestDone = false;
sendStop = true;
switch (module) {
#ifdef USING_EUSCI_B0
case EUSCI_B0_BASE:
pTxBuffer = EUSCIB0_txBuffer;
pTxBufferIndex = &EUSCIB0_txBufferIndex;
pTxBufferSize = &EUSCIB0_txBufferSize;
pRxBuffer = EUSCIB0_rxBuffer;
pRxBufferIndex = &EUSCIB0_rxBufferIndex;
pRxBufferSize = &EUSCIB0_rxBufferSize;
modulePort = EUSCI_B0_PORT;
modulePins = EUSCI_B0_PINS;
intModule = INT_EUSCIB0;
MAP_I2C_registerInterrupt(module, EUSCIB0_IRQHandler);
break;
#endif
#ifdef USING_EUSCI_B1
case EUSCI_B1_BASE:
pTxBuffer = EUSCIB1_txBuffer;
pTxBufferIndex = &EUSCIB1_txBufferIndex;
pTxBufferSize = &EUSCIB1_txBufferSize;
pRxBuffer = EUSCIB1_rxBuffer;
pRxBufferIndex = &EUSCIB1_rxBufferIndex;
pRxBufferSize = &EUSCIB1_rxBufferSize;
modulePort = EUSCI_B1_PORT;
modulePins = EUSCI_B1_PINS;
intModule = INT_EUSCIB1;
MAP_I2C_registerInterrupt(module, EUSCIB1_IRQHandler);
break;
#endif
#ifdef USING_EUSCI_B2
case EUSCI_B2_BASE:
pTxBuffer = EUSCIB2_txBuffer;
pTxBufferIndex = &EUSCIB2_txBufferIndex;
pTxBufferSize = &EUSCIB2_txBufferSize;
pRxBuffer = EUSCIB2_rxBuffer;
pRxBufferIndex = &EUSCIB2_rxBufferIndex;
pRxBufferSize = &EUSCIB2_rxBufferSize;
modulePort = EUSCI_B2_PORT;
modulePins = EUSCI_B2_PINS;
intModule = INT_EUSCIB2;
MAP_I2C_registerInterrupt(module, EUSCIB2_IRQHandler);
break;
#endif
#ifdef USING_EUSCI_B3
case EUSCI_B3_BASE:
pTxBuffer = EUSCIB3_txBuffer;
pTxBufferIndex = &EUSCIB3_txBufferIndex;
pTxBufferSize = &EUSCIB3_txBufferSize;
pRxBuffer = EUSCIB3_rxBuffer;
pRxBufferIndex = &EUSCIB3_rxBufferIndex;
pRxBufferSize = &EUSCIB3_rxBufferSize;
modulePort = EUSCI_B3_PORT;
modulePins = EUSCI_B3_PINS;
intModule = INT_EUSCIB3;
MAP_I2C_registerInterrupt(module, EUSCIB3_IRQHandler);
break;
#endif
default:
return;
}
// Register this instance in the 'moduleMap'
registerModule(this);
}
/**
* The main initialisation method to setup pins and interrupts
*/
void DWire::_initMain( void )
{
requestDone = false;
sendStop = true;
switch (module)
{
case EUSCI_B0_BASE:
DWire_instances[0] = this;
pTxBuffer = EUSCIB0_txBuffer;
pTxBufferIndex = &EUSCIB0_txBufferIndex;
pTxBufferSize = &EUSCIB0_txBufferSize;
pRxBuffer = EUSCIB0_rxBuffer;
pRxBufferIndex = &EUSCIB0_rxBufferIndex;
pRxBufferSize = &EUSCIB0_rxBufferSize;
modulePort = EUSCI_B0_PORT;
modulePins = EUSCI_B0_PINS;
moduleSCL = EUSCI_B0_SCL;
intModule = INT_EUSCIB0;
MAP_I2C_registerInterrupt(module, EUSCIB0_IRQHandler);
break;
case EUSCI_B1_BASE:
DWire_instances[1] = this;
pTxBuffer = EUSCIB1_txBuffer;
pTxBufferIndex = &EUSCIB1_txBufferIndex;
pTxBufferSize = &EUSCIB1_txBufferSize;
pRxBuffer = EUSCIB1_rxBuffer;
pRxBufferIndex = &EUSCIB1_rxBufferIndex;
pRxBufferSize = &EUSCIB1_rxBufferSize;
modulePort = EUSCI_B1_PORT;
modulePins = EUSCI_B1_PINS;
moduleSCL = EUSCI_B1_SCL;
intModule = INT_EUSCIB1;
MAP_I2C_registerInterrupt( module, EUSCIB1_IRQHandler );
break;
case EUSCI_B2_BASE:
DWire_instances[2] = this;
pTxBuffer = EUSCIB2_txBuffer;
pTxBufferIndex = &EUSCIB2_txBufferIndex;
pTxBufferSize = &EUSCIB2_txBufferSize;
pRxBuffer = EUSCIB2_rxBuffer;
pRxBufferIndex = &EUSCIB2_rxBufferIndex;
pRxBufferSize = &EUSCIB2_rxBufferSize;
modulePort = EUSCI_B2_PORT;
modulePins = EUSCI_B2_PINS;
moduleSCL = EUSCI_B2_SCL;
intModule = INT_EUSCIB2;
MAP_I2C_registerInterrupt(module, EUSCIB2_IRQHandler);
break;
case EUSCI_B3_BASE:
DWire_instances[3] = this;
pTxBuffer = EUSCIB3_txBuffer;
pTxBufferIndex = &EUSCIB3_txBufferIndex;
pTxBufferSize = &EUSCIB3_txBufferSize;
pRxBuffer = EUSCIB3_rxBuffer;
pRxBufferIndex = &EUSCIB3_rxBufferIndex;
pRxBufferSize = &EUSCIB3_rxBufferSize;
modulePort = EUSCI_B3_PORT; ;
modulePins = EUSCI_B3_PINS;
moduleSCL = EUSCI_B3_SCL;
intModule = INT_EUSCIB3;
MAP_I2C_registerInterrupt(module, EUSCIB3_IRQHandler);
break;
default:
return;
}
// Initialise the receiver buffer and related variables
*pTxBufferIndex = 0;
*pRxBufferIndex = 0;
*pTxBufferSize = 0;
*pRxBufferSize = 0;
}
