int clock_sys_init(ps_io_ops_t* io_ops, clock_sys_t* clk_sys){ struct clock_sys_regs* d = &clk_sys_regs; MAP_IF_NULL(io_ops, APQ8064_CLK_CTL0, d->block0); MAP_IF_NULL(io_ops, APQ8064_CLK_CTL1, d->block1); MAP_IF_NULL(io_ops, APQ8064_CLK_CTL2, d->block2); MAP_IF_NULL(io_ops, APQ8064_CLK_CTL3, d->block3); clk_sys->priv = d; return 0; }
int clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) { MAP_IF_NULL(o, EXYNOS5_CMU_CPU, _clk_regs[CLKREGS_CPU]); MAP_IF_NULL(o, EXYNOS5_CMU_CORE, _clk_regs[CLKREGS_CORE]); MAP_IF_NULL(o, EXYNOS5_CMU_ACP, _clk_regs[CLKREGS_ACP]); MAP_IF_NULL(o, EXYNOS5_CMU_ISP, _clk_regs[CLKREGS_ISP]); MAP_IF_NULL(o, EXYNOS5_CMU_TOP, _clk_regs[CLKREGS_TOP]); MAP_IF_NULL(o, EXYNOS5_CMU_LEX, _clk_regs[CLKREGS_LEX]); MAP_IF_NULL(o, EXYNOS5_CMU_R0X, _clk_regs[CLKREGS_R0X]); MAP_IF_NULL(o, EXYNOS5_CMU_R1X, _clk_regs[CLKREGS_R1X]); MAP_IF_NULL(o, EXYNOS5_CMU_CDREX, _clk_regs[CLKREGS_CDREX]); return clock_sys_common_init(clock_sys); }