/*
* ======== SPICC3200DMA_initHw ========
*/
static void SPICC3200DMA_initHw(SPI_Handle handle)
{
SPICC3200DMA_Object *object = handle->object;
SPICC3200DMA_HWAttrs const *hwAttrs = handle->hwAttrs;
/* Configure the SPI peripheral */
MAP_SPICSDisable(hwAttrs->baseAddr);
MAP_SPIDisable(hwAttrs->baseAddr);
MAP_SPIReset(hwAttrs->baseAddr);
/*
* To support 4-32 bit lengths, object->dataSize must be formatted to meet
* hardware requirement.
*/
MAP_SPIConfigSetExpClk(hwAttrs->baseAddr,
MAP_PRCMPeripheralClockGet(hwAttrs->spiPRCM),
object->bitRate,
mode[object->spiMode],
frameFormat[object->frameFormat],
(hwAttrs->csControl | hwAttrs->pinMode |
hwAttrs->turboMode | hwAttrs->csPolarity |
((object->dataSize - 1) << 7)));
/* Enable FIFOs, DMA, & interrupts */
MAP_SPIFIFOEnable(hwAttrs->baseAddr, SPI_RX_FIFO | SPI_TX_FIFO);
MAP_SPIDmaEnable(hwAttrs->baseAddr, SPI_RX_DMA | SPI_TX_DMA);
MAP_SPIFIFOLevelSet(hwAttrs->baseAddr, object->txFifoTrigger,
object->rxFifoTrigger);
}
int main() {
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
cc3200_leds_init();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFODisable(CONSOLE_UART);
setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0);
VStartSimpleLinkSpawnTask(8);
osi_TaskCreate(v7_task, (const signed char *) "v7", V7_STACK_SIZE + 256, NULL,
3, NULL);
osi_TaskCreate(blinkenlights_task, (const signed char *) "blink", 256, NULL,
9, NULL);
osi_start();
return 0;
}
static void ReadSPI(unsigned char* pIn,unsigned char* pOut,unsigned long ulLen)
{
// Reset SPI
MAP_SPIReset(GSPI_BASE);
// Configure SPI interface
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
20000000,SPI_MODE_MASTER,SPI_SUB_MODE_3,
(SPI_HW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_ON |
SPI_CS_ACTIVEHIGH |
SPI_WL_8));
// Enable SPI for communication
MAP_SPIEnable(GSPI_BASE);
READ_FROM_SPI;
unsigned char tmpbuf[2];
MAP_SPITransfer(GSPI_BASE,
pOut,
pIn,
ulLen,
SPI_CS_ENABLE|SPI_CS_DISABLE);
MAP_SPIDisable(GSPI_BASE);
}
int main()
{
interrupt_count = 0;
transfer_count = 0;
tx_count = 0;
rx_count = 0;
uint32_t output_count = 0;
uint32_t sum = 0;
init();
// initialize buffers with some known value
memset(tx_buffer,0x55,sizeof(tx_buffer));
memset(rx_buffer,0x22,sizeof(rx_buffer));
// configure SPI
MAP_SPIReset(GSPI_BASE);
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
SPI_IF_BIT_RATE,SPI_MODE_SLAVE,SPI_SUB_MODE_0,
(SPI_HW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVEHIGH |
SPI_WL_8));
MAP_SPIIntRegister(GSPI_BASE,interrupt_handler);
MAP_SPIIntEnable(GSPI_BASE,SPI_INT_RX_FULL|SPI_INT_TX_EMPTY);
MAP_SPIEnable(GSPI_BASE);
Message("Enabled SPI Interface in Slave Mode!\n\r");
Message("Starting while\n\r");
while(1)
{
memcpy(tx_buffer,rx_buffer,TR_BUFF_SIZE);
// here we could also change the tx_buffer
// e.g. tx_buffer[TR_BUFF_SIZE - 1] = 18;
sum = 0;
if(output_count < transfer_count)
{
for(int i = 0; i < TR_BUFF_SIZE; i++)
{
sum += rx_buffer[i];
}
Report("The sum in the Rx buffer is: %d\n\r",sum);
Report("Checksum Rx buffer is: 0x%02x\n\r",crc(rx_buffer));
Report("interrupt: %d, tx: %d, rx: %d, transfer: %d\n\r",interrupt_count,tx_count,rx_count, transfer_count);
Message("TX-");
print_buffer(tx_buffer,TR_BUFF_SIZE);
Message("RX-");
print_buffer(rx_buffer,TR_BUFF_SIZE);
output_count++;
}
}
return 0;
}
void
InitTerm()
{
#ifndef NOTERM
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
#endif
__Errorlog = 0;
}
int main() {
#ifndef USE_TIRTOS
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
#endif
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFOLevelSet(CONSOLE_UART, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFOEnable(CONSOLE_UART);
setvbuf(stdout, NULL, _IOLBF, 0);
setvbuf(stderr, NULL, _IOLBF, 0);
cs_log_set_level(LL_INFO);
cs_log_set_file(stdout);
LOG(LL_INFO, ("Hello, world!"));
MAP_PinTypeI2C(PIN_01, PIN_MODE_1); /* SDA */
MAP_PinTypeI2C(PIN_02, PIN_MODE_1); /* SCL */
I2C_IF_Open(I2C_MASTER_MODE_FST);
/* Set up the red LED. Note that amber and green cannot be used as they share
* pins with I2C. */
MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK);
MAP_PinTypeGPIO(PIN_64, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x2, GPIO_DIR_MODE_OUT);
GPIO_IF_LedConfigure(LED1);
GPIO_IF_LedOn(MCU_RED_LED_GPIO);
if (VStartSimpleLinkSpawnTask(8) != 0) {
LOG(LL_ERROR, ("Failed to create SL task"));
}
if (!mg_start_task(MG_TASK_PRIORITY, MG_TASK_STACK_SIZE, mg_init)) {
LOG(LL_ERROR, ("Failed to create MG task"));
}
osi_start();
return 0;
}
void SampleInit(void)
{
/*
//UDMAInit();
// Reset SPI
//MAP_SPIReset(GSPI_BASE);
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
SPI_IF_BIT_RATE,SPI_MODE_MASTER,SPI_SUB_MODE_3,
(SPI_HW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_ON|
SPI_CS_ACTIVELOW |
SPI_WL_8));
MAP_SPIEnable(GSPI_BASE);
MAP_SPICSEnable(GSPI_BASE);
MAP_SPIFIFOEnable(GSPI_BASE,SPI_RX_FIFO);
MAP_SPIFIFOEnable(GSPI_BASE,SPI_TX_FIFO);
SPIFIFOLevelSet(GSPI_BASE,1,1);
MAP_SPIIntEnable(GSPI_BASE,SPI_INT_DMARX|SPI_INT_DMATX);
//MAP_SPIIntEnable(GSPI_BASE,SPI_INT_DMATX);
//MAP_SPIIntRegister(GSPI_BASE,DMAIntHandler);
osi_InterruptRegister(INT_GSPI, DMAIntHandler, 32);
*/
UDMAInit();
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
SPI_IF_BIT_RATE,SPI_MODE_MASTER,SPI_SUB_MODE_3,
(SPI_HW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_ON|
SPI_CS_ACTIVEHIGH |
SPI_WL_8));
MAP_SPIEnable(GSPI_BASE);
MAP_SPICSEnable(GSPI_BASE);
MAP_SPIFIFOEnable(GSPI_BASE,SPI_RX_FIFO);
MAP_SPIFIFOEnable(GSPI_BASE,SPI_TX_FIFO);
SPIFIFOLevelSet(GSPI_BASE,1,1);
MAP_SPIIntEnable(GSPI_BASE,SPI_INT_DMARX);
//MAP_SPIIntEnable(GSPI_BASE,SPI_INT_DMATX);
//MAP_SPIIntRegister(GSPI_BASE,DMAIntHandler);
osi_InterruptRegister(INT_GSPI, DMAIntHandler, 32);
}
void UART1IntInit(){
//configure Uart
MAP_UARTConfigSetExpClk(UARTA1_BASE, MAP_PRCMPeripheralClockGet(PRCM_UARTA1),
UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
UARTEnable(UARTA1_BASE);
// Disable FIFO so RX interrupt triggers on any character
MAP_UARTFIFODisable(UARTA1_BASE);
// Set interrupt handlers
MAP_UARTIntRegister(UARTA1_BASE,receiveMessage);
// Clear any interrupts that may have been present
MAP_UARTIntClear(UARTA1_BASE, UART_INT_RX);
// Enable interrupt
MAP_UARTIntEnable(UARTA1_BASE, UART_INT_RX|UART_INT_RT);
UARTFIFOEnable(UARTA1_BASE);
}
/// Initalizes the sd card hardware driver
STATIC void pyb_sd_hw_init (pybsd_obj_t *self) {
if (self->pin_clk) {
// Configure the clock pin as output only
MAP_PinDirModeSet(((pin_obj_t *)(self->pin_clk))->pin_num, PIN_DIR_MODE_OUT);
}
// Enable SD peripheral clock
MAP_PRCMPeripheralClkEnable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
// Reset MMCHS
MAP_PRCMPeripheralReset(PRCM_SDHOST);
// Initialize MMCHS
MAP_SDHostInit(SDHOST_BASE);
// Configure the card clock
MAP_SDHostSetExpClk(SDHOST_BASE, MAP_PRCMPeripheralClockGet(PRCM_SDHOST), PYBSD_FREQUENCY_HZ);
// Set card rd/wr block len
MAP_SDHostBlockSizeSet(SDHOST_BASE, SD_SECTOR_SIZE);
self->enabled = true;
}
// assumes init parameters have been set up correctly
bool uart_init2(pyb_uart_obj_t *self) {
uint uartPerh;
switch (self->uart_id) {
case PYB_UART_0:
self->reg = UARTA0_BASE;
uartPerh = PRCM_UARTA0;
MAP_UARTIntRegister(UARTA0_BASE, UART0IntHandler);
MAP_IntPrioritySet(INT_UARTA0, INT_PRIORITY_LVL_3);
break;
case PYB_UART_1:
self->reg = UARTA1_BASE;
uartPerh = PRCM_UARTA1;
MAP_UARTIntRegister(UARTA1_BASE, UART1IntHandler);
MAP_IntPrioritySet(INT_UARTA1, INT_PRIORITY_LVL_3);
break;
default:
return false;
}
// Enable the peripheral clock
MAP_PRCMPeripheralClkEnable(uartPerh, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
// Reset the uart
MAP_PRCMPeripheralReset(uartPerh);
// Initialize the UART
MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(uartPerh),
self->baudrate, self->config);
// Enbale the FIFO
MAP_UARTFIFOEnable(self->reg);
// Configure the FIFO interrupt levels
MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
// Configure the flow control mode
UARTFlowControlSet(self->reg, self->flowcontrol);
// Enable the RX and RX timeout interrupts
MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT);
self->enabled = true;
return true;
}
void simpleLinkWakupCallback()
{
unsigned long ulBase;
unsigned long ulSpiBitRate = 0;
//wakeupcalled++;
//NWP master interface
ulBase = LSPI_BASE;
ulSpiBitRate = SPI_RATE_20M;
MAP_SPIConfigSetExpClk(ulBase,MAP_PRCMPeripheralClockGet(PRCM_LSPI),
ulSpiBitRate,SPI_MODE_MASTER,SPI_SUB_MODE_0,
(SPI_SW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVEHIGH |
SPI_WL_32));
}
void SPIInit(){
// Reset SPI
MAP_SPIReset(GSPI_BASE);
//Enables the transmit and/or receive FIFOs.
//Base address is GSPI_BASE, SPI_TX_FIFO || SPI_RX_FIFO are the FIFOs to be enabled
MAP_SPIFIFOEnable(GSPI_BASE, SPI_TX_FIFO || SPI_RX_FIFO);
// Configure SPI interface
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
SPI_IF_BIT_RATE,SPI_MODE_MASTER,SPI_SUB_MODE_0,
(SPI_SW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVELOW |
SPI_WL_8));
// Enable SPI for communication
MAP_SPIEnable(GSPI_BASE);
}
static void Command(bool bPowerEn,
unsigned char ucZoom,
unsigned char ucGain,
unsigned char ucLine)
{
unsigned short usCommand = 0x0000;
if (bPowerEn)
usCommand |= 0x8000;
usCommand |= (ucZoom & 0x03) << 6;
//usCommand |= (ucGain & 0x3F);
usCommand |= (ucGain & 0x7E) >> 1;
TRACE("Gain: %d\r\n",ucGain);
usCommand |= (ucLine & 0x7F) << 8;
// Reset SPI
MAP_SPIReset(GSPI_BASE);
// Configure SPI interface
MAP_SPIConfigSetExpClk(GSPI_BASE,MAP_PRCMPeripheralClockGet(PRCM_GSPI),
20000000,SPI_MODE_MASTER,SPI_SUB_MODE_0,
(SPI_SW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_ON |
SPI_CS_ACTIVEHIGH |
SPI_WL_8));
// Enable SPI for communication
MAP_SPIEnable(GSPI_BASE);
WRITE_TO_SPI;
unsigned char tmpbuf[2];
MAP_SPITransfer(GSPI_BASE,
(unsigned char*)&usCommand,
tmpbuf,2,
SPI_CS_ENABLE|SPI_CS_DISABLE);
READ_FROM_SPI;
MAP_SPIDisable(GSPI_BASE);
}
void cc32xx_uart_early_init(int uart_no, int baud_rate) {
if (uart_no < 0) return;
uint32_t base = cc32xx_uart_get_base(uart_no);
uint32_t periph;
if (uart_no == 0) {
periph = PRCM_UARTA0;
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* UART0_RX */
} else if (uart_no == 1) {
periph = PRCM_UARTA1;
MAP_PinTypeUART(PIN_07, PIN_MODE_5); /* UART1_TX */
MAP_PinTypeUART(PIN_08, PIN_MODE_5); /* UART1_RX */
} else {
return;
}
MAP_PRCMPeripheralClkEnable(periph, PRCM_RUN_MODE_CLK);
MAP_UARTConfigSetExpClk(
base, MAP_PRCMPeripheralClockGet(periph), baud_rate,
UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE);
MAP_UARTFIFODisable(base);
MAP_UARTIntDisable(base, ~0); /* Start with ints disabled. */
}
int main()
{
MAP_IntVTableBaseSet((unsigned long)vectors);
MAP_IntMasterEnable();
MAP_IntEnable(FAULT_SYSTICK);
PRCMCC3200MCUInit();
#ifdef UART_LOG
MAP_PRCMPeripheralClkEnable(PRCM_UART_TERM, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_TERM_TX, PIN_TERM_TX_MODE);
MAP_PinTypeUART(PIN_TERM_RX, PIN_TERM_RX_MODE);
MAP_UARTConfigSetExpClk(UART_TERM,
MAP_PRCMPeripheralClockGet(PRCM_UART_TERM),
115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |UART_CONFIG_PAR_NONE));
#endif
MonitorLoop();
asm(" BKPT");
while ( 1 );
return 0;
}
Fd_t spi_Open(char *ifName, unsigned long flags)
{
unsigned long ulBase;
unsigned long ulSpiBitRate = SPI_RATE_20M;
//NWP master interface
ulBase = LSPI_BASE;
//Enable MCSPIA2
MAP_PRCMPeripheralClkEnable(PRCM_LSPI,PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
//Disable Chip Select
MAP_SPICSDisable(ulBase);
//Disable SPI Channel
MAP_SPIDisable(ulBase);
// Reset SPI
MAP_SPIReset(ulBase);
//
// Configure SPI interface
//
MAP_SPIConfigSetExpClk(ulBase,MAP_PRCMPeripheralClockGet(PRCM_LSPI),
ulSpiBitRate,SPI_MODE_MASTER,SPI_SUB_MODE_0,
(SPI_SW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVEHIGH |
SPI_WL_32));
MAP_SPIEnable(ulBase);
g_SpiFd = 1;
return g_SpiFd;
}
int main(void) {
MAP_IntVTableBaseSet((unsigned long) &int_vectors[0]);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
/* Console UART init. */
#ifndef NO_DEBUG
MAP_PRCMPeripheralClkEnable(DEBUG_UART_PERIPH, PRCM_RUN_MODE_CLK);
#if MIOT_DEBUG_UART == 0
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* UART0_RX */
#else
MAP_PinTypeUART(PIN_07, PIN_MODE_5); /* UART1_TX */
MAP_PinTypeUART(PIN_08, PIN_MODE_5); /* UART1_RX */
#endif
MAP_UARTConfigSetExpClk(
DEBUG_UART_BASE, MAP_PRCMPeripheralClockGet(DEBUG_UART_PERIPH),
MIOT_DEBUG_UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFOLevelSet(DEBUG_UART_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFODisable(DEBUG_UART_BASE);
#endif
dbg_puts("\r\n\n");
if (sl_Start(NULL, NULL, NULL) < 0) abort();
dbg_putc('S');
int cidx = get_active_boot_cfg_idx();
if (cidx < 0) abort();
dbg_putc('0' + cidx);
struct boot_cfg cfg;
if (read_boot_cfg(cidx, &cfg) < 0) abort();
dbg_puts(cfg.app_image_file);
dbg_putc('@');
print_addr(cfg.app_load_addr);
/*
* Zero memory before loading.
* This should provide proper initialisation for BSS, wherever it is.
*/
uint32_t *pstart = (uint32_t *) 0x20000000;
uint32_t *pend = (&_text_start - 0x100 /* our stack */);
for (uint32_t *p = pstart; p < pend; p++) *p = 0;
if (load_image(cfg.app_image_file, (_u8 *) cfg.app_load_addr) != 0) {
abort();
}
dbg_putc('.');
sl_Stop(0);
print_addr(*(((uint32_t *) cfg.app_load_addr) + 1));
dbg_puts("\r\n\n");
MAP_IntMasterDisable();
MAP_IntVTableBaseSet(cfg.app_load_addr);
run(cfg.app_load_addr); /* Does not return. */
abort();
return 0; /* not reached */
}
static void uart_int() {
int c = UARTCharGet(CONSOLE_UART);
struct prompt_event pe = {.type = PROMPT_CHAR_EVENT, .data = (void *) c};
osi_MsgQWrite(&s_v7_q, &pe, OSI_NO_WAIT);
MAP_UARTIntClear(CONSOLE_UART, UART_INT_RX);
}
void sj_prompt_init_hal(struct v7 *v7) {
(void) v7;
}
static void v7_task(void *arg) {
struct v7 *v7 = s_v7;
printf("\n\nSmart.JS for CC3200\n");
osi_MsgQCreate(&s_v7_q, "V7", sizeof(struct prompt_event), 32 /* len */);
osi_InterruptRegister(CONSOLE_UART_INT, uart_int, INT_PRIORITY_LVL_1);
MAP_UARTIntEnable(CONSOLE_UART, UART_INT_RX);
sl_Start(NULL, NULL, NULL);
v7 = s_v7 = init_v7(&v7);
sj_init_timers(v7);
sj_init_v7_ext(v7);
init_wifi(v7);
if (init_fs(v7) != 0) {
fprintf(stderr, "FS initialization failed.\n");
}
mongoose_init();
sj_init_http(v7);
init_i2cjs(v7);
/* Common config infrastructure. Mongoose & v7 must be initialized. */
init_device(v7);
v7_val_t res;
if (v7_exec_file(v7, "sys_init.js", &res) != V7_OK) {
fprintf(stderr, "Error: ");
v7_fprint(stderr, v7, res);
}
sj_prompt_init(v7);
while (1) {
struct prompt_event pe;
mongoose_poll(MONGOOSE_POLL_LENGTH_MS);
if (osi_MsgQRead(&s_v7_q, &pe, V7_POLL_LENGTH_MS) != OSI_OK) continue;
switch (pe.type) {
case PROMPT_CHAR_EVENT: {
sj_prompt_process_char((char) ((int) pe.data));
break;
}
case V7_INVOKE_EVENT: {
struct v7_invoke_event_data *ied =
(struct v7_invoke_event_data *) pe.data;
_sj_invoke_cb(v7, ied->func, ied->this_obj, ied->args);
v7_disown(v7, &ied->args);
v7_disown(v7, &ied->this_obj);
v7_disown(v7, &ied->func);
free(ied);
break;
}
}
}
}
/* Int vector table, defined in startup_gcc.c */
extern void (*const g_pfnVectors[])(void);
void device_reboot(void) {
sj_system_restart();
}
int main() {
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
cc3200_leds_init();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFODisable(CONSOLE_UART);
setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0);
VStartSimpleLinkSpawnTask(8);
osi_TaskCreate(v7_task, (const signed char *) "v7", V7_STACK_SIZE + 256, NULL,
3, NULL);
osi_TaskCreate(blinkenlights_task, (const signed char *) "blink", 256, NULL,
9, NULL);
osi_start();
return 0;
}
Fd_t spi_Open(char *ifName, unsigned long flags)
{
unsigned long ulBase;
unsigned long ulSpiBitRate;
tROMVersion* pRomVersion = (tROMVersion *)(ROM_VERSION_ADDR);
//NWP master interface
ulBase = LSPI_BASE;
//Enable MCSPIA2
MAP_PRCMPeripheralClkEnable(PRCM_LSPI,PRCM_RUN_MODE_CLK|PRCM_SLP_MODE_CLK);
//Disable Chip Select
MAP_SPICSDisable(ulBase);
//Disable SPI Channel
MAP_SPIDisable(ulBase);
// Reset SPI
MAP_SPIReset(ulBase);
//
// Configure SPI interface
//
if(pRomVersion->ucMinorVerNum == ROM_VER_PG1_21 )
{
ulSpiBitRate = SPI_RATE_13M;
}
else if(pRomVersion->ucMinorVerNum == ROM_VER_PG1_32)
{
ulSpiBitRate = SPI_RATE_13M;
}
else if(pRomVersion->ucMinorVerNum >= ROM_VER_PG1_33)
{
ulSpiBitRate = SPI_RATE_20M;
}
MAP_SPIConfigSetExpClk(ulBase,MAP_PRCMPeripheralClockGet(PRCM_LSPI),
ulSpiBitRate,SPI_MODE_MASTER,SPI_SUB_MODE_0,
(SPI_SW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVEHIGH |
SPI_WL_32));
if(MAP_PRCMPeripheralStatusGet(PRCM_UDMA))
{
g_ucDMAEnabled = (HWREG(UDMA_BASE + UDMA_O_CTLBASE) != 0x0) ? 1 : 0;
}
else
{
g_ucDMAEnabled = 0;
}
#ifdef SL_CPU_MODE
g_ucDMAEnabled = 0;
#endif
if(g_ucDMAEnabled)
{
memset(g_ucDinDout,0xFF,sizeof(g_ucDinDout));
// Set DMA channel
cc_UDMAChannelSelect(UDMA_CH12_LSPI_RX);
cc_UDMAChannelSelect(UDMA_CH13_LSPI_TX);
MAP_SPIFIFOEnable(ulBase,SPI_RX_FIFO);
MAP_SPIFIFOEnable(ulBase,SPI_TX_FIFO);
MAP_SPIDmaEnable(ulBase,SPI_RX_DMA);
MAP_SPIDmaEnable(ulBase,SPI_TX_DMA);
MAP_SPIFIFOLevelSet(ulBase,1,1);
#if defined(SL_PLATFORM_MULTI_THREADED)
osi_InterruptRegister(INT_LSPI, (P_OSI_INTR_ENTRY)DmaSpiSwIntHandler,INT_PRIORITY_LVL_1);
MAP_SPIIntEnable(ulBase,SPI_INT_EOW);
osi_MsgQCreate(&DMAMsgQ,"DMAQueue",sizeof(int),1);
#else
MAP_IntRegister(INT_LSPI,(void(*)(void))DmaSpiSwIntHandler);
MAP_IntPrioritySet(INT_LSPI, INT_PRIORITY_LVL_1);
MAP_IntEnable(INT_LSPI);
MAP_SPIIntEnable(ulBase,SPI_INT_EOW);
g_cDummy = 0x0;
#endif
}
MAP_SPIEnable(ulBase);
g_SpiFd = 1;
return g_SpiFd;
}
//*****************************************************************************
//
//! Main function handling the UART and DMA configuration. It takes 8
//! characters from terminal without displaying them. The string of 8
//! caracters will be printed on the terminal as soon as 8th character is
//! typed in.
//!
//! \param None
//!
//! \return None
//!
//*****************************************************************************
void main()
{
//
// Initailizing the board
//
BoardInit();
//
// Initialize the RX done flash
//
bRxDone = false;
//
// Initialize uDMA
//
UDMAInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Register interrupt handler for UART
//
MAP_UARTIntRegister(UARTA0_BASE,UARTIntHandler);
//
// Enable DMA done interrupts for uart
//
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX);
//
// Initialising the Terminal.
//
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
//
// Clear terminal
//
ClearTerm();
//
// Display Banner
//
DisplayBanner(APP_NAME);
Message("\t\t****************************************************\n\r");
Message("\t\t Type in a string of 8 characters, the characters \n\r");
Message("\t\t will not be displayed on the terminal until \n\r");
Message("\t\t 8th character is entered.\n\r") ;
Message("\t\t****************************************************\n\r");
Message("\n\n\n\r");
//
// Set the message
//
Message("Type in 8 characters:");
//
// Configure the UART Tx and Rx FIFO level to 1/8 i.e 2 characters
//
UARTFIFOLevelSet(UARTA0_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8);
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_SRC_INC_NONE,
(void *)ucTextBuff,
UDMA_DST_INC_8);
//
// Enable Rx DMA request from UART
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_RX);
//
// Wait for RX to complete
//
while(!bRxDone)
{
}
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH9_UARTA0_TX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)ucTextBuff,
UDMA_SRC_INC_8,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_DST_INC_NONE);
//
// Enable TX DMA request
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_TX);
while(1)
{
//
// Inifite loop
//
}
}
//****************************************************************************
//
//! Main function
//!
//! \param none
//!
//!
//! \return None.
//
//****************************************************************************
void main()
{
FIL fp;
FATFS fs;
FRESULT res;
DIR dir;
UINT Size;
//
// Initialize Board configurations
//
BoardInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Set the SD card clock as output pin
//
MAP_PinDirModeSet(PIN_07,PIN_DIR_MODE_OUT);
//
// Enable Pull up on data
//
MAP_PinConfigSet(PIN_06,PIN_STRENGTH_4MA, PIN_TYPE_STD_PU);
//
// Enable Pull up on CMD
//
MAP_PinConfigSet(PIN_08,PIN_STRENGTH_4MA, PIN_TYPE_STD_PU);
//
// Initialising the Terminal.
//
InitTerm();
//
// Clearing the Terminal.
//
ClearTerm();
//
// Display the Banner
//
Message("\n\n\n\r");
Message("\t\t ********************************************\n\r");
Message("\t\t CC3200 SDHost Fatfs Demo Application \n\r");
Message("\t\t ********************************************\n\r");
Message("\n\n\n\r");
//
// Enable MMCHS
//
MAP_PRCMPeripheralClkEnable(PRCM_SDHOST,PRCM_RUN_MODE_CLK);
//
// Reset MMCHS
//
MAP_PRCMPeripheralReset(PRCM_SDHOST);
//
// Configure MMCHS
//
MAP_SDHostInit(SDHOST_BASE);
//
// Configure card clock
//
MAP_SDHostSetExpClk(SDHOST_BASE,
MAP_PRCMPeripheralClockGet(PRCM_SDHOST),15000000);
f_mount(&fs,"0",1);
res = f_opendir(&dir,"/");
if( res == FR_OK)
{
Message("Opening root directory.................... [ok]\n\n\r");
Message("/\n\r");
ListDirectory(&dir);
}
else
{
Message("Opening root directory.................... [Failed]\n\n\r");
}
Message("\n\rReading user file...\n\r");
res = f_open(&fp,USERFILE,FA_READ);
if(res == FR_OK)
{
f_read(&fp,pBuffer,100,&Size);
Report("Read : %d Bytes\n\n\r",Size);
Report("%s",pBuffer);
f_close(&fp);
}
else
{
Report("Failed to open %s\n\r",USERFILE);
}
Message("\n\n\rWriting system file...\n\r");
res = f_open(&fp,SYSFILE,FA_CREATE_ALWAYS|FA_WRITE);
if(res == FR_OK)
{
f_write(&fp,SYSTEXT,sizeof(SYSTEXT),&Size);
Report("Wrote : %d Bytes",Size);
res = f_close(&fp);
}
else
{
Message("Failed to create a new file\n\r");
}
while(1)
{
}
}
bool mgos_uart_hal_configure(struct mgos_uart_state *us,
const struct mgos_uart_config *cfg) {
uint32_t base = cc32xx_uart_get_base(us->uart_no);
if (us->uart_no == 0 && (cfg->tx_fc_type == MGOS_UART_FC_HW ||
cfg->rx_fc_type == MGOS_UART_FC_HW)) {
/* No FC on UART0, according to the TRM. */
return false;
}
MAP_UARTIntDisable(base, ~0);
uint32_t periph = (us->uart_no == 0 ? PRCM_UARTA0 : PRCM_UARTA1);
uint32_t data_cfg = 0;
switch (cfg->num_data_bits) {
case 5:
data_cfg |= UART_CONFIG_WLEN_5;
break;
case 6:
data_cfg |= UART_CONFIG_WLEN_6;
break;
case 7:
data_cfg |= UART_CONFIG_WLEN_7;
break;
case 8:
data_cfg |= UART_CONFIG_WLEN_8;
break;
default:
return false;
}
switch (cfg->parity) {
case MGOS_UART_PARITY_NONE:
data_cfg |= UART_CONFIG_PAR_NONE;
break;
case MGOS_UART_PARITY_EVEN:
data_cfg |= UART_CONFIG_PAR_EVEN;
break;
case MGOS_UART_PARITY_ODD:
data_cfg |= UART_CONFIG_PAR_ODD;
break;
}
switch (cfg->stop_bits) {
case MGOS_UART_STOP_BITS_1:
data_cfg |= UART_CONFIG_STOP_ONE;
break;
case MGOS_UART_STOP_BITS_1_5:
return false; /* Not supported */
case MGOS_UART_STOP_BITS_2:
data_cfg |= UART_CONFIG_STOP_TWO;
break;
}
MAP_UARTConfigSetExpClk(base, MAP_PRCMPeripheralClockGet(periph),
cfg->baud_rate, data_cfg);
if (cfg->tx_fc_type == MGOS_UART_FC_HW ||
cfg->rx_fc_type == MGOS_UART_FC_HW) {
/* Note: only UART1 */
uint32_t ctl = HWREG(base + UART_O_CTL);
if (cfg->tx_fc_type == MGOS_UART_FC_HW) {
ctl |= UART_CTL_CTSEN;
MAP_PinTypeUART(PIN_61, PIN_MODE_3); /* UART1_CTS */
}
if (cfg->rx_fc_type == MGOS_UART_FC_HW) {
ctl |= UART_CTL_RTSEN;
MAP_PinTypeUART(PIN_62, PIN_MODE_3); /* UART1_RTS */
}
HWREG(base + UART_O_CTL) = ctl;
}
MAP_UARTFIFOLevelSet(base, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFOEnable(base);
return true;
}
//****************************************************************************
// MAIN FUNCTION
//****************************************************************************
void main()
{
long lRetVal = -1;
//Board Initialization
BoardInit();
//Pin Configuration
PinMuxConfig();
//Change Pin 58 Configuration from Default to Pull Down
MAP_PinConfigSet(PIN_58,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD_PD);
//
// Initialize GREEN and ORANGE LED
//
GPIO_IF_LedConfigure(LED1|LED2|LED3);
//Turn Off the LEDs
GPIO_IF_LedOff(MCU_ALL_LED_IND);
//UART Initialization
MAP_PRCMPeripheralReset(PRCM_UARTA0);
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE,(UART_CONFIG_WLEN_8 |
UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
//Display Application Banner on UART Terminal
DisplayBanner(APPLICATION_NAME);
//
// Simplelinkspawntask
//
lRetVal = VStartSimpleLinkSpawnTask(SPAWN_TASK_PRIORITY);
if(lRetVal < 0)
{
UART_PRINT("Unable to start simpelink spawn task\n\r");
LOOP_FOREVER();
}
//
// Create HTTP Server Task
//
lRetVal = osi_TaskCreate(HTTPServerTask, (signed char*)"HTTPServerTask",
OSI_STACK_SIZE, NULL, OOB_TASK_PRIORITY, NULL );
if(lRetVal < 0)
{
UART_PRINT("Unable to create task\n\r");
LOOP_FOREVER();
}
//
// Start OS Scheduler
//
osi_start();
while (1)
{
}
}
