void hw_timer0a_init(TN_EVENT* evt, unsigned evt_pattern) { if (evt == NULL || evt_pattern == 0) { dbg_puts("evt == NULL || evt_pattern == 0"); dbg_trace(); tn_halt(); } g_timer0a_evt = evt; g_timer0a_evt_pattern = evt_pattern; // TIMER_0_A32 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_TIMER0); MAP_TimerDisable(TIMER0_BASE, TIMER_A); MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER); // periodic mode MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT); //MAP_IntPrioritySet(INT_TIMER0A, 0); // 0 - max pri 7 - min pri MAP_IntEnable(INT_TIMER0A); /* MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3); MAP_TimerDisable(TIMER3_BASE, TIMER_A); MAP_TimerConfigure(TIMER3_BASE, TIMER_CFG_32_BIT_OS); MAP_TimerEnable(TIMER3_BASE, TIMER_A); */ }
//**************************************************************************** // //! Setup the timer in PWM mode //! //! \param ulBase is the base address of the timer to be configured //! \param ulTimer is the timer to be setup (TIMER_A or TIMER_B) //! \param ulConfig is the timer configuration setting //! \param ucInvert is to select the inversion of the output //! //! This function //! 1. The specified timer is setup to operate as PWM //! //! \return None. // //**************************************************************************** void SetupTimerPWMMode(unsigned long ulBase, unsigned long ulTimer, unsigned long ulConfig, unsigned char ucInvert) { // // Set GPT - Configured Timer in PWM mode. // MAP_TimerConfigure(ulBase,ulConfig); MAP_TimerPrescaleSet(ulBase,ulTimer,0); // // Inverting the timer output if required // MAP_TimerControlLevel(ulBase,ulTimer,ucInvert); // // Load value set to ~0.5 ms time period // MAP_TimerLoadSet(ulBase,ulTimer,TIMER_INTERVAL_RELOAD); // // Match value set so as to output level 0 // MAP_TimerMatchSet(ulBase,ulTimer,TIMER_INTERVAL_RELOAD); }
//**************************************************************************** // //! The delay function uses timer to implement the delay time in milliseconds //! //! \param time in millisecond // //! \return void //**************************************************************************** static void delay(int time_ms) { // Initialize Timer 0B as one-shot down counter. MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA0); MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_ONE_SHOT); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, PRESCALE); //Load the value in milisecond MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MILLISECONDS_TO_TICKS(time_ms)); // Enable the timer MAP_TimerEnable(TIMERA0_BASE, TIMER_B); //Stall during debug MAP_TimerControlStall(TIMERA0_BASE, TIMER_B, 1); // Enable interrupt upon Time-out MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT); // Clear Interrupt Flag MAP_TimerIntClear(TIMERA0_BASE, MAP_TimerIntStatus(TIMERA0_BASE, true)); //Wait until timer time-out while (MAP_TimerIntStatus(TIMERA0_BASE, true) != TIMER_TIMB_TIMEOUT){} //Disable the timer MAP_TimerDisable(TIMERA0_BASE, TIMER_B); //Disable Interrupt MAP_TimerIntDisable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT); MAP_TimerIntUnregister(TIMERA0_BASE, TIMER_B); }
void tone(uint8_t pin, unsigned int frequency, unsigned long duration) { /* Use TIMERA0B since it is not on any pin */ tone_timer = digitalPinToTimer(pin); if(tone_timer == NOT_ON_TIMER) return; if(tone_state != 0 && pin != current_pin) return; g_duration = duration; current_pin = pin; tone_state = 2; MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA0); MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_PERIODIC); MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, ToneIntHandler); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 7); MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, (F_CPU / 8) / 1000); MAP_TimerEnable(TIMERA0_BASE, TIMER_B); PWMWrite(pin, 256, 128, frequency); }
void motorSetup() { /* Set pin mode for Hbridge output pins */ MAP_PinTypeGPIO(AIN1, PIN_MODE_0, false); /* Ain 1 */ MAP_PinTypeGPIO(AIN2, PIN_MODE_0, false); /* Bin 1 */ MAP_PinTypeGPIO(BIN1, PIN_MODE_0, false); /* Bin 2 */ MAP_PinTypeGPIO(BIN2, PIN_MODE_0, false); /* Ain 2 */ /* Get port name and bin number from GPIO number (TI lookup table) */ GPIO_IF_GetPortNPin(AIN1x, &port_ain1, &pin_ain1); GPIO_IF_GetPortNPin(AIN2x, &port_ain2, &pin_ain2); GPIO_IF_GetPortNPin(BIN1x, &port_bin1, &pin_bin1); GPIO_IF_GetPortNPin(BIN2x, &port_bin2, &pin_bin2); /* Set pin direction */ GPIODirModeSet(port_ain1, pin_ain1, 1); GPIODirModeSet(port_ain2, pin_ain2, 1); GPIODirModeSet(port_bin1, pin_bin1, 1); GPIODirModeSet(port_bin2, pin_bin2, 1); /* Set value to write to PIN */ bitA1 = 1 << (AIN1x % 8); bitA2 = 1 << (AIN2x % 8); bitB1 = 1 << (BIN1x % 8); bitB2 = 1 << (BIN2x % 8); // Enable timer A peripheral MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA0); // Split channels and configure for periodic interrupts MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_PERIODIC); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_A, 0); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 0); // Set compare interrupt MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_MATCH); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_MATCH); // Configure compare interrupt, start with 0 speed MAP_TimerMatchSet(TIMERA0_BASE, TIMER_A, 0); MAP_TimerMatchSet(TIMERA0_BASE, TIMER_B, 0); // Set timeout interrupt MAP_TimerIntRegister(TIMERA0_BASE, TIMER_A, TimerBaseIntHandlerA); MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, TimerBaseIntHandlerB); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT); // Turn on timers MAP_TimerLoadSet(TIMERA0_BASE, TIMER_A, MOTOR_PRESCALER); MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MOTOR_PRESCALER); MAP_TimerEnable(TIMERA0_BASE, TIMER_A); MAP_TimerEnable(TIMERA0_BASE, TIMER_B); }
static i32 hwt32_config_periodic(struct hw_timer32 *hwt, u32 expires) { /* Count downwards from value of 'expires' to zero */ MAP_TimerConfigure(hwt->base_addr, TIMER_CFG_PERIODIC); MAP_TimerLoadSet(hwt->base_addr, TIMER_A, expires); /* Countdown value */ hwt->irq_mask = TIMER_TIMA_TIMEOUT; /* IRQ: when down counter reaches 0*/ return 0; }
static void timers_init() { unsigned i; for( i = 0; i < NUM_TIMER; i ++ ) { MAP_SysCtlPeripheralEnable(timer_sysctl[ i ]); MAP_TimerConfigure(timer_base[ i ], TIMER_CFG_32_BIT_PER); MAP_TimerEnable(timer_base[ i ], TIMER_A); } }
//***************************************************************************** // //! Initializes the CPU usage measurement module. //! //! \param ulClockRate is the rate of the clock supplied to the timer module. //! \param ulRate is the number of times per second that CPUUsageTick() is //! called. //! \param ulTimer is the index of the timer module to use. //! //! This function prepares the CPU usage measurement module for measuring the //! CPU usage of the application. //! //! \return None. // //***************************************************************************** void CPUUsageInit(unsigned long ulClockRate, unsigned long ulRate, unsigned long ulTimer) { // // Check the arguments. // ASSERT(ulClockRate > ulRate); ASSERT(ulTimer < 4); // // Save the timer index. // g_ulCPUUsageTimer = ulTimer; // // Determine the number of system clocks per measurement period. // g_ulCPUUsageTicks = ulClockRate / ulRate; // // Set the previous value of the timer to the initial timer value. // g_ulCPUUsagePrevious = 0xffffffff; // // Enable peripheral clock gating. // MAP_SysCtlPeripheralClockGating(true); // // Enable the third timer while the processor is in run mode, but disable // it in sleep mode. It will therefore count system clocks when the // processor is running but not when it is sleeping. // MAP_SysCtlPeripheralEnable(g_pulCPUUsageTimerPeriph[ulTimer]); MAP_SysCtlPeripheralSleepDisable(g_pulCPUUsageTimerPeriph[ulTimer]); // // Configure the third timer for 32-bit periodic operation. // MAP_TimerConfigure(g_pulCPUUsageTimerBase[ulTimer], TIMER_CFG_PERIODIC); // // Set the load value for the third timer to the maximum value. // MAP_TimerLoadSet(g_pulCPUUsageTimerBase[ulTimer], TIMER_A, 0xffffffff); // // Enable the third timer. It will now count the number of system clocks // during which the processor is executing code. // MAP_TimerEnable(g_pulCPUUsageTimerBase[ulTimer], TIMER_A); }
//***************************************************************************** // //! Initializing the Timer //! //! \param ePeripheral is the peripheral which need to be initialized. //! \param ulBase is the base address for the timer. //! \param ulConfig is the configuration for the timer. //! \param ulTimer selects amoung the TIMER_A or TIMER_B or TIMER_BOTH. //! \param ulValue is the timer prescale value which must be between 0 and //! 255 (inclusive) for 16/32-bit timers and between 0 and 65535 (inclusive) //! for 32/64-bit timers. //! This function //! 1. Enables and reset the peripheral for the timer. //! 2. Configures and set the prescale value for the timer. //! //! \return none // //***************************************************************************** void Timer_IF_Init( unsigned long ePeripheral, unsigned long ulBase, unsigned long ulConfig, unsigned long ulTimer, unsigned long ulValue) { // // Initialize GPT A0 (in 32 bit mode) as periodic down counter. // MAP_PRCMPeripheralClkEnable(ePeripheral, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(ePeripheral); MAP_TimerConfigure(ulBase,ulConfig); MAP_TimerPrescaleSet(ulBase,ulTimer,ulValue); }
static i32 hwt32_config_monotone(struct hw_timer32 *hwt, u32 expires) { /* Count upwards until counter value matches 'expires' */ MAP_TimerConfigure(hwt->base_addr, TIMER_CFG_PERIODIC_UP); MAP_TimerLoadSet(hwt->base_addr, TIMER_A, 0xFFFFFFFF); /* Rollover Val */ MAP_TimerMatchSet(hwt->base_addr, TIMER_A, expires); /* User match Val */ /* IRQ(s) when up counter rollsover and counter reaches 'expires' */ hwt->irq_mask = TIMER_TIMA_TIMEOUT | TIMER_TIMA_MATCH; return 0; }
void SysTimerConfig(void) { /// Enable TIMER0 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); /// Configure TIMER0 MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_A_PERIODIC); MAP_TimerLoadSet(TIMER0_BASE,TIMER_A, MAP_SysCtlClockGet()/100); MAP_TimerEnable(TIMER0_BASE, TIMER_A); /// \todo Set it statically? TimerIntRegister(TIMER0_BASE, TIMER_A, SysTimerHandler); MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT); }
void motorSetup() { pinMode(AIN1x, OUTPUT); pinMode(AIN2x, OUTPUT); pinMode(BIN1x, OUTPUT); pinMode(BIN2x, OUTPUT); bitA1 = digitalPinToBitMask(AIN1x); bitA2 = digitalPinToBitMask(AIN2x); bitB1 = digitalPinToBitMask(BIN1x); bitB2 = digitalPinToBitMask(BIN2x); portA1 = digitalPinToPort(AIN1x); portA2 = digitalPinToPort(AIN2x); portB1 = digitalPinToPort(BIN1x); portB2 = digitalPinToPort(BIN2x); baseA1 = (uint32_t) portBASERegister(portA1); baseA2 = (uint32_t) portBASERegister(portA2); baseB1 = (uint32_t) portBASERegister(portB1); baseB2 = (uint32_t) portBASERegister(portB2); // Enable timer A peripheral MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA0); // Split channels and configure for periodic interrupts MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_PERIODIC); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_A, 0); MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 0); // Set compare interrupt MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_MATCH); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_MATCH); // Configure compare interrupt, start with 0 speed MAP_TimerMatchSet(TIMERA0_BASE, TIMER_A, 0); MAP_TimerMatchSet(TIMERA0_BASE, TIMER_B, 0); // Set timeout interrupt MAP_TimerIntRegister(TIMERA0_BASE, TIMER_A, TimerBaseIntHandlerA); MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, TimerBaseIntHandlerB); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT); MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT); // Turn on timers MAP_TimerLoadSet(TIMERA0_BASE, TIMER_A, MOTOR_PRESCALER); MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MOTOR_PRESCALER); MAP_TimerEnable(TIMERA0_BASE, TIMER_A); MAP_TimerEnable(TIMERA0_BASE, TIMER_B); }
static void EmitCtrlInit(void) { s_ulTimerEmitCtrl = TIMERA1_BASE; MAP_PRCMPeripheralClkEnable(PRCM_TIMERA1,PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA1); MAP_TimerConfigure(s_ulTimerEmitCtrl,TIMER_CFG_PERIODIC); MAP_TimerPrescaleSet(s_ulTimerEmitCtrl,TIMER_A,0); //MAP_TimerIntRegister(s_ulTimerEmitCtrl,TIMER_A,TimerEmitCtrlHandler); osi_InterruptRegister(INT_TIMERA1A, TimerEmitCtrlHandler, 32); MAP_TimerIntEnable(s_ulTimerEmitCtrl,TIMER_TIMA_TIMEOUT); }
void controller_setup(){ // Enable timer A peripheral MAP_PRCMPeripheralClkEnable(PRCM_TIMERA1, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA1); // Configure one channel for periodic interrupts MAP_TimerConfigure(TIMERA1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC); MAP_TimerPrescaleSet(TIMERA1_BASE, TIMER_A, IMU_CONTROLLER_PRESCALER); // Set timeout interrupt MAP_TimerIntRegister(TIMERA1_BASE, TIMER_A, ControllerIntHandler); MAP_TimerIntEnable(TIMERA1_BASE, TIMER_TIMA_TIMEOUT); // Turn on timers MAP_TimerLoadSet(TIMERA1_BASE, TIMER_A, IMU_CONTROLLER_STARTUP); MAP_TimerEnable(TIMERA1_BASE, TIMER_A); }
void OneMsTaskTimer::start(uint32_t timer_index) { uint32_t load = (F_CPU / 1000); //// !!!! count = 0; overflowing = 0; // Base address for first timer g_ulBase = TIMERA0_BASE + (timer_index <<12); // Configuring the timers MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0 + timer_index, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA0 + timer_index); MAP_TimerConfigure(g_ulBase,TIMER_CFG_PERIODIC); MAP_TimerPrescaleSet(g_ulBase,TIMER_A,0); // Setup the interrupts for the timer timeouts. MAP_TimerIntRegister(g_ulBase, TIMER_A, OneMsTaskTimer_int); MAP_TimerIntEnable(g_ulBase, TIMER_TIMA_TIMEOUT); // Turn on the timers MAP_TimerLoadSet(g_ulBase,TIMER_A, load); // Enable the GPT MAP_TimerEnable(g_ulBase,TIMER_A); }
void odometer_controller_setup(void){ //acc_value_startup = get_accelerometer_default_offset(); // Enable timer A peripheral MAP_PRCMPeripheralClkEnable(PRCM_TIMERA3, PRCM_RUN_MODE_CLK); MAP_PRCMPeripheralReset(PRCM_TIMERA3); // Configure one channel for periodic interrupts MAP_TimerConfigure(TIMERA3_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC); MAP_TimerPrescaleSet(TIMERA3_BASE, TIMER_A, ODOMETER_CONTROLLER_PRESCALER); // Set timeout interrupt MAP_TimerIntRegister(TIMERA3_BASE, TIMER_A, OdometerControllerIntHandler); MAP_TimerIntEnable(TIMERA3_BASE, TIMER_TIMA_TIMEOUT); // Turn on timers MAP_TimerLoadSet(TIMERA3_BASE, TIMER_A, ODOMETER_CONTROLLER_STARTUP); MAP_TimerEnable(TIMERA3_BASE, TIMER_A); }
void InitUartInterface(uint32_t sys_clock) { uart_rx_read_index = 0; uart_rx_write_index = 0; const uint32_t dma_rx_primary = UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT; SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1); //921600 //460800 uint32_t uart_config = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE; UARTConfigSetExpClk(UART1_BASE, sys_clock, 921600, uart_config); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); UARTEnable(UART1_BASE); //UARTDMAEnable(UART1_BASE, UART_DMA_RX | UART_DMA_TX); UARTDMAEnable(UART1_BASE, UART_DMA_RX); // Put the attributes in a known state for the uDMA UART1RX channel. These // should already be disabled by default. uint32_t dma_config = UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK; uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1RX, dma_config); uint32_t dma_control = UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | UDMA_ARB_4; uDMAChannelControlSet(dma_rx_primary, dma_control); uDMAChannelTransferSet(dma_rx_primary, UDMA_MODE_BASIC, (void *)(UART1_BASE + UART_O_DR), &uart_rx_buf[uart_rx_write_index], UART_RX_BLOCK_SIZE); // Put the attributes in a known state for the uDMA UART1TX channel. These // should already be disabled by default. // uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1TX, // UDMA_ATTR_ALTSELECT | // UDMA_ATTR_HIGH_PRIORITY | // UDMA_ATTR_REQMASK); // Set the USEBURST attribute for the uDMA UART TX channel. This will // force the controller to always use a burst when transferring data from // the TX buffer to the UART. This is somewhat more effecient bus usage // than the default which allows single or burst transfers. //uDMAChannelAttributeEnable(UDMA_CHANNEL_UART1TX, UDMA_ATTR_USEBURST); // Configure the control parameters for the UART TX. The uDMA UART TX // channel is used to transfer a block of data from a buffer to the UART. // The data size is 8 bits. The source address increment is 8-bit bytes // since the data is coming from a buffer. The destination increment is // none since the data is to be written to the UART data register. The // arbitration size is set to 4, which matches the UART TX FIFO trigger // threshold. // uDMAChannelControlSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, // UDMA_SIZE_8 | UDMA_SRC_INC_8 | // UDMA_DST_INC_NONE | // UDMA_ARB_4); // Set up the transfer parameters for the uDMA UART TX channel. This will // configure the transfer source and destination and the transfer size. // Basic mode is used because the peripheral is making the uDMA transfer // request. The source is the TX buffer and the destination is the UART // data register. // uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, // UDMA_MODE_BASIC, g_ui8TxBuf, // (void *)(UART1_BASE + UART_O_DR), // sizeof(g_ui8TxBuf)); // Now both the uDMA UART TX and RX channels are primed to start a // transfer. As soon as the channels are enabled, the peripheral will // issue a transfer request and the data transfers will begin. uDMAChannelEnable(UDMA_CHANNEL_UART1RX); //uDMAChannelEnable(UDMA_CHANNEL_UART1TX); // Enable the UART DMA TX/RX interrupts. //UARTIntEnable(UART1_BASE, UART_INT_DMATX | UART_INT_DMATX); UARTIntEnable(UART1_BASE, UART_INT_DMARX); IntEnable(INT_UART1); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC); MAP_TimerLoadSet(TIMER0_BASE, TIMER_A, sys_clock / 2000); MAP_IntEnable(INT_TIMER0A); MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT); MAP_TimerEnable(TIMER0_BASE, TIMER_A); MAP_IntPrioritySet(INT_TIMER0A, 0xC0); }
void configureADC() { MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1); MAP_SysCtlDelay(2); // Disable sequencer 0 MAP_ADCSequenceDisable(ADC0_BASE, 3); // // Configure GPIO Pin // MAP_GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_7); // ************************** // Configure timer // ************************** MAP_TimerConfigure(TIMER1_BASE, TIMER_CFG_PERIODIC); // Load timer for periodic sampling of ADC MAP_TimerLoadSet(TIMER1_BASE, TIMER_A, g_ui32SysClock/SAMPLING_RATE); // Enable ADC triggering MAP_TimerControlTrigger(TIMER1_BASE, TIMER_A, true); // Trigger ADC on timer A timeout MAP_TimerADCEventSet(TIMER1_BASE, TIMER_ADC_TIMEOUT_A); // ************************** // Configure ADC // ************************** // Clear the interrupt raw status bit (should be done early // on, because it can take several cycles to clear.) MAP_ADCIntClear(ADC0_BASE, 3); // ADC0, Seq 0, Timer triggered, Priority 0 MAP_ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_TIMER, 0); // MAP_ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_PROCESSOR, 0); /*// Set all 8 sequencer steps to sample from analog channel 5 (PD7) int i; for(i = 0; i < 1; i++) { MAP_ADCSequenceStepConfigure(ADC0_BASE, 0, i, ADC_CTL_CH5 | ADC_CTL_IE | ADC_CTL_END); } // Configure step 7 to trigger interrupt, and be the end of sequence // MAP_ADCSequenceStepConfigure(ADC0_BASE, 0, 7, ADC_CTL_CH5 | ADC_CTL_IE | ADC_CTL_END); */ MAP_ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH4 | ADC_CTL_IE | ADC_CTL_END); MAP_ADCSequenceEnable(ADC0_BASE, 3); // Enable interrupts when sample conversion complete MAP_ADCIntEnable(ADC0_BASE, 3); // Enable NVIC interrupt for ADC0 SS0 MAP_IntEnable(INT_ADC0SS3); MAP_IntMasterEnable(); MAP_TimerEnable(TIMER1_BASE, TIMER_A); }
//***************************************************************************** // //! Main test implementation function //! //! It uses 3 different timers to test that interrupts can be enabled //! and disabled successfully and that preemption occurs as expected when //! different priority levels are assigned. // //! \return Returns 1 on Success. // //***************************************************************************** int DoInterruptTest() { tTestResult eResult; // // indicate that the test is started. // UART_PRINT("Interrupt test starting...\n\r\n\r"); // // Assume we will pass until we determine otherwise. // eResult = TEST_PASSED; // // Perform any required initialization prior to performing the test. // InterruptTestInit(); // // Set up the 3 timers we use in this test. Timer A0 - 500uS. // Timer A1 - 500 uS. Timer A2 - 500 uS // MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_ONE_SHOT); MAP_TimerLoadSet(TIMERA0_BASE, TIMER_A, MICROSECONDS_TO_TICKS(SLOW_TIMER_DELAY_uS/4)); MAP_TimerConfigure(TIMERA1_BASE, TIMER_CFG_ONE_SHOT); MAP_TimerLoadSet(TIMERA1_BASE, TIMER_A, MICROSECONDS_TO_TICKS(SLOW_TIMER_DELAY_uS/4)); MAP_TimerConfigure(TIMERA2_BASE, TIMER_CFG_ONE_SHOT); MAP_TimerLoadSet(TIMERA2_BASE, TIMER_A, MICROSECONDS_TO_TICKS(SLOW_TIMER_DELAY_uS/4)); // // Hook our interrupt handlers // MAP_TimerIntRegister(TIMERA0_BASE, TIMER_A, TimerA0IntHandler); MAP_TimerIntRegister(TIMERA1_BASE, TIMER_A, TimerA1IntHandler); MAP_TimerIntRegister(TIMERA2_BASE, TIMER_A, TimerA2IntHandler); UART_PRINT("Equal Priorities Testing. A0=A1=A2 \n\r"); UART_PRINT("Interrupt Triggering Order A0 => A1 => A2 \n\r"); UART_PRINT("**********************************************\n\r"); // // Scenario 1 - set three timers to the same interrupt priority. // In this case, we expect to see that the order of execuition of // interrupts are A0,A1,A2. // PerformIntTest(3, LOW_PRIORITY, LOW_PRIORITY,LOW_PRIORITY); // // Checking the Order of Execuition. A0,A1,A2. // if((g_ulA1IntCount == 0 && g_ulA2IntCount==0 ) || g_bA1CountChanged || g_bA2CountChanged ) { // // Something went wrong. Fail the test. // UART_PRINT("Interrupt failure.\n\r"); eResult = TEST_FAILED; return 0; } // // Scenario 2 : Increasing Priorities // Priorities are set as: A0 < A1 < A2 // if(eResult == TEST_PASSED) { UART_PRINT("Succesfully executed Equal Priority \n\r\n\r"); UART_PRINT("Increasing Priority : A0 < A1 < A2\n\r"); UART_PRINT("Interrupt Triggering Order A0 => A1 => A2 \n\r"); UART_PRINT("**********************************************\n\r"); // // Perform the test for this scenario. // PerformIntTest(3, LOW_PRIORITY,MIDDLE_PRIORITY, HIGH_PRIORITY); // // Order of Execuition should be as: A2,A1,A0. // if((g_ulA1IntCount == 0) || !g_bA1CountChanged || !g_bA2CountChanged) { // // Something went wrong. Fail the test. // UART_PRINT("Interrupt failure. \n\r"); eResult = TEST_FAILED; return 0; } } // // Scenario 3 - Decreasing Priorities // Priorities are set as: A0 > A1 > A2 // if(eResult == TEST_PASSED) { UART_PRINT("Succesfully executed Increasing Priority \n\r\n\r"); UART_PRINT("Decreasing Priority : A0 > A1 > A2\n\r"); UART_PRINT("Interrupt Triggering Order A0 => A1 => A2 \n\r"); UART_PRINT("**********************************************\n\r"); // // Perform the test for this scenario. // PerformIntTest(3, HIGH_PRIORITY, MIDDLE_PRIORITY, LOW_PRIORITY); // // Order of execuition should be : A0,A1,A2 // if((g_ulA1IntCount == 0) || g_bA1CountChanged || g_bA2CountChanged) { // // Something went wrong. Fail the test. // UART_PRINT("Interrupt failure\n\r"); eResult = TEST_FAILED; return 0; } } UART_PRINT("Succesfully executed Decreasing Priority \n\r\n\r"); // // Perform any clean up required after the test has completed. // InterruptTestTerm(); // // Let the user know that this test has completed. // UART_PRINT("Interrupt test ended.\n\r"); return 1; }
//***************************************************************************** // //! Main Function // //***************************************************************************** int main() { // // Initialize Board configurations // BoardInit(); // // Pinmux for UART // PinMuxConfig(); // // Configuring UART // InitTerm(); // // Display Application Banner // DisplayBanner(APP_NAME); // // Enable pull down // MAP_PinConfigSet(PIN_05,PIN_TYPE_STD_PD,PIN_STRENGTH_6MA); // // Register timer interrupt hander // MAP_TimerIntRegister(TIMERA2_BASE,TIMER_A,TimerIntHandler); // // Configure the timer in edge count mode // MAP_TimerConfigure(TIMERA2_BASE, (TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME)); // // Set the detection edge // MAP_TimerControlEvent(TIMERA2_BASE,TIMER_A,TIMER_EVENT_POS_EDGE); // // Set the reload value // MAP_TimerLoadSet(TIMERA2_BASE,TIMER_A,0xffff); // // Enable capture event interrupt // MAP_TimerIntEnable(TIMERA2_BASE,TIMER_CAPA_EVENT); // // Enable Timer // MAP_TimerEnable(TIMERA2_BASE,TIMER_A); while(1) { // // Report the calculate frequency // Report("Frequency : %d Hz\n\n\r",g_ulFreq); // // Delay loop // MAP_UtilsDelay(80000000/5); } }
void PWMWrite(uint8_t pin, uint32_t analog_res, uint32_t duty, uint32_t freq) { analog_res = analog_res * 1000; freq; uint32_t load = (F_CPU / freq) * 1000; uint32_t match = load / (analog_res / duty); match = match; load = load / 1000; uint16_t prescaler = load >> 16; uint16_t prescaler_match = match >> 16; uint8_t timer = digitalPinToTimer(pin); if(timer == NOT_ON_TIMER) return; MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0 + (timer/2), PRCM_RUN_MODE_CLK); uint16_t pnum = digitalPinToPinNum(pin); switch(timer) { /* PWM0/1 */ case TIMERA0A: case TIMERA0B: MAP_PinTypeTimer(pnum, PIN_MODE_5); break; /* PWM2/3 */ case TIMERA1A: case TIMERA1B: MAP_PinTypeTimer(pnum, PIN_MODE_9); break; /* PWM4/5 */ case TIMERA2A: case TIMERA2B: MAP_PinTypeTimer(pnum, PIN_MODE_3); break; /* PWM6/7 */ case TIMERA3A: case TIMERA3B: MAP_PinTypeTimer(pnum, PIN_MODE_3); break; } uint32_t base = TIMERA0_BASE + ((timer/2) << 12); /* FIXME: If B is already opperational and configure A, B get's messed up. */ MAP_TimerConfigure(base, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PWM | TIMER_CFG_B_PWM); uint16_t timerab = timer % 2 ? TIMER_B : TIMER_A; MAP_TimerPrescaleSet(base, timerab, prescaler); MAP_TimerPrescaleMatchSet(base, timerab, prescaler_match); MAP_TimerControlLevel(base, timerab, 1); MAP_TimerLoadSet(base, timerab, load); MAP_TimerMatchSet(base, timerab, match); MAP_TimerEnable(base, timerab); }