//--------------------------------------------------------------------------------------------------------------------------
static MDIN_ERROR_t MDIN3xx_ScaleDownProgNR(PMDIN_VIDEO_INFO pINFO, BOOL OnOff)
{
PMDIN_SRCVIDEO_INFO pSRC = (PMDIN_SRCVIDEO_INFO)&pINFO->stSRC_m;
PMDIN_DEINTCTL_INFO pIPC = (PMDIN_DEINTCTL_INFO)&pINFO->stIPC_m;
WORD nID = (pSRC->stATTB.attb&MDIN_USE_INPORT_A)? 1 : 0;
if (OnOff==0||(pIPC->attb&MDIN_DEINT_IPC_PROC)) return MDIN_NO_ERROR;
if ((pIPC->attb&MDIN_DEINT_DN_SCALE)==0) return MDIN_NO_ERROR;
// because of getting field_id toggle
// nr_t_en, deinterlace_en
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x205, 0, 1, 1)) return MDIN_I2C_ERROR;
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x205, 4, 1, 1)) return MDIN_I2C_ERROR;
// fieldid_bypass, progressive
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x001, 2+nID, 1, 1)) return MDIN_I2C_ERROR;
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x002, 8-nID*8, 1, 0)) return MDIN_I2C_ERROR;
// out dark screen
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x43, 1, 1, 1)) return MDIN_I2C_ERROR;
// in_test_ptrn
if (MDINHIF_RegWrite(MDIN_LOCAL_ID, 0x042, 0x0084)) return MDIN_I2C_ERROR;
MDINDLY_mSec(100); // delay 100ms
// restore deinterlace_en, progressive, in_test_ptrn
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x205, 4, 1, 0)) return MDIN_I2C_ERROR;
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x002, 8-nID*8, 1, 1)) return MDIN_I2C_ERROR;
if (MDINHIF_RegWrite(MDIN_LOCAL_ID, 0x042, 0x0000)) return MDIN_I2C_ERROR;
if (MDINHIF_RegField(MDIN_LOCAL_ID, 0x43, 1, 1, 0)) return MDIN_I2C_ERROR;
return MDIN_NO_ERROR;
}
//--------------------------------------------------------------------------------------------------------------------------
static void CreateMDIN380VideoInstance(void)
{
WORD nID = 0;
// MDIN_RST(ON);
// MDINDLY_mSec(10); // delay 10ms
#if !defined(SYSTEM_USE_PCI_HIF)&&defined(SYSTEM_USE_MCLK202)
MDIN3xx_SetHCLKMode(MDIN_HCLK_CRYSTAL); // set HCLK to XTAL
MDINDLY_mSec(10); // delay 10ms
#endif
#if defined(SYSTEM_USE_MDIN380)&&defined(SYSTEM_USE_BUS_HIF)
#if CPU_ACCESS_BUS_NBYTE == 1
MDIN3xx_SetHostDataMapMode(MDIN_HOST_DATA_MAP2); // mux-16bit map
#elif CPU_ACCESS_BUS_NOMUX == 1
MDIN3xx_SetHostDataMapMode(MDIN_HOST_DATA_MAP0); // sep-8bit map
#else
MDIN3xx_SetHostDataMapMode(MDIN_HOST_DATA_MAP1); // mux-8bit map
#endif
#endif
while (nID!=0x85) MDIN3xx_GetChipID(&nID); // get chip-id
MDIN3xx_EnableMainDisplay(OFF); // set main display off
MDIN3xx_SetMemoryConfig(); // initialize DDR memory
#if !defined(SYSTEM_USE_PCI_HIF)&&defined(SYSTEM_USE_MCLK202)
MDIN3xx_SetHCLKMode(MDIN_HCLK_MEM_DIV); // set HCLK to MCLK/2
MDINDLY_mSec(10); // delay 10ms
#endif
MDIN3xx_SetVCLKPLLSource(MDIN_PLL_SOURCE_XTAL); // set PLL source
MDIN3xx_EnableClockDrive(MDIN_CLK_DRV_ALL, ON);
MDIN3xx_SetInDataMapMode(MDIN_IN_DATA36_MAP0); // set in-data map
// MDIN3xx_SetDIGOutMapMode(MDIN_DIG_OUT_M_MAP0); // disable digital out
// MDIN3xx_SetDIGOutMapMode(MDIN_DIG_OUT_X_MAP12); // enable digital out
MDIN3xx_SetDIGOutMapMode(MDIN_DIG_OUT_X_MAP15);
// setup enhancement
MDIN3xx_SetFrontNRFilterCoef(NULL); // set default frontNR filter coef
MDINAUX_SetFrontNRFilterCoef(NULL); // set default frontNR filter coef
MDIN3xx_SetPeakingFilterCoef(NULL); // set default peaking filter coef
MDIN3xx_SetColorEnFilterCoef(NULL); // set default color enhancer coef
MDIN3xx_SetBlockNRFilterCoef(NULL); // set default blockNR filter coef
MDIN3xx_SetMosquitFilterCoef(NULL); // set default mosquit filter coef
MDIN3xx_SetSkinTonFilterCoef(NULL); // set default skinton filter coef
MDIN3xx_EnableLTI(OFF); // set LTI off
MDIN3xx_EnableCTI(OFF); // set CTI off
MDIN3xx_SetPeakingFilterLevel(0); // set peaking gain
MDIN3xx_EnablePeakingFilter(ON); // set peaking on
MDIN3xx_EnableFrontNRFilter(OFF); // set frontNR off
MDIN3xx_EnableBWExtension(OFF); // set B/W extension off
MDIN3xx_SetIPCBlock(); // initialize IPC block (3DNR gain is 34)
memset((PBYTE)&stVideo, 0, sizeof(MDIN_VIDEO_INFO));
MDIN3xx_SetMFCHYFilterCoef(&stVideo, NULL); // set default MFC filters
MDIN3xx_SetMFCHCFilterCoef(&stVideo, NULL);
MDIN3xx_SetMFCVYFilterCoef(&stVideo, NULL);
MDIN3xx_SetMFCVCFilterCoef(&stVideo, NULL);
// set aux display ON
stVideo.dspFLAG = MDIN_AUX_DISPLAY_ON | MDIN_AUX_FREEZE_OFF;
// set video path (main/aux/dac/enc)
stVideo.srcPATH = PATH_MAIN_A_AUX_M; // set main is A, aux is A , 01Aug2011
stVideo.dacPATH = DAC_PATH_AUX_4CH; // set 4ch mode , 01Aug2011
stVideo.encPATH = VENC_PATH_PORT_X; // set venc is aux
// if you need to front format conversion then set size.
// stVideo.ffcH_m = 1440;
// define video format of PORTA-INPUT
#if defined(SYSTEM_USE_4D1_IN)
//#if defined(NTSC_4D1_IN)
if ((video_mode == VDCNV_4CH_ON_NTSC) || (video_mode == VDCNV_4CH_ON_NTSC_960))
stVideo.stSRC_a.frmt = VIDSRC_720x480i60; // 08Aug2011
//#endif
//#if defined(PAL_4D1_IN)
else
stVideo.stSRC_a.frmt = VIDSRC_720x576i50; // 08Aug2011
//#endif
#endif
stVideo.stSRC_a.mode = MDIN_SRC_MUX656_8; // 01Aug2011
stVideo.stSRC_a.fine = MDIN_FIELDID_BYPASS | MDIN_LOW_IS_TOPFLD;
// define video format of MAIN-OUTPUT
#if defined(SYSTEM_USE_4D1_IN)
//#if defined(NTSC_4D1_IN)
if ((video_mode == VDCNV_4CH_ON_NTSC) || (video_mode == VDCNV_4CH_ON_NTSC_960))
stVideo.stOUT_m.frmt = VIDOUT_720x480p60; // 08Aug2011
//#endif
//#if defined(PAL_4D1_IN)
else
stVideo.stOUT_m.frmt = VIDOUT_720x576p50; // 08Aug2011
//#endif
#endif
stVideo.stOUT_m.mode = MDIN_OUT_YUV444_8; // 01Aug2011
stVideo.stOUT_m.fine = MDIN_SYNC_FREERUN; // set main outsync free-run
stVideo.stOUT_m.brightness = 128; // set main picture factor
stVideo.stOUT_m.contrast = 128;
stVideo.stOUT_m.saturation = 128;
stVideo.stOUT_m.hue = 128;
#if RGB_GAIN_OFFSET_TUNE == 1
stVideo.stOUT_m.r_gain = 128; // set main gain/offset
stVideo.stOUT_m.g_gain = 128;
stVideo.stOUT_m.b_gain = 128;
stVideo.stOUT_m.r_offset = 128;
stVideo.stOUT_m.g_offset = 128;
stVideo.stOUT_m.b_offset = 128;
#endif
// define video format of IPC-block
stVideo.stIPC_m.mode = MDIN_DEINT_ADAPTIVE;
stVideo.stIPC_m.film = MDIN_DEINT_FILM_ALL;
stVideo.stIPC_m.gain = 34;
if (video_mode == VDCNV_4CH_ON_NTSC_960)
{
stVideo.stIPC_m.fine = MDIN_DEINT_3DNR_OFF;
// define map of frame buffer
stVideo.stMAP_m.frmt = MDIN_MAP_AUX_ON_NR_OFF; // when MDIN_DEINT_3DNR_OFF
}
else
{
stVideo.stIPC_m.fine = MDIN_DEINT_3DNR_ON | MDIN_DEINT_CCS_ON;
stVideo.stMAP_m.frmt = MDIN_MAP_AUX_ON_NR_ON;
}
// define video format of PORTB-INPUT
stVideo.stSRC_b.frmt = VIDSRC_720x480i60;
stVideo.stSRC_b.mode = MDIN_SRC_MUX656_8;
stVideo.stSRC_b.fine = MDIN_FIELDID_INPUT | MDIN_LOW_IS_TOPFLD;
// define video format of AUX-OUTPUT
#if defined(SYSTEM_USE_4D1_IN) && defined(SYSTEM_USE_4D1_IN_QUADOUT) // for 4D1 input Quad output mode
// #if defined(NTSC_4D1_IN)
// stVideo.stOUT_x.frmt = VIDOUT_1920x1080p60; // for full screen output, 01Aug2011
if (video_mode == VDCNV_4CH_ON_NTSC)
{
stVideo.stOUT_x.frmt = VIDOUT_1600x1200p60; // for no scale(1:1) output (1440x960), 01Aug2011
}
else if (video_mode == VDCNV_4CH_ON_NTSC_960 )
stVideo.stOUT_x.frmt = VIDOUT_1920x1200pRB; // for no scale(1:1) output (1980x960), 26Oct2011
// #endif
// #if defined(PAL_4D1_IN)
// stVideo.stOUT_x.frmt = VIDOUT_1920x1080p50; // for full screen output, 01Aug2011
else {
stVideo.stOUT_x.frmt = VIDOUT_1600x1200p60; // for no scale(1:1) output (1440x1152), 01Aug2011
}
// #endif
// stVideo.stOUT_x.mode = MDIN_OUT_RGB444_8; //MDIN_EMB422_8 YUV422 // 01Aug2011
stVideo.stOUT_x.mode = MDIN_OUT_EMB422_8; //MDIN_OUT_EMB422_8 YUV422
#endif
#if defined(SYSTEM_USE_4D1_IN) && defined(SYSTEM_USE_4D1_IN_656OUT) // for 4D1 input BT656 output mode
stVideo.stOUT_x.frmt = VIDOUT_720x480i60;
stVideo.stOUT_x.mode = MDIN_OUT_MUX656_8;
#endif
stVideo.stOUT_x.fine = MDIN_SYNC_FREERUN; // set aux outsync free-run
stVideo.stOUT_x.brightness = 128; // set aux picture factor
stVideo.stOUT_x.contrast = 128;
stVideo.stOUT_x.saturation = 128;
stVideo.stOUT_x.hue = 128;
#if RGB_GAIN_OFFSET_TUNE == 1
stVideo.stOUT_x.r_gain = 128; // set aux gain/offset
stVideo.stOUT_x.g_gain = 128;
stVideo.stOUT_x.b_gain = 128;
stVideo.stOUT_x.r_offset = 128;
stVideo.stOUT_x.g_offset = 128;
stVideo.stOUT_x.b_offset = 128;
#endif
#if defined(SYSTEM_USE_4D1_IN)
// define video format of 4CH-display, 01Aug2011
stVideo.st4CH_x.chID = MDIN_4CHID_IN_SYNC; // set CH-ID extract
stVideo.st4CH_x.order = MDIN_4CHID_A1A2B1B2; // set CH-ID mapping
stVideo.st4CH_x.view = MDIN_4CHVIEW_ALL; // set 4CH view mode
#endif
// define video format of video encoder
stVideo.encFRMT = VID_VENC_NTSC_M;
// define video format of HDMI-OUTPUT
stVideo.stVID_h.mode = HDMI_OUT_RGB444_8;
stVideo.stVID_h.fine = HDMI_CLK_EDGE_RISE;
stVideo.stAUD_h.frmt = AUDIO_INPUT_I2S_0; // audio input format
stVideo.stAUD_h.freq = AUDIO_MCLK_256Fs | AUDIO_FREQ_48kHz; // sampling frequency
stVideo.stAUD_h.fine = AUDIO_MAX24B_MINUS0 | AUDIO_SD_JUST_LEFT | AUDIO_WS_POLAR_HIGH |
AUDIO_SCK_EDGE_RISE | AUDIO_SD_MSB_FIRST | AUDIO_SD_1ST_SHIFT;
MDINHTX_SetHDMIBlock(&stVideo); // initialize HDMI block
// define window for inter-area
stInterWND.lx = 315; stInterWND.rx = 405;
stInterWND.ly = 90; stInterWND.ry = 150;
MDIN3xx_SetDeintInterWND(&stInterWND, MDIN_INTER_BLOCK0);
MDIN3xx_EnableDeintInterWND(MDIN_INTER_BLOCK0, OFF);
// stVideo.exeFLAG = MDIN_UPDATE_MAINFMT; // execution of video process
stVideo.exeFLAG = MDIN_UPDATE_MAINFMT | MDIN_UPDATE_AUXFMT;
}
