void uart_tx_byte(int idx, unsigned char data) { int num_of_chars = 1; void *base = uart_board_param.uart_dm_base; /* Wait until transmit FIFO is empty. */ while (!(read32(MSM_BOOT_UART_DM_SR(base)) & MSM_BOOT_UART_DM_SR_TXEMT)) udelay(1); /* * TX FIFO is ready to accept new character(s). First write number of * characters to be transmitted. */ write32(MSM_BOOT_UART_DM_NO_CHARS_FOR_TX(base), num_of_chars); /* And now write the character(s) */ write32(MSM_BOOT_UART_DM_TF(base, 0), data); }
/* * UART transmit operation */ static unsigned int msm_boot_uart_dm_write(uint32_t base, char *data, unsigned int num_of_chars) { unsigned int tx_word_count = 0; unsigned int tx_char_left = 0, tx_char = 0; unsigned int tx_word = 0; int i = 0; char *tx_data = NULL; char new_data[1024]; if ((data == NULL) || (num_of_chars <= 0)) { return MSM_BOOT_UART_DM_E_INVAL; } /* Replace line-feed (/n) with carriage-return + line-feed (/r/n) */ msm_boot_uart_replace_lr_with_cr(data, num_of_chars, new_data, &i); tx_data = new_data; num_of_chars = i; /* Write to NO_CHARS_FOR_TX register number of characters * to be transmitted. However, before writing TX_FIFO must * be empty as indicated by TX_READY interrupt in IMR register */ /* Check if transmit FIFO is empty. * If not we'll wait for TX_READY interrupt. */ if (!(readl(MSM_BOOT_UART_DM_SR(base)) & MSM_BOOT_UART_DM_SR_TXEMT)) { while (!(readl(MSM_BOOT_UART_DM_ISR(base)) & MSM_BOOT_UART_DM_TX_READY)) { udelay(1); /* Kick watchdog? */ } } /* We are here. FIFO is ready to be written. */ /* Write number of characters to be written */ writel(num_of_chars, MSM_BOOT_UART_DM_NO_CHARS_FOR_TX(base)); /* Clear TX_READY interrupt */ writel(MSM_BOOT_UART_DM_GCMD_RES_TX_RDY_INT, MSM_BOOT_UART_DM_CR(base)); /* We use four-character word FIFO. So we need to divide data into * four characters and write in UART_DM_TF register */ tx_word_count = (num_of_chars % 4) ? ((num_of_chars / 4) + 1) : (num_of_chars / 4); tx_char_left = num_of_chars; for (i = 0; i < (int)tx_word_count; i++) { tx_char = (tx_char_left < 4) ? tx_char_left : 4; PACK_CHARS_INTO_WORDS(tx_data, tx_char, tx_word); /* Wait till TX FIFO has space */ while (!(readl(MSM_BOOT_UART_DM_SR(base)) & MSM_BOOT_UART_DM_SR_TXRDY)) { udelay(1); } /* TX FIFO has space. Write the chars */ writel(tx_word, MSM_BOOT_UART_DM_TF(base, 0)); tx_char_left = num_of_chars - (i + 1) * 4; tx_data = tx_data + 4; } return MSM_BOOT_UART_DM_E_SUCCESS; }