//------------------------------------------------------------------------------
//
// Function: OALIoCtlHalInitRTC
//
// This function is called by WinCE OS to initialize the time after boot.
// Input buffer contains SYSTEMTIME structure with default time value.
// If hardware has persistent real time clock it will ignore this value
// (or all call).
//
BOOL OALIoCtlHalInitRTC(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize
) {
BOOL rc = FALSE;
SYSTEMTIME *pTime = (SYSTEMTIME*)pInpBuffer;
OALMSG(OAL_IOCTL&&OAL_FUNC, (L"+OALIoCtlHalInitRTC(...)\r\n"));
// Validate inputs
if (pInpBuffer == NULL || inpSize < sizeof(SYSTEMTIME)) {
NKSetLastError(ERROR_INVALID_PARAMETER);
OALMSG(OAL_ERROR, (
L"ERROR: OALIoCtlHalInitRTC: Invalid parameter\r\n"
));
goto cleanUp;
}
// Add static mapping for RTC alarm
OALIntrStaticTranslate(SYSINTR_RTC_ALARM, IRQ_RTC);
// Set time
rc = OEMSetRealTime(pTime);
cleanUp:
OALMSG(OAL_IOCTL&&OAL_FUNC, (L"-OALIoCtlHalInitRTC(rc = %d)\r\n", rc));
return rc;
}
//------------------------------------------------------------------------------
//
// Function: OALIoCtlHalInitRTC
//
// This function is called by WinCE OS to initialize the time after boot.
// Input buffer contains SYSTEMTIME structure with default time value.
// If hardware has persistent real time clock it will ignore this value
// (or all call).
//
BOOL OALIoCtlHalInitRTC(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize,
VOID *pOutBuffer, UINT32 outSize, UINT32 *pOutSize)
{
BOOL rc = FALSE;
BOOL bResetRTC = FALSE;
SYSTEMTIME SysTime;
OALMSG(OAL_IOCTL&&OAL_FUNC, (L"+OALIoCtlHalInitRTC(...)\r\n"));
// Validate inputs
if (pInpBuffer == NULL || inpSize < sizeof(SYSTEMTIME)) {
NKSetLastError(ERROR_INVALID_PARAMETER);
OALMSG(OAL_ERROR, (
L"ERROR: OALIoCtlHalInitRTC: Invalid parameter\r\n"
));
goto cleanUp;
}
// Initialize critical section for RTC functions.
InitializeCriticalSection(&g_oalRTCcs);
g_oalRTCcsInit = 1;
// Add static mapping for RTC alarm
OALIntrStaticTranslate(SYSINTR_RTC_ALARM, IRQ_RTC_ALARM);
OEMGetRealTime(&SysTime);
/* RTC Time validity check */
bResetRTC = (SysTime.wYear < RTC_YEAR_DATUM || (SysTime.wYear - RTC_YEAR_DATUM) > 99) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wMonth > 12 || SysTime.wMonth < 1) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wDay > 31 || SysTime.wDay < 1) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wDayOfWeek > 6 || SysTime.wDayOfWeek < 0) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wHour > 23 || SysTime.wHour < 0) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wMinute > 59 || SysTime.wMinute < 0) ? TRUE : bResetRTC;
bResetRTC = (SysTime.wSecond > 59 || SysTime.wSecond < 0) ? TRUE : bResetRTC;
if(bResetRTC)
{
OALMSG(OAL_RTC&&OAL_ERROR,(L"Invalid RTC Time (%d.%d.%d, %d:%d:%d, (%d th day of week)\r\n", \
SysTime.wYear, SysTime.wMonth, SysTime.wDay, \
SysTime.wHour, SysTime.wMinute, SysTime.wSecond, \
SysTime.wDayOfWeek
));
}
// Set time
if(bResetRTC)
{
rc = OEMSetRealTime(&g_oalRtcResetTime);
}
cleanUp:
OALMSG(OAL_IOCTL&&OAL_FUNC, (L"-OALIoCtlHalInitRTC(rc = %d)\r\n", rc));
return rc;
}
//------------------------------------------------------------------------------
//
// Function: BSPIntrInit
//
// This function is called from OALIntrInit to initialize secondary interrupt
// controller.
//
BOOL BSPIntrInit()
{
UINT8 *pPIC1Edge, *pPIC2Edge;
UINT32 irq;
OALMSG(OAL_INTR&&OAL_FUNC, (L"+BSPIntrInit\r\n"));
// Add static mapping for on chip devices...
OALIntrStaticTranslate(SYSINTR_FIRMWARE + 0, IRQ_UART1); // UART1
// Add GPIO static mapping for RTC alarm
OALIntrStaticTranslate(SYSINTR_RTC_ALARM, IRQ_GPIO);
// And enable it (it will not occur until it is set in OEMSetAlarmTime)
irq = IRQ_GPIO; OALIntrEnableIrqs(1, &irq);
// Get and save uncached virtual addresses for VRC5477 and PIC1/PIC2
g_pVRC5477Regs = OALPAtoUA(VRC5477_REG_PA);
g_pPIC1Regs = OALPAtoUA(BSP_REG_PA_M1535_PIC1);
g_pPIC2Regs = OALPAtoUA(BSP_REG_PA_M1535_PIC2);
// M1535+ INTR uses positive logic (active on high), set VRC5477
CLRPORT32(&g_pVRC5477Regs->INTPPES0, 1 << 4);
// We have to enable PCI interrupts
irq = IRQ_INTA; OALIntrEnableIrqs(1, &irq);
irq = IRQ_INTB; OALIntrEnableIrqs(1, &irq);
irq = IRQ_INTC; OALIntrEnableIrqs(1, &irq);
irq = IRQ_INTD; OALIntrEnableIrqs(1, &irq);
// PIC1/PIC2 edge registers are needed only for initialization
pPIC1Edge = OALPAtoUA(BSP_REG_PA_M1535_EDGE1);
pPIC2Edge = OALPAtoUA(BSP_REG_PA_M1535_EDGE2);
// Initialize the 8259 PIC1
OUTREG8(&g_pPIC1Regs->ctrl, 0x11); // ICW1, cascade & ICW4
OUTREG8(&g_pPIC1Regs->mask, IRQ_PIC_0); // ICW2, vector to 32
OUTREG8(&g_pPIC1Regs->mask, 0x04); // ICW3, slave on IRQ 2
OUTREG8(&g_pPIC1Regs->mask, 0x01); // ICW4, normal EOI
OUTREG8(&g_pPIC1Regs->ctrl, 0x0B); // OCW2, read IS register
OUTREG8(&g_pPIC1Regs->mask, 0xFF); // OCW1, all disabled
// Now initialize the 8259 PIC2
OUTREG8(&g_pPIC2Regs->ctrl, 0x11); // ICW1, cascade & ICW4
OUTREG8(&g_pPIC2Regs->mask, IRQ_PIC_8); // ICW2, vector to 40
OUTREG8(&g_pPIC2Regs->mask, 0x02); // ICW3, we are IRQ 2
OUTREG8(&g_pPIC2Regs->mask, 0x01); // ICW4, normal EOI
OUTREG8(&g_pPIC2Regs->ctrl, 0x0B); // OCW2, read IS register
OUTREG8(&g_pPIC2Regs->mask, 0xFF); // OCW1, all disabled
// IRQ0-IRQ7 Edge sensitive(IRQ2 cannot be set to level sensitive)
OUTREG8(pPIC1Edge, 0x00);
// IRQ9&IRQ11 level (USB host, PCI INTC), other edge sensitive
OUTREG8(pPIC2Edge, 0x0A);
// Enable interrupt from PIC2 on PIC1
CLRREG8(&g_pPIC1Regs->mask, 1 << 2);
// Set static interrupt mappings for legacy devices
OALIntrStaticTranslate(SYSINTR_FIRMWARE + 8, IRQ_PIC_1); // keyboard
OALIntrStaticTranslate(SYSINTR_FIRMWARE + 9, IRQ_PIC_12); // mouse
// We are done
OALMSG(OAL_INTR&&OAL_FUNC, (L"-BSPIntrInit(rc = 1)\r\n"));
return TRUE;
}
