void main(void)
{
INT32 nRet;
OEMWriteDebugLED(0, 0x0);
// Set up the copy section data.
if (!SetupCopySection(pTOC))
{
while(1);
}
// Clear LEDs.
OEMWriteDebugLED(0, 0x0);
OEMInitDebugSerial();
OEMWriteDebugString(L" [NBL2] main() Starts !\r\n");
OEMWriteDebugString(L" [NBL2] Serial Initialized...\r\n");
nRet = FIL_Init();
if (nRet != FIL_SUCCESS)
{
OEMWriteDebugString(L" [NBL2:ERR] FIL_Init() : Failed\r\n");
while(1);
}
OEMWriteDebugString(L" [NBL2] FIL_Init() : Passed\r\n");
ShadowEboot();
OEMWriteDebugString(L" [NBL2] Launch Eboot...\r\n");
OEMLaunchImage(EBOOT_VIRTUAL_BASEADDR);
}
///////////////////////////////////////////////////////////////////////////////
// Required OEM IPL routines.
///////////////////////////////////////////////////////////////////////////////
// --- These are used by iplcommon (start) ---
BOOLEAN OEMIPLInit(void)
{
// Initialize the UART.
//
OEMInitDebugSerial();
OALLog(L"\r\nMicrosoft Windows CE IPL for SMDK6410 Ref board\r\n");
// Set the flash address
g_ulFlashBase = NAND_FLASH_START_UA;
// Messaging handler callback.
//
g_pfnMessageHandler = OEMMessageHandler;
// Check if Current ARM speed is not matched to Target Arm speed
// then To get speed up, set Voltage
#if (APLL_CLK == CLK_1332MHz)
LTC3714_Init();
LTC3714_VoltageSet(1,1200,100); // ARM
LTC3714_VoltageSet(2,1300,100); // INT
#elif (APLL_CLK == CLK_800MHz)
LTC3714_Init();
LTC3714_VoltageSet(1,1300,100); // ARM
LTC3714_VoltageSet(2,1200,100); // INT
#endif
return(TRUE);
}
void S3C6400UART_PowerOn(void)
{
UINT32 DivSlot;
float Div;
OEMInitDebugSerial(); // for What ???
KITLOutputDebugString ("[KITL] S3C6400UART_PowerOn()\r\n");
if (KitlIoPortBase == S3C6400_BASE_REG_PA_UART0)
{
// UART0 Clock Enable
g_pSysConReg->PCLK_GATE |= (1<<1); // UART0
g_pSysConReg->SCLK_GATE |= (1<<5); // UART0~3
// UART0 Port Initialize (RXD0 : GPA0, TXD0: GPA1)
g_pGPIOReg->GPACON = (g_pGPIOReg->GPACON & ~(0xff<<0)) | (0x22<<0); // GPA0->RXD0, GPA1->TXD0
g_pGPIOReg->GPAPUD = (g_pGPIOReg->GPAPUD & ~(0xf<<0)) | (0x1<<0); // RXD0: Pull-down, TXD0: pull up/down disable
}
else if (KitlIoPortBase == S3C6400_BASE_REG_PA_UART1)
{
// UART1 Clock Enable
g_pSysConReg->PCLK_GATE |= (1<<2); // UART1
g_pSysConReg->SCLK_GATE |= (1<<5); // UART0~3
// UART1 Port Initialize (RXD1 : GPA4, TXD1: GPA5)
g_pGPIOReg->GPACON = (g_pGPIOReg->GPACON & ~(0xff<<16)) | (0x22<<16); // GPA4->RXD1, GPA5->TXD1
g_pGPIOReg->GPAPUD = (g_pGPIOReg->GPAPUD & ~(0xf<<8)) | (0x1<<8); // RXD1: Pull-down, TXD1: pull up/down disable
}
else if (KitlIoPortBase == S3C6400_BASE_REG_PA_UART2)
{
// UART2 Clock Enable
g_pSysConReg->PCLK_GATE |= (1<<3); // UART2
g_pSysConReg->SCLK_GATE |= (1<<5); // UART0~3
// UART2 Port Initialize (RXD2 : GPB0, TXD2: GPB1)
g_pGPIOReg->GPBCON = (g_pGPIOReg->GPBCON & ~(0xff<<0)) | (0x22<<0); // GPB0->RXD2, GPB1->TXD2
g_pGPIOReg->GPBPUD = (g_pGPIOReg->GPBPUD & ~(0xf<<0)) | (0x1<<0); // RXD2: Pull-down, TXD2: pull up/down disable
}
else if (KitlIoPortBase == S3C6400_BASE_REG_PA_UART3)
{
// UART3 Clock Enable
g_pSysConReg->PCLK_GATE |= (1<<4); // UART3
g_pSysConReg->SCLK_GATE |= (1<<5); // UART0~3
// UART3 Port Initialize (RXD3 : GPB2, TXD3: GPB3)
g_pGPIOReg->GPBCON = (g_pGPIOReg->GPBCON & ~(0xff<<8)) | (0x22<<8); // GPB2->RXD3, GPB3->TXD3
g_pGPIOReg->GPBPUD = (g_pGPIOReg->GPBPUD & ~(0xf<<4)) | (0x1<<4); // RXD3: Pull-down, TXD3: pull up/down disable
}
// Initialize UART
//
g_pUARTReg->ULCON = (0<<6)|(0<<3)|(0<<2)|(3<<0); // Normal Mode, No Parity, 1 Stop Bit, 8 Bit Data
g_pUARTReg->UCON = (0<<10)|(1<<9)|(1<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0); // PCLK divide, Polling Mode
g_pUARTReg->UFCON = (0<<6)|(0<<4)|(0<<2)|(0<<1)|(0<<0); // Disable FIFO
g_pUARTReg->UMCON = (0<<5)|(0<<4)|(0<<0); // Disable Auto Flow Control
Div = (float)((float)S3C6400_PCLK/(16.0*(float)CBR_115200)) - 1;
DivSlot = (UINT32)((Div-(int)Div)*16);
g_pUARTReg->UBRDIV = (UINT32)Div;
g_pUARTReg->UDIVSLOT = aSlotTable[DivSlot];
}
void main(void)
{
OEMInitDebugSerial();
OALMSG(TRUE,(TEXT("IPLmain\r\n")));
//InitializeDisplay();
OALMSG(OAL_ERROR, (TEXT("Start: IPLmain start \r\n")));
IPLmain();
}
//------------------------------------------------------------------------------
//
// Function: OEMPowerOff
//
// Description: Called when the system is to transition to it's lowest power mode (off)
//
//
void OEMPowerOff()
{
volatile S3C6400_SYSCON_REG *pSysConReg;
volatile S3C6400_GPIO_REG *pGPIOReg;
volatile S3C6400_VIC_REG *pVIC0Reg;
volatile S3C6400_VIC_REG *pVIC1Reg;
volatile S3C6400_DMAC_REG *pDMAC0Reg;
volatile S3C6400_DMAC_REG *pDMAC1Reg;
int nIndex = 0;
OALMSG(TRUE, (L"[OEM] ++OEMPowerOff()"));
#if 0 // KITL can not support Sleep
// Make sure that KITL is powered off
pArgs = (OAL_KITL_ARGS*)OALArgsQuery(OAL_ARGS_QUERY_KITL);
if ((pArgs->flags & OAL_KITL_FLAGS_ENABLED) != 0)
{
OALKitlPowerOff();
OALMSG(1, (L"OEMPowerOff: KITL Disabled\r\n"));
}
#endif
//-----------------------------
// Disable DVS and Set to Full Speed
//-----------------------------
#ifdef DVS_EN
ChangeDVSLevel(SYS_L0);
#endif
//-----------------------------
// Prepare Specific Actions for Sleep
//-----------------------------
BSPPowerOff();
//------------------------------
// Prepare CPU Entering Sleep Mode
//------------------------------
//----------------
// Map SFR Address
//----------------
pSysConReg = (S3C6400_SYSCON_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_SYSCON, FALSE);
pGPIOReg = (S3C6400_GPIO_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_GPIO, FALSE);
pVIC0Reg = (S3C6400_VIC_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_VIC0, FALSE);
pVIC1Reg = (S3C6400_VIC_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_VIC1, FALSE);
pDMAC0Reg = (S3C6400_DMAC_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_DMA0, FALSE);
pDMAC1Reg = (S3C6400_DMAC_REG *)OALPAtoVA(S3C6400_BASE_REG_PA_DMA1, FALSE);
//------------------
// Save VIC Registers
//------------------
S3C6400_SaveState_VIC((void *)pVIC0Reg, (void *)pVIC1Reg, g_aSleepSave_VIC);
// Disable All Interrupt
pVIC0Reg->VICINTENCLEAR = 0xFFFFFFFF;
pVIC1Reg->VICINTENCLEAR = 0xFFFFFFFF;
pVIC0Reg->VICSOFTINTCLEAR = 0xFFFFFFFF;
pVIC1Reg->VICSOFTINTCLEAR = 0xFFFFFFFF;
//--------------------
// Save DMAC Registers
//--------------------
S3C6400_SaveState_DMACon((void *)pDMAC0Reg, g_aSleepSave_DMACon0);
S3C6400_SaveState_DMACon((void *)pDMAC1Reg, g_aSleepSave_DMACon1);
//------------------
// Save GPIO Register
//------------------
S3C6400_SaveState_GPIO((void *)pGPIOReg, g_aSleepSave_GPIO);
//--------------------
// Save SysCon Register
//--------------------
S3C6400_SaveState_SysCon((void *)pSysConReg, g_aSleepSave_SysCon);
//-------------------------------------------------------
// Unmask Clock Gating and Block Power turn On (SW workaround)
//-------------------------------------------------------
// HCLK_IROM, HCLK_MEM1, HCLK_MEM0, HCLK_MFC Should be Always On for power Mode (Something coupled with BUS operation)
//pSysConReg->HCLK_GATE |= ((1<<25)|(1<<22)|(1<<21)|(1<<0));
pSysConReg->HCLK_GATE = 0xFFFFFFFF;
pSysConReg->PCLK_GATE = 0xFFFFFFFF;
pSysConReg->SCLK_GATE = 0xFFFFFFFF;
// Turn On All Block Block Power
pSysConReg->NORMAL_CFG = 0xFFFFFF00;
// Wait for Block Power Stable
while((pSysConReg->BLK_PWR_STAT & 0x7E) != 0x7E);
//----------------------------
// Wake Up Source Configuration
//----------------------------
S3C6400_WakeUpSource_Configure();
//-------------------------------
// Extra work for Entering Sleep Mode
//-------------------------------
// USB Power Control
pSysConReg->OTHERS &= ~(1<<16); // USB Signal Mask Clear
pGPIOReg->SPCON |= (1<<3); // USB Tranceiver PAD to Suspend
// TODO: SPCONSLP ???
//pGPIOReg->SPCONSLP; // Use Default Valie
//-------------------------------
// GPIO Configuration for Sleep State
//-------------------------------
// TODO: Configure GPIO at Sleep
//BSPConfigGPIOforPowerOff();
// Sleep Mode Pad Configuration
pGPIOReg->SLPEN = 0x2; // Controlled by SLPEN Bit (You Should Clear SLPEN Bit in Wake Up Process...)
//-----------------------
// CPU Entering Sleep Mode
//-----------------------
OALCPUPowerOff(); // Now in Sleep
//----------------------------
// CPU Wake Up from Sleep Mode
//----------------------------
//----------------------------
// Wake Up Source Determine
//----------------------------
S3C6400_WakeUpSource_Detect();
// USB Power Control
pSysConReg->OTHERS |= (1<<16); // TODO: USB Signal Mask Set (Device must handle it...)
pGPIOReg->SPCON &= ~(1<<3); // USB Tranceiver PAD to Normal
// Restore SysCon Register
S3C6400_RestoreState_SysCon((void *)pSysConReg, g_aSleepSave_SysCon);
// Restore GPIO Register
S3C6400_RestoreState_GPIO((void *)pGPIOReg, g_aSleepSave_GPIO);
// Sleep Mode Pad Configuration
pGPIOReg->SLPEN = 0x2; // Clear SLPEN Bit for Pad back to Normal Mode
//-----------------------
// Restore DMAC Registers
//-----------------------
S3C6400_RestoreState_DMACon((void *)pDMAC0Reg, g_aSleepSave_DMACon0);
S3C6400_RestoreState_DMACon((void *)pDMAC1Reg, g_aSleepSave_DMACon1);
// Restore VIC Registers
S3C6400_RestoreState_VIC((void *)pVIC0Reg, (void *)pVIC1Reg, g_aSleepSave_VIC);
//pVIC0Reg->VICADDRESS = 0x0;
//pVIC1Reg->VICADDRESS = 0x0;
// UART Debug Port Initialize
OEMInitDebugSerial();
// Disable Vectored Interrupt Mode on CP15
System_DisableVIC();
// Enable Branch Prediction on CP15
System_EnableBP();
// Enable IRQ Interrupt on CP15
System_EnableIRQ();
// Enable FIQ Interrupt on CP15
System_EnableFIQ();
if (g_oalWakeSource == SYSWAKE_UNKNOWN)
{
OALMSG(TRUE, (L"[OEM:ERR] OEMPowerOff() : SYSWAKE_UNKNOWN , WAKEUP_STAT = 0x%08x", g_LastWakeupStatus));
}
// Initialize System Timer
OEMInitializeSystemTimer(RESCHED_PERIOD, OEM_COUNT_1MS, 0);
#if 0 // KITL can not support Sleep
// Reinitialize KITL
if ((pArgs->flags & OAL_KITL_FLAGS_ENABLED) != 0)
{
OALKitlPowerOn();
}
#endif
//--------------------------------------
// Post Processing Specific Actions for Wake Up
//--------------------------------------
BSPPowerOn();
OALMSG(TRUE, (L"[OEM] --OEMPowerOff()"));
}
//------------------------------------------------------------------------------
//
// Function: OEMPowerOff
//
// Description: Called when the system is to transition to it's lowest power mode (off)
//
//
void OEMPowerOff()
{
volatile S3C6410_SYSCON_REG *pSysConReg;
volatile S3C6410_GPIO_REG *pGPIOReg;
volatile S3C6410_VIC_REG *pVIC0Reg;
volatile S3C6410_VIC_REG *pVIC1Reg;
volatile S3C6410_DMAC_REG *pDMAC0Reg;
volatile S3C6410_DMAC_REG *pDMAC1Reg;
volatile OTG_PHY_REG *pOtgPhyReg;
OAL_KITL_ARGS *pArgs;
BOOL PowerStateOn;
int nIndex = 0;
OALMSG(TRUE, (L"[OEM] ++OEMPowerOff()"));
// Make sure that KITL is powered off
pArgs = (OAL_KITL_ARGS*)OALArgsQuery(OAL_ARGS_QUERY_KITL);
if (pArgs && ((pArgs->flags & OAL_KITL_FLAGS_ENABLED) != 0))
{
PowerStateOn = FALSE;
KITLIoctl (IOCTL_KITL_POWER_CALL, &PowerStateOn, sizeof(PowerStateOn), NULL, 0, NULL);
OALMSG(OAL_VERBOSE, (L"OEMPowerOff: KITL Disabled\r\n"));
}
//-----------------------------
// Prepare Specific Actions for Sleep
//-----------------------------
BSPPowerOff();
//------------------------------
// Prepare CPU Entering Sleep Mode
//------------------------------
//----------------
// Map SFR Address
//----------------
pSysConReg = (S3C6410_SYSCON_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_SYSCON, FALSE);
pGPIOReg = (S3C6410_GPIO_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_GPIO, FALSE);
pVIC0Reg = (S3C6410_VIC_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_VIC0, FALSE);
pVIC1Reg = (S3C6410_VIC_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_VIC1, FALSE);
pDMAC0Reg = (S3C6410_DMAC_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_DMA0, FALSE);
pDMAC1Reg = (S3C6410_DMAC_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_DMA1, FALSE);
pOtgPhyReg = (OTG_PHY_REG *)OALPAtoVA(S3C6410_BASE_REG_PA_USBOTG_PHY, FALSE);
//------------------
// Save VIC Registers
//------------------
S3C6410_SaveState_VIC((void *)pVIC0Reg, (void *)pVIC1Reg, g_aSleepSave_VIC);
// Disable All Interrupt
pVIC0Reg->VICINTENCLEAR = 0xFFFFFFFF;
pVIC1Reg->VICINTENCLEAR = 0xFFFFFFFF;
pVIC0Reg->VICSOFTINTCLEAR = 0xFFFFFFFF;
pVIC1Reg->VICSOFTINTCLEAR = 0xFFFFFFFF;
//--------------------
// Save DMAC Registers
//--------------------
S3C6410_SaveState_DMACon((void *)pDMAC0Reg, g_aSleepSave_DMACon0);
S3C6410_SaveState_DMACon((void *)pDMAC1Reg, g_aSleepSave_DMACon1);
//------------------
// Save GPIO Register
//------------------
S3C6410_SaveState_GPIO((void *)pGPIOReg, g_aSleepSave_GPIO);
//--------------------
// Save SysCon Register
//--------------------
S3C6410_SaveState_SysCon((void *)pSysConReg, g_aSleepSave_SysCon);
//---------------------------------------------------------------------------
// Unmask Clock Gating for All IPsand Block Power turn On for the IPs not going to sleep
//---------------------------------------------------------------------------
// HCLK_IROM, HCLK_MEM1, HCLK_MEM0, HCLK_MFC Should be Always On for power Mode (Something coupled with BUS operation)
//pSysConReg->HCLK_GATE |= ((1<<25)|(1<<22)|(1<<21)|(1<<0));
pSysConReg->HCLK_GATE = 0xFFFFFFFF;
pSysConReg->PCLK_GATE = 0xFFFFFFFF;
pSysConReg->SCLK_GATE = 0xFFFFFFFF;
// Turn On All Block Block Power
pSysConReg->NORMAL_CFG = 0xFFFFFF00;
// Wait for Block Power Stable
while((pSysConReg->BLK_PWR_STAT & 0x7E) != 0x7E);
//----------------------------
// Wake Up Source Configuration
//----------------------------
// S3C6410_WakeUpSource_Configure();
//-------------------------------
// Extra work for Entering Sleep Mode
//-------------------------------
// USB Power Control
pSysConReg->OTHERS &= ~(1<<16); // USB Signal Mask Clear
pGPIOReg->SPCON |= (1<<3); // USB Tranceiver PAD to Suspend
#ifdef _IROM_SDMMC_
// Sleep Mode Pad Configuration. HSJANG 070926. SLPEN must be 0 to change cpcon value for reading OM.
#else
// Sleep Mode Pad Configuration
pGPIOReg->SLPEN = 0x2; // Controlled by SLPEN Bit (You Should Clear SLPEN Bit in Wake Up Process...)
#endif
//-----------------------
// CPU Entering Sleep Mode
//-----------------------
OALCPUPowerOff(); // Now in Sleep
//----------------------------
// CPU Wake Up from Sleep Mode
//----------------------------
// Restore SysCon Register
S3C6410_RestoreState_SysCon((void *)pSysConReg, g_aSleepSave_SysCon);
// Restore GPIO Register
S3C6410_RestoreState_GPIO((void *)pGPIOReg, g_aSleepSave_GPIO);
#ifdef _IROM_SDMMC_
// Sleep Mode Pad Configuration. HSJANG 070926. SLPEN must be 0 to change cpcon value for reading OM.
#else
// Sleep Mode Pad Configuration
pGPIOReg->SLPEN = 0x2; // Clear SLPEN Bit for Pad back to Normal Mode
#endif
//-----------------------
// Restore DMAC Registers
//-----------------------
S3C6410_RestoreState_DMACon((void *)pDMAC0Reg, g_aSleepSave_DMACon0);
S3C6410_RestoreState_DMACon((void *)pDMAC1Reg, g_aSleepSave_DMACon1);
// Restore VIC Registers
S3C6410_RestoreState_VIC((void *)pVIC0Reg, (void *)pVIC1Reg, g_aSleepSave_VIC);
// UART Debug Port Initialize
OEMInitDebugSerial();
// Disable Vectored Interrupt Mode on CP15
System_DisableVIC();
// Enable Branch Prediction on CP15
System_EnableBP();
// Enable IRQ Interrupt on CP15
System_EnableIRQ();
// Enable FIQ Interrupt on CP15
System_EnableFIQ();
// Initialize System Timer
OEMInitializeSystemTimer(RESCHED_PERIOD, OEM_COUNT_1MS, 0);
// USB Power Control
InitializeOTGCLK(); // pll_powerdown, suspend mode
pGPIOReg->SPCON &= ~(1<<3); // USB Tranceiver PAD to Normal
//--------------------------------------
// Post Processing Specific Actions for Wake Up
//--------------------------------------
BSPPowerOn();
// Reinitialize KITL
if (pArgs && ((pArgs->flags & OAL_KITL_FLAGS_ENABLED) != 0))
{
PowerStateOn = TRUE;
KITLIoctl (IOCTL_KITL_POWER_CALL, &PowerStateOn, sizeof(PowerStateOn), NULL, 0, NULL);
}
OALMSG(TRUE, (L"[OEM] --OEMPowerOff()"));
}
