/**
Calling this function causes the system to enter a power state equivalent
to the ACPI G2/S5 or G3 states.
System shutdown should not return, if it returns, it means the system does
not support shut down reset.
**/
VOID
EFIAPI
ResetShutdown (
VOID
)
{
//
// Reference to QuarkNcSocId BWG
// Disable RTC Alarm : (RTC Enable at PM1BLK + 02h[10]))
//
IoWrite16 (PcdGet16 (PcdPm1blkIoBaseAddress) + R_QNC_PM1BLK_PM1E, 0);
//
// Firstly, GPE0_EN should be disabled to
// avoid any GPI waking up the system from S5
//
IoWrite32 ((UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF) + R_QNC_GPE0BLK_GPE0E, 0);
//
// Reference to QuarkNcSocId BWG
// Disable Resume Well GPIO : (GPIO bits in GPIOBASE + 34h[8:0])
//
IoWrite32 (PcdGet16 (PcdGbaIoBaseAddress) + R_QNC_GPIO_RGGPE_RESUME_WELL, 0);
//
// No power button status bit to clear for our platform, go to next step.
//
//
// Finally, transform system into S5 sleep state
//
IoAndThenOr32 (PcdGet16 (PcdPm1blkIoBaseAddress) + R_QNC_PM1BLK_PM1C, 0xffffc3ff, B_QNC_PM1BLK_PM1C_SLPEN | V_S5);
}
/**
Internal function to retrieve the ACPI I/O Port Base Address.
Internal function to retrieve the ACPI I/O Port Base Address.
@return The 16-bit ACPI I/O Port Base Address.
**/
UINT16
InternalAcpiGetAcpiTimerIoPort (
VOID
)
{
UINT16 Port;
Port = PcdGet16 (PcdAcpiIoPortBaseAddress);
//
// If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then
// read the PCI register for the ACPI BAR value in case the BAR has been programmed to a
// value other than PcdAcpiIoPortBaseAddress
//
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {
Port = PciRead16 (PCI_LIB_ADDRESS (
PcdGet8 (PcdAcpiIoPciBusNumber),
PcdGet8 (PcdAcpiIoPciDeviceNumber),
PcdGet8 (PcdAcpiIoPciFunctionNumber),
PcdGet16 (PcdAcpiIoPciBarRegisterOffset)
));
}
return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);
}
/**
Create the first memory status code GUID'ed HOB as initialization for memory status code worker.
@retval EFI_SUCCESS The GUID'ed HOB is created successfully.
**/
EFI_STATUS
MemoryStatusCodeInitializeWorker (
VOID
)
{
//
// Create memory status code GUID'ed HOB.
//
MEMORY_STATUSCODE_PACKET_HEADER *PacketHeader;
//
// Build GUID'ed HOB with PCD defined size.
//
PacketHeader = BuildGuidHob (
&gMemoryStatusCodeRecordGuid,
PcdGet16 (PcdStatusCodeMemorySize) * 1024 + sizeof (MEMORY_STATUSCODE_PACKET_HEADER)
);
ASSERT (PacketHeader != NULL);
PacketHeader->MaxRecordsNumber = (PcdGet16 (PcdStatusCodeMemorySize) * 1024) / sizeof (MEMORY_STATUSCODE_RECORD);
PacketHeader->PacketIndex = 0;
PacketHeader->RecordIndex = 0;
return EFI_SUCCESS;
}
/**
Clear SMI related chipset status and re-enable SMI by setting the EOS bit.
@retval EFI_SUCCESS The requested operation has been carried out successfully
@retval EFI_DEVICE_ERROR The EOS bit could not be set.
**/
EFI_STATUS
SmmClear (
VOID
)
{
UINT16 PM1BLK_Base;
UINT16 GPE0BLK_Base;
//
// Get PM1BLK_Base & GPE0BLK_Base
//
PM1BLK_Base = PcdGet16 (PcdPm1blkIoBaseAddress);
GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);
//
// Clear the Power Button Override Status Bit, it gates EOS from being set.
// In QuarkNcSocId - Bit is read only. Handled by external SMC, do nothing.
//
//
// Clear the APM SMI Status Bit
//
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_APM);
//
// Set the EOS Bit
//
IoOr32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_EOS);
return EFI_SUCCESS;
}
EFI_STATUS
GetAllQncPmBase (
IN EFI_SMM_SYSTEM_TABLE2 *Smst
)
/*++
Routine Description:
Get QNC chipset LPC Power Management I/O Base at runtime.
Arguments:
Smst - The standard SMM system table.
Returns:
EFI_SUCCESS - Successfully init the device.
Other - Error occured whening calling Dxe lib functions.
--*/
{
mAcpiSmm.QncPmBase = PciRead16 (PCI_LIB_ADDRESS(PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, R_QNC_LPC_PM1BLK)) & B_QNC_LPC_PM1BLK_MASK;
mAcpiSmm.QncGpe0Base = PciRead16 (PCI_LIB_ADDRESS(PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, 0, R_QNC_LPC_GPE0BLK)) & B_QNC_LPC_GPE0BLK_MASK;
//
// Quark does not support Changing Primary SoC IOBARs from what was
// setup in SEC/PEI UEFI stages.
//
ASSERT (mAcpiSmm.QncPmBase == (UINT32) PcdGet16 (PcdPm1blkIoBaseAddress));
ASSERT (mAcpiSmm.QncGpe0Base == (UINT32) PcdGet16 (PcdGpe0blkIoBaseAddress));
return EFI_SUCCESS;
}
/**
Display a single file to StdOut.
If both Ascii and UCS2 are FALSE attempt to discover the file type.
@param[in] Handle The handle to the file to display.
@param[in] Ascii TRUE to force ASCII, FALSE othewise.
@param[in] UCS2 TRUE to force UCS2, FALSE othewise.
@retval EFI_OUT_OF_RESOURCES A memory allocation failed.
@retval EFI_SUCCESS The operation was successful.
**/
EFI_STATUS
EFIAPI
TypeFileByHandle (
IN EFI_HANDLE Handle,
BOOLEAN Ascii,
BOOLEAN UCS2
)
{
UINTN ReadSize;
VOID *Buffer;
EFI_STATUS Status;
UINTN LoopVar;
CHAR16 AsciiChar;
ReadSize = PcdGet16(PcdShellFileOperationSize);
Buffer = AllocateZeroPool(ReadSize);
if (Buffer == NULL) {
return (EFI_OUT_OF_RESOURCES);
}
Status = ShellSetFilePosition(Handle, 0);
ASSERT_EFI_ERROR(Status);
while (ReadSize == ((UINTN)PcdGet16(PcdShellFileOperationSize))) {
ZeroMem(Buffer, ReadSize);
Status = ShellReadFile(Handle, &ReadSize, Buffer);
if (EFI_ERROR(Status)) {
break;
}
if (!(Ascii|UCS2)) {
if (*(UINT16*)Buffer == gUnicodeFileTag) {
UCS2 = TRUE;
Buffer = ((UINT16*)Buffer) + 1;
} else {
Ascii = TRUE;
}
}
//
// We want to use plain Print function here! (no color support for files)
//
if (Ascii) {
for (LoopVar = 0 ; LoopVar < ReadSize ; LoopVar++) {
AsciiChar = CHAR_NULL;
AsciiChar = ((CHAR8*)Buffer)[LoopVar];
if (AsciiChar == CHAR_NULL) {
AsciiChar = '.';
}
Print(L"%c", AsciiChar);
}
} else {
Print(L"%s", Buffer);
}
}
Print(L"\r\n", Buffer);
return (Status);
}
/**
Triggers a run time or boot time SMI.
This function triggers a software SMM interrupt and set the APMC status with an 8-bit Data.
@param Data The value to set the APMC status.
**/
VOID
InternalTriggerSmi (
IN UINT8 Data
)
{
UINT16 PM1BLK_Base;
UINT16 GPE0BLK_Base;
UINT32 NewValue;
//
// Get PM1BLK_Base & GPE0BLK_Base
//
PM1BLK_Base = PcdGet16 (PcdPm1blkIoBaseAddress);
GPE0BLK_Base = (UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF);
//
// Enable APM SMI
//
IoOr32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIE), B_QNC_GPE0BLK_SMIE_APM);
//
// Enable SMI globally
//
NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
NewValue |= SMI_EN;
QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
//
// Set APM_STS
//
IoWrite8 (PcdGet16 (PcdSmmDataPort), Data);
//
// Generate the APM SMI
//
IoWrite8 (PcdGet16 (PcdSmmActivationPort), PcdGet8 (PcdSmmActivationData));
//
// Clear the APM SMI Status Bit
//
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_APM);
//
// Set the EOS Bit
//
IoOr32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_EOS);
}
/**
Initialize CapsuleMax variables.
**/
VOID
InitCapsuleMaxVariable (
VOID
)
{
EFI_STATUS Status;
UINTN Size;
CHAR16 CapsuleMaxStr[sizeof("Capsule####")];
EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock;
UnicodeSPrint(
CapsuleMaxStr,
sizeof(CapsuleMaxStr),
L"Capsule%04x",
PcdGet16(PcdCapsuleMax)
);
Size = sizeof(L"Capsule####") - sizeof(CHAR16); // no zero terminator
Status = gRT->SetVariable(
L"CapsuleMax",
&gEfiCapsuleReportGuid,
EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
Size,
CapsuleMaxStr
);
if (!EFI_ERROR(Status)) {
// Lock it per UEFI spec.
Status = gBS->LocateProtocol(&gEdkiiVariableLockProtocolGuid, NULL, (VOID **)&VariableLock);
if (!EFI_ERROR(Status)) {
Status = VariableLock->RequestToLock(VariableLock, L"CapsuleMax", &gEfiCapsuleReportGuid);
ASSERT_EFI_ERROR(Status);
}
}
}
/**
Prints an assert message containing a filename, line number, and description.
This may be followed by a breakpoint or a dead loop.
Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
CpuDeadLoop() is called. If neither of these bits are set, then this function
returns immediately after the message is printed to the debug output device.
DebugAssert() must actively prevent recursion. If DebugAssert() is called while
processing another DebugAssert(), then DebugAssert() must return immediately.
If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
If Description is NULL, then a <Description> string of "(NULL) Description" is printed.
@param FileName The pointer to the name of the source file that generated the assert condition.
@param LineNumber The line number in the source file that generated the assert condition
@param Description The pointer to the description of the assert condition.
**/
VOID
EFIAPI
DebugAssert (
IN CONST CHAR8 *FileName,
IN UINTN LineNumber,
IN CONST CHAR8 *Description
)
{
CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
UINT8 *Ptr;
//
// Generate the ASSERT() message in Ascii format
//
AsciiSPrint (Buffer, sizeof (Buffer), "ASSERT %a(%d): %a\n", FileName, LineNumber, Description);
//
// Send the print string to the Console Output device
//
for (Ptr = (UINT8 *) Buffer; *Ptr; Ptr++) {
IoWrite8 (PcdGet16(PcdDebugIoPort), *Ptr);
}
//
// Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
//
if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
CpuBreakpoint ();
} else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
CpuDeadLoop ();
}
}
/**
The constructor function caches the ACPI tick counter address
At the time this constructor runs (DXE_CORE or later), ACPI IO space
has already been enabled by either PlatformPei or by the "Base"
instance of this library.
In order to avoid querying the underlying platform type during each
tick counter read operation, we cache the counter address during
initialization of this instance of the Timer Library.
@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
**/
RETURN_STATUS
EFIAPI
AcpiTimerLibConstructor (
VOID
)
{
UINT16 HostBridgeDevId;
UINTN Pmba;
//
// Query Host Bridge DID to determine platform type
//
HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
break;
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40);
break;
default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
}
mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
return RETURN_SUCCESS;
}
/**
This function is called each second during the boot manager waits the
timeout.
@param TimeoutRemain The remaining timeout.
**/
VOID
EFIAPI
PlatformBootManagerWaitCallback (
UINT16 TimeoutRemain
)
{
EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White;
UINT16 Timeout;
EFI_STATUS Status;
Timeout = PcdGet16 (PcdPlatformBootTimeOut);
Black.Raw = 0x00000000;
White.Raw = 0x00FFFFFF;
Status = BootLogoUpdateProgress (
White.Pixel,
Black.Pixel,
L"Press ESCAPE for boot options",
White.Pixel,
(Timeout - TimeoutRemain) * 100 / Timeout,
0
);
if (EFI_ERROR (Status)) {
Print (L".");
}
}
/**
Creates a record for the beginning of a performance measurement.
Creates a record that contains the Handle, Token, Module and Identifier.
If TimeStamp is not zero, then TimeStamp is added to the record as the start time.
If TimeStamp is zero, then this function reads the current time stamp
and adds that time stamp value to the record as the start time.
@param Handle Pointer to environment specific context used
to identify the component being measured.
@param Token Pointer to a Null-terminated ASCII string
that identifies the component being measured.
@param Module Pointer to a Null-terminated ASCII string
that identifies the module being measured.
@param TimeStamp 64-bit time stamp.
@param Identifier 32-bit identifier. If the value is 0, the created record
is same as the one created by StartPerformanceMeasurement.
@retval RETURN_SUCCESS The start of the measurement was recorded.
@retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.
**/
RETURN_STATUS
EFIAPI
StartPerformanceMeasurementEx (
IN CONST VOID *Handle, OPTIONAL
IN CONST CHAR8 *Token, OPTIONAL
IN CONST CHAR8 *Module, OPTIONAL
IN UINT64 TimeStamp,
IN UINT32 Identifier
)
{
PEI_PERFORMANCE_LOG_HEADER *PeiPerformanceLog;
UINT32 *PeiPerformanceIdArray;
PEI_PERFORMANCE_LOG_ENTRY *LogEntryArray;
UINT32 Index;
UINT16 PeiPerformanceLogEntries;
PeiPerformanceLogEntries = (UINT16) (PcdGet16 (PcdMaxPeiPerformanceLogEntries16) != 0 ?
PcdGet16 (PcdMaxPeiPerformanceLogEntries16) :
PcdGet8 (PcdMaxPeiPerformanceLogEntries));
InternalGetPerformanceHobLog (&PeiPerformanceLog, &PeiPerformanceIdArray);
if (PeiPerformanceLog->NumberOfEntries >= PeiPerformanceLogEntries) {
DEBUG ((DEBUG_ERROR, "PEI performance log array out of resources\n"));
return RETURN_OUT_OF_RESOURCES;
}
Index = PeiPerformanceLog->NumberOfEntries++;
LogEntryArray = (PEI_PERFORMANCE_LOG_ENTRY *) (PeiPerformanceLog + 1);
LogEntryArray[Index].Handle = (EFI_PHYSICAL_ADDRESS) (UINTN) Handle;
if (Token != NULL) {
AsciiStrnCpyS (LogEntryArray[Index].Token, PEI_PERFORMANCE_STRING_SIZE, Token, PEI_PERFORMANCE_STRING_LENGTH);
}
if (Module != NULL) {
AsciiStrnCpyS (LogEntryArray[Index].Module, PEI_PERFORMANCE_STRING_SIZE, Module, PEI_PERFORMANCE_STRING_LENGTH);
}
LogEntryArray[Index].EndTimeStamp = 0;
PeiPerformanceIdArray[Index] = Identifier;
if (TimeStamp == 0) {
TimeStamp = GetPerformanceCounter ();
}
LogEntryArray[Index].StartTimeStamp = TimeStamp;
return RETURN_SUCCESS;
}
/**
Internal function to read the current tick counter of ACPI.
Internal function to read the current tick counter of ACPI.
@return The tick counter read.
**/
STATIC
UINT32
InternalAcpiGetTimerTick (
VOID
)
{
return IoRead32 (PcdGet16 (PcdPm1blkIoBaseAddress) + R_PM1BLK_PM1T);
}
/**
Gets the software SMI data.
This function tests if a software SMM interrupt happens. If a software SMI happens,
it retrieves the SMM data and returns it as a non-negative value; otherwise a negative
value is returned.
@return Data The data retrieved from SMM data port in case of a software SMI;
otherwise a negative value.
**/
INTN
InternalGetSwSmiData (
VOID
)
{
UINT8 SmiStatus;
UINT8 Data;
SmiStatus = IoRead8 ((UINT16)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK) & 0xFFFF) + R_QNC_GPE0BLK_SMIS);
if (((SmiStatus & B_QNC_GPE0BLK_SMIS_APM) != 0) &&
(IoRead8 (PcdGet16 (PcdSmmActivationPort)) == PcdGet8 (PcdSmmActivationData))) {
Data = IoRead8 (PcdGet16 (PcdSmmDataPort));
return (INTN)(UINTN)Data;
}
return -1;
}
/**
Return the default value for system Timeout variable.
@return Timeout value.
**/
UINT16
EFIAPI
GetTimeout (
VOID
)
{
return PcdGet16 (PcdPlatformBootTimeOut);
}
/**
Create dynamic code for BMM and initialize all of BMM configuration data in BmmFakeNvData and
BmmOldFakeNVData member in BMM context data.
@param CallbackData The BMM context data.
**/
VOID
InitializeBmmConfig (
IN BMM_CALLBACK_DATA *CallbackData
)
{
BM_MENU_ENTRY *NewMenuEntry;
BM_LOAD_CONTEXT *NewLoadContext;
UINT16 Index;
ASSERT (CallbackData != NULL);
//
// Initialize data which located in BMM main page
//
CallbackData->BmmFakeNvData.BootNext = NONE_BOOTNEXT_VALUE;
for (Index = 0; Index < BootOptionMenu.MenuNumber; Index++) {
NewMenuEntry = BOpt_GetMenuEntry (&BootOptionMenu, Index);
NewLoadContext = (BM_LOAD_CONTEXT *) NewMenuEntry->VariableContext;
if (NewLoadContext->IsBootNext) {
CallbackData->BmmFakeNvData.BootNext = Index;
break;
}
}
CallbackData->BmmFakeNvData.BootTimeOut = PcdGet16 (PcdPlatformBootTimeOut);
//
// Initialize data which located in Boot Options Menu
//
GetBootOrder (CallbackData);
//
// Initialize data which located in Driver Options Menu
//
GetDriverOrder (CallbackData);
//
// Initialize data which located in Console Options Menu
//
GetConsoleOutMode (CallbackData);
GetConsoleInCheck (CallbackData);
GetConsoleOutCheck (CallbackData);
GetConsoleErrCheck (CallbackData);
GetTerminalAttribute (CallbackData);
CallbackData->BmmFakeNvData.ForceReconnect = TRUE;
//
// Update the menus.
//
CustomizeMenus ();
//
// Backup Initialize BMM configuartion data to BmmOldFakeNVData
//
CopyMem (&CallbackData->BmmOldFakeNVData, &CallbackData->BmmFakeNvData, sizeof (BMM_FAKE_NV_DATA));
}
/**
The constructor function enables ACPI IO space.
If ACPI I/O space not enabled, this function will enable it.
It will always return RETURN_SUCCESS.
@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
**/
RETURN_STATUS
EFIAPI
AcpiTimerLibConstructor (
VOID
)
{
UINTN Bus;
UINTN Device;
UINTN Function;
UINTN EnableRegister;
UINT8 EnableMask;
//
// ASSERT for the invalid PCD values. They must be configured to the real value.
//
ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);
ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);
//
// If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then
// no PCI register programming is required to enable access to the the ACPI registers
// specified by PcdAcpiIoPortBaseAddress
//
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {
return RETURN_SUCCESS;
}
//
// ASSERT for the invalid PCD values. They must be configured to the real value.
//
ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);
ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);
ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);
//
// Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address
//
Bus = PcdGet8 (PcdAcpiIoPciBusNumber);
Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);
Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);
EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);
EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);
//
// If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.
//
if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister) & EnableMask) != EnableMask)) {
PciWrite16 (
PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),
PcdGet16 (PcdAcpiIoPortBaseAddress)
);
PciOr8 (
PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),
EnableMask
);
}
return RETURN_SUCCESS;
}
/**
This function provides early platform initialization.
@param PlatformInfo Pointer to platform Info structure.
**/
VOID
EFIAPI
EarlyPlatformInit (
VOID
)
{
DEBUG ((EFI_D_INFO, "EarlyBoardInit for PlatType=0x%02x\n", PcdGet16 (PcdPlatformType)));
//
// Check if system reset due to error condition.
//
if (CheckForResetDueToErrors (TRUE)) {
if(FeaturePcdGet (WaitIfResetDueToError)) {
DEBUG ((EFI_D_ERROR, "Press any key to continue.\n"));
PlatformDebugPortGetChar8 ();
}
}
//
// Display platform info messages.
//
EarlyPlatformInfoMessages ();
//
// Early Legacy Gpio Init.
//
EarlyPlatformLegacyGpioInit (&mBoardLegacyGpioConfigTable);
//
// Early platform Legacy GPIO manipulation depending on GPIOs
// setup by EarlyPlatformLegacyGpioInit.
//
EarlyPlatformLegacyGpioManipulation ();
//
// Early platform specific GPIO Controller init & manipulation.
// Combined for sharing of temp. memory bar.
//
EarlyPlatformGpioCtrlerInit (&mBoardGpioControllerConfigTable);
EarlyPlatformGpioCtrlerManipulation ();
//
// Early Thermal Sensor Init.
//
EarlyPlatformThermalSensorInit ();
//
// Early Lan Ethernet Mac Init.
//
EarlyPlatformMacInit (
PcdGetPtr (PcdIohEthernetMac0),
PcdGetPtr (PcdIohEthernetMac1)
);
}
RETURN_STATUS
EFIAPI
InitializeConfigAccessMethod (
VOID
)
{
mRunningOnQ35 = (PcdGet16 (PcdOvmfHostBridgePciDevId) ==
INTEL_Q35_MCH_DEVICE_ID);
return RETURN_SUCCESS;
}
/**
Caller provided function to be invoked at the end of DebugPortInitialize().
Refer to the description for DebugPortInitialize() for more details.
@param[in] Context The first input argument of DebugPortInitialize().
@param[in] DebugPortHandle Debug port handle created by Debug Communication Library.
**/
VOID
EFIAPI
InitializeDebugAgentPhase2 (
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
)
{
DEBUG_AGENT_PHASE2_CONTEXT *Phase2Context;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_SEC_PEI_HAND_OFF *SecCoreData;
UINT16 BufferSize;
UINT64 NewDebugPortHandle;
Phase2Context = (DEBUG_AGENT_PHASE2_CONTEXT *) Context;
MailboxLocation = GetLocationSavedMailboxPointerInIdtEntry ();
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
BufferSize = PcdGet16(PcdDebugPortHandleBufferSize);
if (Phase2Context->InitFlag == DEBUG_AGENT_INIT_PEI && BufferSize != 0) {
NewDebugPortHandle = (UINT64)(UINTN)AllocateCopyPool (BufferSize, DebugPortHandle);
} else {
NewDebugPortHandle = (UINT64)(UINTN)DebugPortHandle;
}
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, NewDebugPortHandle);
//
// Trigger one software interrupt to inform HOST
//
TriggerSoftInterrupt (SYSTEM_RESET_SIGNATURE);
if (Phase2Context->InitFlag == DEBUG_AGENT_INIT_PREMEM_SEC) {
//
// If Temporary RAM region is below 128 MB, then send message to
// host to disable low memory filtering.
//
SecCoreData = (EFI_SEC_PEI_HAND_OFF *)Phase2Context->Context;
if ((UINTN)SecCoreData->TemporaryRamBase < BASE_128MB && IsHostAttached ()) {
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Enable Debug Timer interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
//
// Enable CPU interrupts so debug timer interrupts can be delivered
//
EnableInterrupts ();
//
// Call continuation function if it is not NULL.
//
Phase2Context->Function (Phase2Context->Context);
}
}
/**
Gets the GUID HOB for PEI performance.
This internal function searches for the GUID HOB for PEI performance.
If that GUID HOB is not found, it will build a new one.
It outputs the data area of that GUID HOB to record performance log.
@param PeiPerformanceLog Pointer to Pointer to PEI performance log header.
@param PeiPerformanceIdArray Pointer to Pointer to PEI performance identifier array.
**/
VOID
InternalGetPerformanceHobLog (
OUT PEI_PERFORMANCE_LOG_HEADER **PeiPerformanceLog,
OUT UINT32 **PeiPerformanceIdArray
)
{
EFI_HOB_GUID_TYPE *GuidHob;
UINTN PeiPerformanceSize;
UINT16 PeiPerformanceLogEntries;
ASSERT (PeiPerformanceLog != NULL);
ASSERT (PeiPerformanceIdArray != NULL);
PeiPerformanceLogEntries = (UINT16) (PcdGet16 (PcdMaxPeiPerformanceLogEntries16) != 0 ?
PcdGet16 (PcdMaxPeiPerformanceLogEntries16) :
PcdGet8 (PcdMaxPeiPerformanceLogEntries));
GuidHob = GetFirstGuidHob (&gPerformanceProtocolGuid);
if (GuidHob != NULL) {
//
// PEI Performance HOB was found, then return the existing one.
//
*PeiPerformanceLog = GET_GUID_HOB_DATA (GuidHob);
GuidHob = GetFirstGuidHob (&gPerformanceExProtocolGuid);
ASSERT (GuidHob != NULL);
*PeiPerformanceIdArray = GET_GUID_HOB_DATA (GuidHob);
} else {
//
// PEI Performance HOB was not found, then build one.
//
PeiPerformanceSize = sizeof (PEI_PERFORMANCE_LOG_HEADER) +
sizeof (PEI_PERFORMANCE_LOG_ENTRY) * PeiPerformanceLogEntries;
*PeiPerformanceLog = BuildGuidHob (&gPerformanceProtocolGuid, PeiPerformanceSize);
*PeiPerformanceLog = ZeroMem (*PeiPerformanceLog, PeiPerformanceSize);
PeiPerformanceSize = sizeof (UINT32) * PeiPerformanceLogEntries;
*PeiPerformanceIdArray = BuildGuidHob (&gPerformanceExProtocolGuid, PeiPerformanceSize);
*PeiPerformanceIdArray = ZeroMem (*PeiPerformanceIdArray, PeiPerformanceSize);
}
}
/**
Initialize runtime memory status code table as initialization for runtime memory status code worker
@retval EFI_SUCCESS Runtime memory status code table successfully initialized.
**/
EFI_STATUS
RtMemoryStatusCodeInitializeWorker (
VOID
)
{
//
// Allocate runtime memory status code pool.
//
mRtMemoryStatusCodeTable = AllocateRuntimePool (
sizeof (RUNTIME_MEMORY_STATUSCODE_HEADER) +
PcdGet16 (PcdStatusCodeMemorySize) * 1024
);
ASSERT (mRtMemoryStatusCodeTable != NULL);
mRtMemoryStatusCodeTable->RecordIndex = 0;
mRtMemoryStatusCodeTable->NumberOfRecords = 0;
mRtMemoryStatusCodeTable->MaxRecordsNumber =
(PcdGet16 (PcdStatusCodeMemorySize) * 1024) / sizeof (MEMORY_STATUSCODE_RECORD);
return EFI_SUCCESS;
}
/**
The constructor function enables ACPI IO space.
If ACPI I/O space not enabled, this function will enable it.
It will always return RETURN_SUCCESS.
@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
**/
RETURN_STATUS
EFIAPI
AcpiTimerLibConstructor (
VOID
)
{
UINT16 HostBridgeDevId;
UINTN Pmba;
UINTN AcpiCtlReg;
UINT8 AcpiEnBit;
//
// Query Host Bridge DID to determine platform type
//
HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
AcpiEnBit = PIIX4_PMREGMISC_PMIOSE;
break;
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
}
//
// Check to see if the Power Management Base Address is already enabled
//
if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
//
// If the Power Management Base Address is not programmed,
// then program the Power Management Base Address from a PCD.
//
PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
//
// Enable PMBA I/O port decodes
//
PciOr8 (AcpiCtlReg, AcpiEnBit);
}
return RETURN_SUCCESS;
}
/**
function to take a formatted argument and print it to a file.
@param[in] Handle the file handle for the file to write to
@param[in] Format the format argument (see printlib for format specifier)
@param[in] ... the variable arguments for the format
@retval EFI_SUCCESS the operation was successful
@return other a return value from FileHandleWriteLine
@sa FileHandleWriteLine
**/
EFI_STATUS
EFIAPI
FileHandlePrintLine(
IN EFI_FILE_HANDLE Handle,
IN CONST CHAR16 *Format,
...
)
{
VA_LIST Marker;
CHAR16 *Buffer;
EFI_STATUS Status;
//
// Get a buffer to print into
//
Buffer = AllocateZeroPool (PcdGet16 (PcdUefiFileHandleLibPrintBufferSize));
if (Buffer == NULL) {
return (EFI_OUT_OF_RESOURCES);
}
//
// Print into our buffer
//
VA_START (Marker, Format);
UnicodeVSPrint (Buffer, PcdGet16 (PcdUefiFileHandleLibPrintBufferSize), Format, Marker);
VA_END (Marker);
//
// Print buffer into file
//
Status = FileHandleWriteLine(Handle, Buffer);
//
// Cleanup and return
//
FreePool(Buffer);
return (Status);
}
/**
Get a new capsule status variable index.
@return A new capsule status variable index.
@retval -1 No new capsule status variable index.
**/
INTN
GetNewCapsuleResultIndex (
VOID
)
{
INTN CurrentIndex;
CurrentIndex = GetCurrentCapsuleLastIndex();
if (CurrentIndex >= PcdGet16(PcdCapsuleMax)) {
return -1;
}
return CurrentIndex + 1;
}
/**
The constructor function caches the ACPI tick counter address, and,
if necessary, enables ACPI IO space.
@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
**/
RETURN_STATUS
EFIAPI
AcpiTimerLibConstructor (
VOID
)
{
UINT16 HostBridgeDevId;
UINTN Pmba;
UINTN PmRegMisc;
//
// Query Host Bridge DID to determine platform type
//
HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
PmRegMisc = POWER_MGMT_REGISTER_PIIX4 (0x80);
break;
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (0x40);
PmRegMisc = POWER_MGMT_REGISTER_Q35 (0x80);
break;
default:
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
}
mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
//
// Check to see if the Power Management Base Address is already enabled
//
if ((PciRead8 (PmRegMisc) & PMIOSE) == 0) {
//
// If the Power Management Base Address is not programmed,
// then program the Power Management Base Address from a PCD.
//
PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
//
// Enable PMBA I/O port decodes in PMREGMISC
//
PciOr8 (PmRegMisc, PMIOSE);
}
return RETURN_SUCCESS;
}
EFI_STATUS
EFIAPI
BoardDetectionCallback (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
)
{
EFI_STATUS Status;
VOID *Instance;
DEBUG ((EFI_D_INFO, "Detecting Galileo ...\n"));
//
// Check if board detection is finished.
//
Status = PeiServicesLocatePpi (
&gBoardDetectedPpiGuid,
0,
NULL,
&Instance
);
if (!EFI_ERROR(Status)) {
return EFI_SUCCESS;
}
//
// In most real platform, here should be the code to detect board type.
//
// For galileo, we only support build time board selection, so use PCD to do the fake detection.
//
if (PcdGet16(PcdPlatformType) != Galileo) {
return EFI_UNSUPPORTED;
}
DEBUG ((EFI_D_INFO, "Detected Galileo!\n"));
Status = PcdSet64S (PcdBoardInitPreMem, (UINT64)(UINTN)BoarInitPreMem);
ASSERT_EFI_ERROR(Status);
Status = PcdSet64S (PcdBoardInitPostMem, (UINT64)(UINTN)BoarInitPostMem);
ASSERT_EFI_ERROR(Status);
Status = PcdSet32S (PcdPciExpPerstResumeWellGpio, PCIEXP_PERST_RESUMEWELL_GPIO);
ASSERT_EFI_ERROR(Status);
Status = PcdSet32S (PcdFlashUpdateLedResumeWellGpio, GALILEO_FLASH_UPDATE_LED_RESUMEWELL_GPIO);
ASSERT_EFI_ERROR(Status);
Status = PeiServicesInstallPpi(&mDetectedPpi);
ASSERT_EFI_ERROR(Status);
return Status;
}
/**
Get a new capsule status variable index.
@return A new capsule status variable index.
@retval 0 No new capsule status variable index. Rolling over.
**/
INTN
GetNewCapsuleResultIndex (
VOID
)
{
INTN CurrentIndex;
CurrentIndex = GetCurrentCapsuleLastIndex();
if (CurrentIndex >= PcdGet16(PcdCapsuleMax)) {
DEBUG((DEBUG_INFO, " CapsuleResult variable Rolling Over!\n"));
return 0;
}
return CurrentIndex + 1;
}
/**
Initialize runtime memory status code table as initialization for runtime memory status code worker
@retval EFI_SUCCESS Runtime memory status code table successfully initialized.
@retval others Errors from gBS->InstallConfigurationTable().
**/
EFI_STATUS
RtMemoryStatusCodeInitializeWorker (
VOID
)
{
EFI_STATUS Status;
//
// Allocate runtime memory status code pool.
//
mRtMemoryStatusCodeTable = AllocateRuntimePool (
sizeof (RUNTIME_MEMORY_STATUSCODE_HEADER) +
PcdGet16 (PcdStatusCodeMemorySize) * 1024
);
ASSERT (mRtMemoryStatusCodeTable != NULL);
mRtMemoryStatusCodeTable->RecordIndex = 0;
mRtMemoryStatusCodeTable->NumberOfRecords = 0;
mRtMemoryStatusCodeTable->MaxRecordsNumber =
(PcdGet16 (PcdStatusCodeMemorySize) * 1024) / sizeof (MEMORY_STATUSCODE_RECORD);
Status = gBS->InstallConfigurationTable (&gMemoryStatusCodeRecordGuid, mRtMemoryStatusCodeTable);
return Status;
}
/**
Create the socket
@param [in] Family Network family, AF_INET or AF_INET6
@retval EFI_SUCCESS The application is running normally
@retval Other The user stopped the application
**/
EFI_STATUS
SocketNew (
sa_family_t Family
)
{
EFI_STATUS Status;
//
// Get the port number
//
ZeroMem ( &LocalAddress, sizeof ( LocalAddress ));
LocalAddress.sin6_len = sizeof ( LocalAddress );
LocalAddress.sin6_family = Family;
LocalAddress.sin6_port = htons ( PcdGet16 ( DataSource_Port ));
//
// Loop creating the socket
//
DEBUG (( DEBUG_INFO,
"Creating the socket\r\n" ));
//
// Check for user stop request
//
Status = ControlCCheck ( );
if ( !EFI_ERROR ( Status )) {
//
// Attempt to create the socket
//
ListenSocket = socket ( LocalAddress.sin6_family,
SOCK_STREAM,
IPPROTO_TCP );
if ( -1 != ListenSocket ) {
DEBUG (( DEBUG_INFO,
"0x%08x: Socket created\r\n",
ListenSocket ));
}
else {
Status = EFI_NOT_STARTED;
}
}
//
// Return the operation status
//
return Status;
}
