void Uart_t::Init(uint32_t ABaudrate,
GPIO_TypeDef *PGpioTx, const uint16_t APinTx,
GPIO_TypeDef *PGpioRx, const uint16_t APinRx) {
#else
void Uart_t::Init(uint32_t ABaudrate, GPIO_TypeDef *PGpioTx, const uint16_t APinTx) {
#endif
PinSetupAlterFunc(PGpioTx, APinTx, omPushPull, pudNone, UART_AF);
IBaudrate = ABaudrate;
// ==== USART configuration ====
if (UART == USART1) { rccEnableUSART1(FALSE); }
else if(UART == USART2) { rccEnableUSART2(FALSE); }
#if defined STM32F072xB
// Setup HSI as UART's clk src
if(UART == USART1) RCC->CFGR3 |= RCC_CFGR3_USART1SW_HSI;
else if(UART == USART2) RCC->CFGR3 |= RCC_CFGR3_USART2SW_HSI;
OnAHBFreqChange();
#else
OnAHBFreqChange(); // Setup baudrate
#endif
UART->CR2 = 0;
#if UART_USE_DMA // ==== DMA ====
// Remap DMA request if needed
#if defined STM32F0XX
if(UART_DMA_TX == STM32_DMA1_STREAM4) SYSCFG->CFGR1 |= SYSCFG_CFGR1_USART1TX_DMA_RMP;
#endif
dmaStreamAllocate (UART_DMA_TX, IRQ_PRIO_MEDIUM, CmdUartTxIrq, NULL);
dmaStreamSetPeripheral(UART_DMA_TX, &UART_TX_REG);
dmaStreamSetMode (UART_DMA_TX, UART_DMA_TX_MODE);
IDmaIsIdle = true;
#endif
#if UART_RX_ENABLED
UART->CR1 = USART_CR1_TE | USART_CR1_RE; // TX & RX enable
UART->CR3 = USART_CR3_DMAT | USART_CR3_DMAR; // Enable DMA at TX & RX
PinSetupAlterFunc(PGpioRx, APinRx, omOpenDrain, pudPullUp, UART_AF);
// Remap DMA request if needed
#if defined STM32F0XX
if(UART_DMA_RX == STM32_DMA1_STREAM5) SYSCFG->CFGR1 |= SYSCFG_CFGR1_USART1RX_DMA_RMP;
#endif
dmaStreamAllocate (UART_DMA_RX, IRQ_PRIO_LOW, nullptr, NULL);
dmaStreamSetPeripheral(UART_DMA_RX, &UART_RX_REG);
dmaStreamSetMemory0 (UART_DMA_RX, IRxBuf);
dmaStreamSetTransactionSize(UART_DMA_RX, UART_RXBUF_SZ);
dmaStreamSetMode (UART_DMA_RX, UART_DMA_RX_MODE);
dmaStreamEnable (UART_DMA_RX);
// Thread
IPThd = chThdCreateStatic(waUartRxThread, sizeof(waUartRxThread), LOWPRIO, UartRxThread, NULL);
#else
UART->CR1 = USART_CR1_TE; // Transmitter enabled
#if UART_USE_DMA
UART->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
#endif
#endif
UART->CR1 |= USART_CR1_UE; // Enable USART
}
void Timer_t::InitPwm(GPIO_TypeDef *GPIO, uint16_t N, uint8_t Chnl, Inverted_t Inverted, const PinSpeed_t ASpeed) {
// GPIO
if (ITmr == TIM2) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1, ASpeed);
else if(ANY_OF_2(ITmr, TIM3, TIM4)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2, ASpeed);
else if(ANY_OF_3(ITmr, TIM9, TIM10, TIM11)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3, ASpeed);
// Output
uint16_t tmp = (Inverted == invInverted)? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
PCCR = &ITmr->CCR1;
ITmr->CCMR1 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC1E;
break;
case 2:
PCCR = &ITmr->CCR2;
ITmr->CCMR1 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC2E;
break;
case 3:
PCCR = &ITmr->CCR3;
ITmr->CCMR2 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC3E;
break;
case 4:
PCCR = &ITmr->CCR4;
ITmr->CCMR2 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
}
void i2c_t::Init() {
// GPIO
PinSetupAlterFunc(PParams->PGpio, PParams->SclPin, omOpenDrain, pudNone, PParams->PinAF);
PinSetupAlterFunc(PParams->PGpio, PParams->SdaPin, omOpenDrain, pudNone, PParams->PinAF);
#if I2C_USE_SEMAPHORE
chBSemObjectInit(&BSemaphore, NOT_TAKEN);
#endif
// I2C
I2C_TypeDef *pi2c = PParams->pi2c; // To make things shorter
pi2c->CR1 = 0; // Clear PE bit => disable and reset i2c
if(pi2c == I2C1) {
rccResetI2C1();
rccEnableI2C1(FALSE);
}
else if(pi2c == I2C2) {
rccResetI2C2();
rccEnableI2C2(FALSE);
}
else if(pi2c == I2C3) {
rccResetI2C3();
rccEnableI2C3(FALSE);
}
pi2c->TIMINGR = PParams->Timing; // setup timings
// Analog filter enabled, digital disabled, clk stretch enabled, DMA enabled
pi2c->CR1 = I2C_CR1_TXDMAEN | I2C_CR1_RXDMAEN;
// DMA
dmaStreamAllocate(STM32_DMA1_STREAM2, IRQ_PRIO_MEDIUM, nullptr, nullptr);
dmaStreamAllocate(STM32_DMA1_STREAM3, IRQ_PRIO_MEDIUM, nullptr, nullptr);
dmaStreamSetPeripheral(PParams->PDmaRx, &pi2c->RXDR);
dmaStreamSetPeripheral(STM32_DMA1_STREAM2, &pi2c->TXDR);
// IRQ
nvicEnableVector(72, IRQ_PRIO_MEDIUM);
nvicEnableVector(73, IRQ_PRIO_MEDIUM);
}
void CmdUart_t::Init(uint32_t ABaudrate) {
PWrite = TXBuf;
PRead = TXBuf;
IDmaIsIdle = true;
IFullSlotsCount = 0;
PinSetupAlterFunc(UART_GPIO, UART_TX_PIN, omPushPull, pudNone, UART_AF);
// ==== USART configuration ====
UART_RCC_ENABLE();
UART->CR1 = USART_CR1_UE; // Enable USART
UART->BRR = Clk.APBFreqHz / ABaudrate;
UART->CR2 = 0;
// ==== DMA ====
dmaStreamAllocate (UART_DMA_TX, IRQ_PRIO_HIGH, CmdUartTxIrq, NULL);
dmaStreamSetPeripheral(UART_DMA_TX, &UART->TDR);
dmaStreamSetMode (UART_DMA_TX, UART_DMA_TX_MODE);
#if UART_RX_ENABLED
UART->CR1 = USART_CR1_TE | USART_CR1_RE; // TX & RX enable
UART->CR3 = USART_CR3_DMAT | USART_CR3_DMAR; // Enable DMA at TX & RX
PinSetupAlterFunc(UART_GPIO, UART_RX_PIN, omOpenDrain, pudPullUp, UART_AF);
dmaStreamAllocate (UART_DMA_RX, IRQ_PRIO_LOW, nullptr, NULL);
dmaStreamSetPeripheral(UART_DMA_RX, &UART->RDR);
dmaStreamSetMemory0 (UART_DMA_RX, IRxBuf);
dmaStreamSetTransactionSize(UART_DMA_RX, UART_RXBUF_SZ);
dmaStreamSetMode (UART_DMA_RX, UART_DMA_RX_MODE);
dmaStreamEnable (UART_DMA_RX);
#else
UART->CR1 = USART_CR1_TE; // Transmitter enabled
UART->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
#endif
UART->CR1 |= USART_CR1_UE; // Enable USART
}
uint8_t cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (CC_GPIO, CC_CS, omPushPull);
PinSetupAlterFunc(CC_GPIO, CC_SCK, omPushPull, pudNone, CC_SPI_AF);
PinSetupAlterFunc(CC_GPIO, CC_MISO, omPushPull, pudNone, CC_SPI_AF);
PinSetupAlterFunc(CC_GPIO, CC_MOSI, omPushPull, pudNone, CC_SPI_AF);
IGdo0.Init(ttFalling);
//PinSetupAnalog (CC_GPIO, CC_GDO2); // GDO2 not used
CsHi();
// ==== SPI ====
// MSB first, master, ClkLowIdle, FirstEdge, Baudrate no more than 6.5MHz
ISpi.Setup(boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv16);
ISpi.Enable();
// ==== Init CC ====
if(Reset() != OK) {
ISpi.Disable();
Uart.Printf("\rCC Rst Fail");
return FAILURE;
}
// Check if success
WriteRegister(CC_PKTLEN, 7);
uint8_t Rpl = ReadRegister(CC_PKTLEN);
if(Rpl != 7) {
ISpi.Disable();
Uart.Printf("\rCC R/W Fail; rpl=%u", Rpl);
return FAILURE;
}
// Proceed with init
FlushRxFIFO();
RfConfig();
IGdo0.EnableIrq(IRQ_PRIO_HIGH);
return OK;
}
void cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (GPIOA, CC_CS, omPushPull, pudNone);
PinSetupAlterFunc(GPIOA, CC_SCK, omPushPull, pudNone, AF5);
PinSetupAlterFunc(GPIOA, CC_MISO, omPushPull, pudNone, AF5);
PinSetupAlterFunc(GPIOA, CC_MOSI, omPushPull, pudNone, AF5);
PinSetupIn (GPIOA, CC_GDO0, pudNone);
PinSetupIn (GPIOA, CC_GDO2, pudNone);
CsHi();
// ==== SPI ==== MSB first, master, SCK idle low, Baudrate=f/2
rccEnableSPI1(FALSE);
// NoCRC, FullDuplex, 8bit, MSB, Baudrate, Master, ClkLowIdle(CPOL=0),
// FirstEdge(CPHA=0), NSS software controlled and is 1
CC_SPI->CR1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR;
CC_SPI->CR2 = 0;
CC_SPI->I2SCFGR &= ~((uint16_t)SPI_I2SCFGR_I2SMOD);
CC_SPI->CR1 |= SPI_CR1_SPE; // Enable SPI
// ==== Init CC ====
CReset();
FlushRxFIFO();
RfConfig();
// ==== IRQ ====
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, FALSE); // Enable sys cfg controller
SYSCFG->EXTICR[1] &= 0xFFFFFFF0; // EXTI4 is connected to PortA
// Configure EXTI line
EXTI->IMR |= GPIO0_IRQ_MASK; // Interrupt mode enabled
EXTI->EMR &= ~GPIO0_IRQ_MASK; // Event mode disabled
EXTI->RTSR &= ~GPIO0_IRQ_MASK; // Rising trigger disabled
EXTI->FTSR |= GPIO0_IRQ_MASK; // Falling trigger enabled
EXTI->PR = GPIO0_IRQ_MASK; // Clean irq flag
nvicEnableVector(EXTI4_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));
}
void Timer_t::InitPwm(GPIO_TypeDef *GPIO, uint16_t N, uint8_t Chnl, uint32_t ATopValue, Inverted_t Inverted, PinOutMode_t OutputType) {
// GPIO
if (ITmr == TIM2) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF1);
else if(ANY_OF_2(ITmr, TIM3, TIM4)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF2);
else if(ANY_OF_3(ITmr, TIM9, TIM10, TIM11)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF3);
ITmr->ARR = ATopValue;
// Output
uint16_t tmp = (Inverted == invInverted)? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
ITmr->CCMR1 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC1E;
break;
case 2:
ITmr->CCMR1 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC2E;
break;
case 3:
ITmr->CCMR2 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC3E;
break;
case 4:
ITmr->CCMR2 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
}
void i2c_t::Resume() {
Error = false;
// ==== GPIOs ====
PinSetupAlterFunc(IPGpio, ISclPin, omOpenDrain, pudNone, AF4);
PinSetupAlterFunc(IPGpio, ISdaPin, omOpenDrain, pudNone, AF4);
// ==== Clock and reset ====
if (ii2c == I2C1) { rccEnableI2C1(FALSE); rccResetI2C1(); }
else if (ii2c == I2C2) { rccEnableI2C2(FALSE); rccResetI2C2(); }
else if (ii2c == I2C3) { rccEnableI2C3(FALSE); rccResetI2C3(); }
// Minimum clock is 2 MHz
uint32_t ClkMhz = Clk.APB1FreqHz / 1000000;
uint16_t tmpreg = ii2c->CR2;
tmpreg &= (uint16_t)~I2C_CR2_FREQ;
if(ClkMhz < 2) ClkMhz = 2;
if(ClkMhz > 30) ClkMhz = 30;
tmpreg |= ClkMhz;
ii2c->CR2 = tmpreg;
ii2c->CR1 &= (uint16_t)~I2C_CR1_PE; // Disable i2c to setup TRise & CCR
ii2c->TRISE = (uint16_t)(((ClkMhz * 300) / 1000) + 1);
// 16/9
tmpreg = (uint16_t)(Clk.APB1FreqHz / (IBitrateHz * 25));
if(tmpreg == 0) tmpreg = 1; // minimum allowed value
tmpreg |= I2C_CCR_FS | I2C_CCR_DUTY;
ii2c->CCR = tmpreg;
ii2c->CR1 |= I2C_CR1_PE; // Enable i2c back
// ==== DMA ====
ii2c->CR2 |= I2C_CR2_DMAEN;
}
void UsbCDC_t::Init() {
// GPIO
PinSetupAlterFunc(GPIOA, 11, omOpenDrain, pudNone, AF10);
PinSetupAlterFunc(GPIOA, 12, omOpenDrain, pudNone, AF10);
// Objects
sduObjectInit(&SDU2);
sduStart(&SDU2, &SerUsbCfg);
// Thread
IPThd = chThdCreateStatic(waUsbCDCThread, sizeof(waUsbCDCThread), NORMALPRIO, UsbCDCThread, NULL);
}
void Adc_t::Init() {
PinSetupOut(ADC_GPIO, ADC_CSIN_PIN, omPushPull, pudNone);
PinSetupAlterFunc(ADC_GPIO, ADC_SCK_PIN, omPushPull, pudNone, ADC_SPI_AF);
PinSetupAlterFunc(ADC_GPIO, ADC_DOUT_PIN, omPushPull, pudNone, ADC_SPI_AF);
CsHi();
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=...
// Select baudrate (2.4MHz max): APB=32MHz => div = 16
ISpi.Setup(SPI_ADC, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv16);
ISpi.SetRxOnly();
ISpi.EnableRxDma();
// ==== DMA ====
dmaStreamAllocate (DMA_ADC, IRQ_PRIO_MEDIUM, SIrqDmaHandler, NULL);
dmaStreamSetPeripheral(DMA_ADC, &SPI_ADC->DR);
dmaStreamSetMode (DMA_ADC, ADC_DMA_MODE);
}
void Usb_t::Init() {
// GPIO
PinSetupAlterFunc(GPIOA, 11, omOpenDrain, pudNone, AF10);
PinSetupAlterFunc(GPIOA, 12, omOpenDrain, pudNone, AF10);
PinSetupIn(GPIOA, 9, pudPullDown);
// OTG FS clock enable and reset
rccEnableOTG_FS(FALSE);
rccResetOTG_FS();
// Enable IRQ
nvicEnableVector(STM32_OTG1_NUMBER, CORTEX_PRIORITY_MASK(IRQ_PRIO_LOW));
// Thread
PThread = chThdCreateStatic(waUsbThd, sizeof(waUsbThd), LOWPRIO, UsbThread, NULL);
// ==== OTG init ====
// Forced device mode, USB turn-around time = TRDT_VALUE, Full Speed 1.1 PHY, 0 tuning
OTG_FS->GUSBCFG = GUSBCFG_FDMOD | GUSBCFG_TRDT(TRDT) | GUSBCFG_PHYSEL | 0;
OTG_FS->DCFG = 0x02200000 | DCFG_NZLSOHSK | DCFG_DSPD_FS11; // Full-speed (other options are not available, though)
OTG_FS->PCGCCTL = 0; // Nothing is stopped or gated
OTG_FS->GCCFG = GCCFG_VBUSASEN | GCCFG_VBUSBSEN | GCCFG_PWRDWN /*| GCCFG_NOVBUSSENS*/;
// Core reset and delay of at least 3 PHY cycles
OTG_FS->GRSTCTL = GRSTCTL_CSRST;
while((OTG_FS->GRSTCTL & GRSTCTL_CSRST) != 0);
__NOP();
__NOP();
// Wait AHB idle condition
while((OTG_FS->GRSTCTL & GRSTCTL_AHBIDL) == 0);
__NOP();
__NOP();
OTG_FS->GAHBCFG = 0; // Interrupts on TXFIFOs half empty, mask interrupts
// ==== Endpoints ====
for(uint8_t i=0; i<USB_EP_CNT; i++) Ep[i].SelfN = i;
// Ep0
//OTG_FS->ie[0].DIEPCTL = 0x11; // size = 8
Ep[0].InMaxSz = EP0_SZ;
Ep[0].OutMaxSz = EP0_SZ;
// Clear all pending Device Interrupts, only the USB Reset interrupt is required initially
OTG_FS->DIEPMSK = 0;
OTG_FS->DOEPMSK = 0;
OTG_FS->DAINTMSK = 0;
OTG_FS->GINTMSK = GINTMSK_ENUMDNEM | GINTMSK_USBRSTM /*| GINTMSK_USBSUSPM | GINTMSK_ESUSPM |*/;
OTG_FS->GINTSTS = 0xFFFFFFFF; // Clear all pending IRQs, if any
OTG_FS->GAHBCFG |= GAHBCFG_GINTMSK; // Global interrupts enable
}
void DbgUart_t::Init(uint32_t ABaudrate) {
PWrite = TXBuf;
PRead = TXBuf;
ICountToSendNext = 0;
IDmaIsIdle = true;
//PinSetupAlterFunc(GPIOA, 9, omPushPull, pudNone, AF7); // TX1
PinSetupAlterFunc(GPIOA, 2, omPushPull, pudNone, AF7); // TX2
// ==== USART configuration ====
UART_RCC_ENABLE();
UART->BRR = Clk.APB2FreqHz / ABaudrate;
UART->CR2 = 0;
UART->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
UART->CR1 = USART_CR1_TE; // Transmitter enabled
// ==== DMA ====
// Here only the unchanged parameters of the DMA are configured.
dmaStreamAllocate (UART_DMA, 1, DbgUartIrq, NULL);
dmaStreamSetPeripheral(UART_DMA, &UART->DR);
dmaStreamSetMode (UART_DMA,
STM32_DMA_CR_CHSEL(UART_DMA_CHNL) |
DMA_PRIORITY_LOW |
STM32_DMA_CR_MSIZE_BYTE |
STM32_DMA_CR_PSIZE_BYTE |
STM32_DMA_CR_MINC | // Memory pointer increase
STM32_DMA_CR_DIR_M2P | // Direction is memory to peripheral
STM32_DMA_CR_TCIE // Enable Transmission Complete IRQ
);
UART->CR1 |= USART_CR1_UE; // Enable USART
}
void DbgUart_t::Init(uint32_t ABaudrate) {
PWrite = TXBuf;
PRead = TXBuf;
ICountToSendNext = 0;
IDmaIsIdle = true;
PinSetupAlterFunc(GPIOA, 9, omPushPull, pudNone, AF7); // TX1
// ==== USART configuration ====
rccEnableUSART1(FALSE); // UART clock, no clock in low-power
USART1->BRR = Clk.APB2FreqHz / 115200;
USART1->CR2 = 0;
USART1->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
USART1->CR1 = USART_CR1_TE; // Transmitter enabled
// ==== DMA ====
// Here only the unchanged parameters of the DMA are configured.
dmaStreamAllocate (STM32_DMA2_STREAM7, 1, DbgUartIrq, NULL);
dmaStreamSetPeripheral(STM32_DMA2_STREAM7, &USART1->DR);
dmaStreamSetMode (STM32_DMA2_STREAM7,
STM32_DMA_CR_CHSEL(4) | // DMA2 Stream7 Channel4 is USART1_TX request
DMA_PRIORITY_LOW |
STM32_DMA_CR_MSIZE_BYTE |
STM32_DMA_CR_PSIZE_BYTE |
STM32_DMA_CR_MINC | // Memory pointer increase
STM32_DMA_CR_DIR_M2P | // Direction is memory to peripheral
STM32_DMA_CR_TCIE // Enable Transmission Complete IRQ
);
USART1->CR1 |= USART_CR1_UE; // Enable USART
}
void Sound_t::Init() {
// ==== GPIO init ====
PinSetupOut(VS_GPIO, VS_RST, omPushPull);
PinSetupOut(VS_GPIO, VS_XCS, omPushPull);
PinSetupOut(VS_GPIO, VS_XDCS, omPushPull);
Rst_Lo();
XCS_Hi();
XDCS_Hi();
chThdSleepMilliseconds(45);
PinSetupIn(VS_GPIO, VS_DREQ, pudPullDown);
PinSetupAlterFunc(VS_GPIO, VS_XCLK, omPushPull, pudNone, VS_AF);
PinSetupAlterFunc(VS_GPIO, VS_SO, omPushPull, pudNone, VS_AF);
PinSetupAlterFunc(VS_GPIO, VS_SI, omPushPull, pudNone, VS_AF);
// ==== SPI init ====
ISpi.Setup(VS_SPI, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv8);
ISpi.Enable();
ISpi.EnableTxDma();
// ==== DMA ====
// Here only unchanged parameters of the DMA are configured.
dmaStreamAllocate (VS_DMA, IRQ_PRIO_MEDIUM, SIrqDmaHandler, NULL);
dmaStreamSetPeripheral(VS_DMA, &VS_SPI->DR);
dmaStreamSetMode (VS_DMA, VS_DMA_MODE);
// ==== Variables ====
State = sndStopped;
IDmaIdle = true;
PBuf = &Buf1;
IAttenuation = VS_INITIAL_ATTENUATION;
chMBInit(&CmdBox, CmdBuf, VS_CMD_BUF_SZ);
// ==== Init VS ====
Rst_Hi();
chThdSleepMilliseconds(7);
Clk.MCO1Enable(mco1HSE, mcoDiv1); // Only after reset, as pins are grounded when Rst is Lo
chThdSleepMilliseconds(7);
// ==== DREQ IRQ ====
IDreq.Setup(VS_GPIO, VS_DREQ, ttRising);
// ==== Thread ====
PThread = chThdCreateStatic(waSoundThread, sizeof(waSoundThread), NORMALPRIO, (tfunc_t)SoundThread, NULL);
#if VS_AMPF_EXISTS
PinSetupOut(VS_AMPF_GPIO, VS_AMPF_PIN, omPushPull);
AmpfOff();
#endif
}
void LedChnl_t::Init() const {
// ==== GPIO setup ====
if(PTimer == TIM2) PinSetupAlterFunc(PGpio, Pin, omPushPull, pudNone, AF1);
else if(PTimer == TIM3 or PTimer == TIM4) PinSetupAlterFunc(PGpio, Pin, omPushPull, pudNone, AF2);
else PinSetupAlterFunc(PGpio, Pin, omPushPull, pudNone, AF3);
// ==== Timer setup ====
if (PTimer == TIM2) { rccEnableTIM2(FALSE); }
else if(PTimer == TIM3) { rccEnableTIM3(FALSE); }
else if(PTimer == TIM4) { rccEnableTIM4(FALSE); }
else if(PTimer == TIM9) { rccEnableTIM9(FALSE); }
else if(PTimer == TIM10) { rccEnableAPB2(RCC_APB2ENR_TIM10EN, FALSE); }
else if(PTimer == TIM11) { rccEnableAPB2(RCC_APB2ENR_TIM11EN, FALSE); }
PTimer->CR1 = TIM_CR1_CEN; // Enable timer, set clk division to 0, AutoReload not buffered
PTimer->CR2 = 0;
PTimer->ARR = LED_TOP_VALUE;
// ==== Timer's channel ====
#if LED_INVERTED_PWM
#define PwmMode 0b111
#else
#define PwmMode 0b110
#endif
switch(TmrChnl) {
case 1:
PTimer->CCMR1 |= (PwmMode << 4);
PTimer->CCER |= TIM_CCER_CC1E;
break;
case 2:
PTimer->CCMR1 |= (PwmMode << 12);
PTimer->CCER |= TIM_CCER_CC2E;
break;
case 3:
PTimer->CCMR2 |= (PwmMode << 4);
PTimer->CCER |= TIM_CCER_CC3E;
break;
case 4:
PTimer->CCMR2 |= (PwmMode << 12);
PTimer->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
}
void Uart_t::Init(uint32_t ABaudrate, GPIO_TypeDef *PGpioTx, const uint16_t APinTx, GPIO_TypeDef *PGpioRx, const uint16_t APinRx) {
#else
void Uart_t::Init(uint32_t ABaudrate, GPIO_TypeDef *PGpioTx, const uint16_t APinTx) {
#endif
PinSetupAlterFunc(PGpioTx, APinTx, omPushPull, pudNone, UART_AF);
IBaudrate = ABaudrate;
// ==== USART configuration ====
if(UART == USART1) {rccEnableUSART1(FALSE); }
else if(UART == USART2) {rccEnableUSART2(FALSE); }
OnAHBFreqChange(); // Setup baudrate
UART->CR2 = 0;
#if UART_USE_DMA // ==== DMA ====
dmaStreamAllocate (UART_DMA_TX, IRQ_PRIO_MEDIUM, CmdUartTxIrq, NULL);
dmaStreamSetPeripheral(UART_DMA_TX, &UART_TX_REG);
dmaStreamSetMode (UART_DMA_TX, UART_DMA_TX_MODE);
IDmaIsIdle = true;
#endif
#if UART_RX_ENABLED
UART->CR1 = USART_CR1_TE | USART_CR1_RE; // TX & RX enable
UART->CR3 = USART_CR3_DMAT | USART_CR3_DMAR; // Enable DMA at TX & RX
PinSetupAlterFunc(PGpioRx, APinRx, omOpenDrain, pudPullUp, UART_AF);
dmaStreamAllocate (UART_DMA_RX, IRQ_PRIO_LOW, nullptr, NULL);
dmaStreamSetPeripheral(UART_DMA_RX, &UART_RX_REG);
dmaStreamSetMemory0 (UART_DMA_RX, IRxBuf);
dmaStreamSetTransactionSize(UART_DMA_RX, UART_RXBUF_SZ);
dmaStreamSetMode (UART_DMA_RX, UART_DMA_RX_MODE);
dmaStreamEnable (UART_DMA_RX);
// Thread
IPThd = chThdCreateStatic(waUartRxThread, sizeof(waUartRxThread), LOWPRIO, UartRxThread, NULL);
#else
UART->CR1 = USART_CR1_TE; // Transmitter enabled
#if UART_USE_DMA
UART->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
#endif
#endif
UART->CR1 |= USART_CR1_UE; // Enable USART
}
void cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (CC_GPIO, CC_CS, omPushPull, pudNone);
PinSetupAlterFunc(CC_GPIO, CC_SCK, omPushPull, pudNone, AF5);
PinSetupAlterFunc(CC_GPIO, CC_MISO, omPushPull, pudNone, AF5);
PinSetupAlterFunc(CC_GPIO, CC_MOSI, omPushPull, pudNone, AF5);
PinSetupIn (CC_GPIO, CC_GDO0, pudNone);
PinSetupIn (CC_GPIO, CC_GDO2, pudNone);
CsHi();
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=f/2
ISpi.Setup(CC_SPI, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv2);
ISpi.Enable();
// ==== Init CC ====
CReset();
FlushRxFIFO();
RfConfig();
PWaitingThread = nullptr;
// ==== IRQ ====
IGdo0.Setup(CC_GPIO, CC_GDO0, ttFalling);
IGdo0.EnableIrq(IRQ_PRIO_HIGH);
}
void sd_t::Init() {
IsReady = FALSE;
// Bus pins
PinSetupAlterFunc(GPIOC, 8, omPushPull, pudPullUp, AF12, ps50MHz);
PinSetupAlterFunc(GPIOC, 9, omPushPull, pudPullUp, AF12, ps50MHz);
PinSetupAlterFunc(GPIOC, 10, omPushPull, pudPullUp, AF12, ps50MHz);
PinSetupAlterFunc(GPIOC, 11, omPushPull, pudPullUp, AF12, ps50MHz);
PinSetupAlterFunc(GPIOC, 12, omPushPull, pudNone, AF12, ps50MHz);
PinSetupAlterFunc(GPIOD, 2, omPushPull, pudPullUp, AF12, ps50MHz);
// Power pin
PinSetupOut(GPIOC, 4, omPushPull, pudNone);
PinClear(GPIOC, 4); // Power on
Delay_ms(450);
FRESULT err;
sdcInit();
sdcStart(&SDCD1, NULL);
if (sdcConnect(&SDCD1)) {
Uart.Printf("SD connect error\r");
return;
}
else {
Uart.Printf("SD capacity: %u\r", SDCD1.capacity);
}
err = f_mount(0, &SDC_FS);
if (err != FR_OK) {
Uart.Printf("SD mount error\r");
sdcDisconnect(&SDCD1);
return;
}
IsReady = TRUE;
}
void Timer_t::PwmInit(GPIO_TypeDef *GPIO, uint16_t N, uint8_t Chnl, Inverted_t Inverted) {
// GPIO
if (ANY_OF_2(ITmr, TIM1, TIM2)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1);
else if(ANY_OF_3(ITmr, TIM3, TIM4, TIM5)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
else if(ANY_OF_4(ITmr, TIM8, TIM9, TIM10, TIM11)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
else if(ANY_OF_3(ITmr, TIM12, TIM13, TIM14)) PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
// Enable outputs for advanced timers
ITmr->BDTR = TIM_BDTR_MOE | TIM_BDTR_AOE;
// Output
uint16_t tmp = (Inverted == invInverted)? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
PCCR = &ITmr->CCR1;
ITmr->CCMR1 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC1E;
break;
case 2:
PCCR = &ITmr->CCR2;
ITmr->CCMR1 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC2E;
break;
case 3:
PCCR = &ITmr->CCR3;
ITmr->CCMR2 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC3E;
break;
case 4:
PCCR = &ITmr->CCR4;
ITmr->CCMR2 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
}
void eAdc_t::Init() {
PThread = chThdSelf();
PinSetupOut(ADC_GPIO, ADC_CNV, omPushPull, pudNone);
PinSetupOut(ADC_GPIO, ADC_SDI, omPushPull, pudNone);
PinSetupAlterFunc(ADC_GPIO, ADC_SCLK, omPushPull, pudNone, AF5);
PinSetupAlterFunc(ADC_GPIO, ADC_SDO, omPushPull, pudNone, AF5);
PinSet(ADC_GPIO, ADC_SDI); //select CS MODE
ADC_CNV_LOW(); // Idle mode
// ==== DMA ====
dmaStreamAllocate (EADC_DMA, IRQ_PRIO_MEDIUM, SIrqDmaHandler, NULL);
dmaStreamSetPeripheral(EADC_DMA, &ADC_SPI->DR);
dmaStreamSetMode (EADC_DMA, EADC_DMA_MODE);
dmaStreamSetMemory0(EADC_DMA, &Adc.Rslt);
dmaStreamSetTransactionSize(EADC_DMA, 1);
dmaStreamEnable(EADC_DMA);
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=...
// Select baudrate (2.4MHz max): APB=120MHz => div = 64
ISpi.Setup(ADC_SPI, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv64, sbc16Bit);
ISpi.SetModeRxOnly();
ISpi.EnableRxDma();
ISpi.Enable();
// ==== Sampling timer ====
SamplingTmr.Init(TIM2);
SamplingTmr.SetUpdateFrequency(FSAMPL_ADC);
SamplingTmr.EnableIrq(TIM2_IRQn, IRQ_PRIO_MEDIUM);
SamplingTmr.EnableIrqOnUpdate();
SamplingTmr.Enable();
CskTmr.Init(TIM5);
CskTmr.SetUpdateFrequency(FSAMPL_CNV); // request 2 usec
CskTmr.EnableIrq(TIM5_IRQn, IRQ_PRIO_MEDIUM);
CskTmr.EnableIrqOnUpdate();
CskTmr.Disable();
}
// ¬нешнее прерывание (не используетс¤)
void eAdc_t::IIrqExtiHandler() {
IrqSDO.CleanIrqFlag();
IrqSDO.DisableIrq();
PinSetupAlterFunc(ADC_GPIO, ADC_SDO, omPushPull, pudNone, AF5);
(void)ADC_SPI->DR; // Clear input register
dmaStreamAllocate (EADC_DMA, IRQ_PRIO_MEDIUM, SIrqDmaHandler, NULL);
dmaStreamSetPeripheral(EADC_DMA, &ADC_SPI->DR);
dmaStreamSetMode (EADC_DMA, EADC_DMA_MODE);
dmaStreamSetMemory0(EADC_DMA, &Adc.Rslt);
dmaStreamSetTransactionSize(EADC_DMA, 1);
dmaStreamEnable(EADC_DMA);
ISpi.Enable();
// LED1_TOGGLE();
}
void LedSk_t::Init() {
PinSetupAlterFunc(LEDWS_PIN);
ISpi.Setup(boMSB, cpolIdleLow, cphaFirstEdge, sclkDiv2, bitn16);
ISpi.Enable();
ISpi.EnableTxDma();
// Zero buffer
for(uint32_t i=0; i<TOTAL_W_CNT; i++) IBuf[i] = 0;
// Set colors to black
for(uint32_t i=0; i<LED_CNT; i++) ICurrentClr[i] = clRGBWBlack;
// ==== DMA ====
dmaStreamAllocate (LEDWS_DMA, IRQ_PRIO_LOW, LedTxcIrq, NULL);
dmaStreamSetPeripheral(LEDWS_DMA, &LEDWS_SPI->DR);
dmaStreamSetMode (LEDWS_DMA, LED_DMA_MODE);
}
void Lcd_t::Init(void) {
BckLt.Init();
// ==== GPIOs ====
// Configure LCD_XRES, LCD_XCS, LCD_SCLK & LCD_SDA as Push-Pull output
PinSetupOut(LCD_GPIO, LCD_XRES, omPushPull);
PinSetupOut(LCD_GPIO, LCD_XCS, omPushPull);
PinSetupOut(LCD_GPIO, LCD_SCLK, omPushPull);
PinSetupOut(LCD_GPIO, LCD_SDA, omPushPull);
// ========================= Init LCD ======================================
SCLK_Lo();
XCS_Hi();
// Reset display
XRES_Lo();
chThdSleepMilliseconds(7);
XRES_Hi();
IWriteCmd(0xAF); // display ON
// Reset display again
XRES_Lo();
chThdSleepMilliseconds(7);
XRES_Hi();
chThdSleepMilliseconds(7);
// Initial commands
IWriteCmd(0xAF); // display ON
IWriteCmd(0xA4); // Set normal display mode
IWriteCmd(0x2F); // Charge pump on
IWriteCmd(0x40); // Set start row address = 0
#if LCD_MIRROR_Y_AXIS
IWriteCmd(0xC8); // Mirror Y axis
#endif
#if LCD_MIRROR_X_AXIS
IWriteCmd(0xA1); // Mirror X axis
#endif
// Set x=0, y=0
IWriteCmd(0xB0); // Y axis initialization
IWriteCmd(0x10); // X axis initialisation1
IWriteCmd(0x00); // X axis initialisation2
Cls();
#if LCD_DMA_BASED // ================ Switch to USART + DMA ====================
PinSetupAlterFunc(LCD_GPIO, LCD_SCLK, omPushPull, pudNone, AF7, ps40MHz);
PinSetupAlterFunc(LCD_GPIO, LCD_SDA, omPushPull, pudNone, AF7, ps40MHz);
// ==== USART init ==== clock enabled, idle low, first edge, enable last bit pulse
rccEnableUSART3(FALSE);
USART3->CR1 = USART_CR1_UE; // Enable
USART3->BRR = Clk.APB1FreqHz / LCD_UART_SPEED;
USART3->CR2 = USART_CR2_CLKEN | USART_CR2_LBCL; // Enable clock, enable last bit clock
USART3->CR1 = USART_CR1_UE | USART_CR1_M | USART_CR1_TE;
USART3->CR3 = USART_CR3_DMAT; // Enable DMA at transmitter
// DMA
dmaStreamAllocate (LCD_DMA, IRQ_PRIO_LOW, nullptr, NULL);
dmaStreamSetPeripheral(LCD_DMA, &USART3->DR);
dmaStreamSetMemory0 (LCD_DMA, IBuf);
dmaStreamSetTransactionSize(LCD_DMA, LCD_VIDEOBUF_SIZE);
dmaStreamSetMode (LCD_DMA, LCD_DMA_TX_MODE);
// Start transmission
XCS_Lo();
dmaStreamEnable(LCD_DMA);
#else
#endif
chSemInit(&semLcd, 1);
}
// ================================ PWM pin ====================================
void PwmPin_t::Init(GPIO_TypeDef *GPIO, uint16_t N, uint8_t TimN, uint8_t Chnl, uint16_t TopValue, bool Inverted) {
TIM_TypeDef* Tim;
switch(TimN) {
case 1:
Tim = TIM1;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1);
rccEnableTIM1(FALSE);
break;
case 2:
Tim = TIM2;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1);
rccEnableTIM2(FALSE);
break;
case 3:
Tim = TIM3;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM3(FALSE);
break;
case 4:
Tim = TIM4;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM4(FALSE);
break;
case 5:
Tim = TIM5;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM5(FALSE);
break;
case 8:
Tim = TIM8;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableTIM8(FALSE);
break;
case 9:
Tim = TIM9;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM9EN, FALSE);
break;
case 10:
Tim = TIM10;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM10EN, FALSE);
break;
case 11:
Tim = TIM11;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM11EN, FALSE);
break;
case 12:
Tim = TIM12;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM12EN, FALSE);
break;
case 13:
Tim = TIM13;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM13EN, FALSE);
break;
case 14:
Tim = TIM14;
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM14EN, FALSE);
break;
default: return; break;
}
// Common
Tim->CR1 = TIM_CR1_CEN; // Enable timer, set clk division to 0, AutoReload not buffered
Tim->CR2 = 0;
Tim->ARR = TopValue;
Tim->BDTR = TIM_BDTR_MOE | TIM_BDTR_AOE;
// Output
uint16_t tmp = Inverted? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
PCCR = &Tim->CCR1;
Tim->CCMR1 |= (tmp << 4);
Tim->CCER |= TIM_CCER_CC1E;
break;
case 2:
PCCR = &Tim->CCR2;
Tim->CCMR1 |= (tmp << 12);
Tim->CCER |= TIM_CCER_CC2E;
break;
case 3:
PCCR = &Tim->CCR3;
Tim->CCMR2 |= (tmp << 4);
Tim->CCER |= TIM_CCER_CC3E;
break;
case 4:
PCCR = &Tim->CCR4;
Tim->CCMR2 |= (tmp << 12);
Tim->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
*PCCR = 0;
}
// ==== Init & DMA ====
void CmdUnit_t::Init(uint32_t ABaudrate) {
PBuf = TXBuf1;
TxIndx = 0;
IDmaIsIdle = true;
// ==== Clocks init ====
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); // UART clock
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
// ==== GPIO init ====
PinSetupAlterFunc(GPIOA, 9, poPushPull, pudNone, AF1); // TX1
#ifdef RX_ENABLED
klGpioSetupByN(GPIOA, 10, GPIO_Mode_IPU); // RX1
#endif
// ==== USART configuration ====
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = ABaudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
#ifdef RX_ENABLED
USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
#else
USART_InitStructure.USART_Mode = USART_Mode_Tx;
#endif
USART_Init(USART1, &USART_InitStructure);
// Remap USART1 TX DMA Ch to DMA Ch4
//SYSCFG->CFGR1 |= SYSCFG_CFGR1_USART1TX_DMA_RMP;
// ==== DMA ====
DMA_InitTypeDef DMA_InitStructure;
DMA_DeInit(UART_DMA_CHNL);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &USART1->TDR;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) PBuf;
DMA_InitStructure.DMA_BufferSize = UART_TXBUF_SIZE;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(UART_DMA_CHNL, &DMA_InitStructure);
// Enable DMA1 Ch2 Transfer Complete interrupt
DMA_ITConfig(UART_DMA_CHNL, DMA_IT_TC, ENABLE);
// ==== Interrupts ====
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#ifdef RX_ENABLED
// ==== NVIC ====
// Enable the USART Interrupt
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Enable RX interrupt
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
#endif
// Enable USART
USART_Cmd(USART1, ENABLE);
}
// ================================ PWM pin ====================================
void PwmPin_t::Init(GPIO_TypeDef *GPIO, uint16_t N, TIM_TypeDef* PTim, uint8_t Chnl, uint16_t TopValue, bool Inverted) {
Tim = PTim;
if(Tim == TIM1) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1);
rccEnableTIM1(FALSE);
}
else if(Tim == TIM2) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF1);
rccEnableTIM2(FALSE);
}
else if(Tim == TIM3) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM3(FALSE);
}
else if(Tim == TIM4) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM4(FALSE);
}
else if(Tim == TIM5) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF2);
rccEnableTIM5(FALSE);
}
else if(Tim == TIM8) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableTIM8(FALSE);
}
else if(Tim == TIM9) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM9EN, FALSE);
}
else if(Tim == TIM10) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM10EN, FALSE);
}
else if(Tim == TIM11) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF3);
rccEnableAPB2(RCC_APB2ENR_TIM11EN, FALSE);
}
else if(Tim == TIM12) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM12EN, FALSE);
}
else if(Tim == TIM13) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM13EN, FALSE);
}
else if(Tim == TIM14) {
PinSetupAlterFunc(GPIO, N, omPushPull, pudNone, AF9);
rccEnableAPB1(RCC_APB1ENR_TIM14EN, FALSE);
}
// Clock src
if(ANY_OF_5(Tim, TIM1, TIM8, TIM9, TIM10, TIM11)) PClk = &Clk.APB2FreqHz;
else PClk = &Clk.APB1FreqHz;
// Common
Tim->CR1 = TIM_CR1_CEN; // Enable timer, set clk division to 0, AutoReload not buffered
Tim->CR2 = 0;
Tim->ARR = TopValue;
Tim->BDTR = TIM_BDTR_MOE | TIM_BDTR_AOE;
// Output
uint16_t tmp = Inverted? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
PCCR = &Tim->CCR1;
Tim->CCMR1 |= (tmp << 4);
Tim->CCER |= TIM_CCER_CC1E;
break;
case 2:
PCCR = &Tim->CCR2;
Tim->CCMR1 |= (tmp << 12);
Tim->CCER |= TIM_CCER_CC2E;
break;
case 3:
PCCR = &Tim->CCR3;
Tim->CCMR2 |= (tmp << 4);
Tim->CCER |= TIM_CCER_CC3E;
break;
case 4:
PCCR = &Tim->CCR4;
Tim->CCMR2 |= (tmp << 12);
Tim->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
*PCCR = 0;
}
void Timer_t::InitPwm(GPIO_TypeDef *GPIO, uint16_t N, uint8_t Chnl, uint32_t ATopValue, Inverted_t Inverted, PinOutMode_t OutputType) {
// GPIO
#if defined STM32L1XX
if (ITmr == TIM2) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF1);
else if(ANY_OF_2(ITmr, TIM3, TIM4)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF2);
else if(ANY_OF_3(ITmr, TIM9, TIM10, TIM11)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF3);
#elif defined STM32F0XX
if (ITmr == TIM1) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF2);
else if(ITmr == TIM3) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF1);
else if(ITmr == TIM14) {
if(GPIO == GPIOA) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF4);
else PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF0);
}
#ifdef TIM15
else if(ITmr == TIM15) {
if(GPIO == GPIOA) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF0);
else PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF1);
}
#endif
else if(ITmr == TIM16 or ITmr == TIM17) {
if(GPIO == GPIOA) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF5);
else PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF2);
}
#elif defined STM32F2XX || defined STM32F4XX
if(ANY_OF_2(ITmr, TIM1, TIM2)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF1);
else if(ANY_OF_3(ITmr, TIM3, TIM4, TIM5)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF2);
else if(ANY_OF_4(ITmr, TIM8, TIM9, TIM10, TIM11)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF3);
else if(ANY_OF_3(ITmr, TIM12, TIM13, TIM14)) PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF9);
#elif defined STM32F100_MCUCONF
PinSetupAlterFunc(GPIO, N, OutputType, pudNone, AF0); // Alternate function is dummy
// ITmr->BDTR = 0xC000; // Main output Enable
#endif
#if !defined STM32L151xB
ITmr->BDTR = 0xC000; // Main output Enable
#endif
ITmr->ARR = ATopValue;
// Output
uint16_t tmp = (Inverted == invInverted)? 0b111 : 0b110; // PWM mode 1 or 2
switch(Chnl) {
case 1:
ITmr->CCMR1 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC1E;
break;
case 2:
ITmr->CCMR1 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC2E;
break;
case 3:
ITmr->CCMR2 |= (tmp << 4);
ITmr->CCER |= TIM_CCER_CC3E;
break;
case 4:
ITmr->CCMR2 |= (tmp << 12);
ITmr->CCER |= TIM_CCER_CC4E;
break;
default: break;
}
}