#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("src_V_V_TDATA", 16, hls_in, 0, "axis", "in_data", 1),
Port_Property("src_V_V_TVALID", 1, hls_in, 0, "axis", "in_vld", 1),
Port_Property("src_V_V_TREADY", 1, hls_out, 0, "axis", "in_acc", 1),
Port_Property("dst_V", 16, hls_out, 1, "ap_vld", "out_data", 1),
Port_Property("dst_V_ap_vld", 1, hls_out, 1, "ap_vld", "out_vld", 1),
Port_Property("sof_dst_V", 1, hls_out, 2, "ap_vld", "out_data", 1),
Port_Property("sof_dst_V_ap_vld", 1, hls_out, 2, "ap_vld", "out_vld", 1),
Port_Property("eol_dst_V", 1, hls_out, 3, "ap_vld", "out_data", 1),
Port_Property("eol_dst_V_ap_vld", 1, hls_out, 3, "ap_vld", "out_vld", 1),
Port_Property("dst_valid_dst_V", 1, hls_out, 4, "ap_vld", "out_data", 1),
Port_Property("dst_valid_dst_V_ap_vld", 1, hls_out, 4, "ap_vld", "out_vld", 1),
Port_Property("src_valid_V", 1, hls_in, 5, "ap_none", "in_data", 1),
Port_Property("sof_src_V", 1, hls_in, 6, "ap_none", "in_data", 1),
Port_Property("hsync_V", 1, hls_out, 7, "ap_vld", "out_data", 1),
Port_Property("hsync_V_ap_vld", 1, hls_out, 7, "ap_vld", "out_vld", 1),
Port_Property("vsync_V", 1, hls_out, 8, "ap_vld", "out_data", 1),
Port_Property("vsync_V_ap_vld", 1, hls_out, 8, "ap_vld", "out_vld", 1),
};
const char* HLS_Design_Meta::dut_name = "hls_cropping_vert_strm";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("X_address0", 6, hls_out, 0, "ap_memory", "mem_address", 1),
Port_Property("X_ce0", 1, hls_out, 0, "ap_memory", "mem_ce", 1),
Port_Property("X_q0", 32, hls_in, 0, "ap_memory", "mem_dout", 1),
Port_Property("function_r", 8, hls_in, 1, "ap_none", "in_data", 1),
Port_Property("Y_address0", 6, hls_out, 2, "ap_memory", "mem_address", 1),
Port_Property("Y_ce0", 1, hls_out, 2, "ap_memory", "mem_ce", 1),
Port_Property("Y_we0", 1, hls_out, 2, "ap_memory", "mem_we", 1),
Port_Property("Y_d0", 32, hls_out, 2, "ap_memory", "mem_din", 1),
};
const char* HLS_Design_Meta::dut_name = "DCT";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("IN_STREAM_TDATA", 24, hls_in, 0, "axis", "in_data", 1),
Port_Property("IN_STREAM_TKEEP", 3, hls_in, 1, "axis", "in_data", 1),
Port_Property("IN_STREAM_TSTRB", 3, hls_in, 2, "axis", "in_data", 1),
Port_Property("IN_STREAM_TUSER", 1, hls_in, 3, "axis", "in_data", 1),
Port_Property("IN_STREAM_TLAST", 1, hls_in, 4, "axis", "in_data", 1),
Port_Property("IN_STREAM_TID", 1, hls_in, 5, "axis", "in_data", 1),
Port_Property("IN_STREAM_TDEST", 1, hls_in, 6, "axis", "in_data", 1),
Port_Property("OUT_STREAM_TDATA", 8, hls_out, 7, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TKEEP", 1, hls_out, 8, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TSTRB", 1, hls_out, 9, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TUSER", 1, hls_out, 10, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TLAST", 1, hls_out, 11, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TID", 1, hls_out, 12, "axis", "out_data", 1),
Port_Property("OUT_STREAM_TDEST", 1, hls_out, 13, "axis", "out_data", 1),
Port_Property("cols", 32, hls_in, 14, "ap_stable", "in_data", 1),
Port_Property("rows", 32, hls_in, 15, "ap_stable", "in_data", 1),
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("IN_STREAM_TVALID", 1, hls_in, 6, "axis", "in_vld", 1),
Port_Property("IN_STREAM_TREADY", 1, hls_out, 6, "axis", "in_acc", 1),
Port_Property("OUT_STREAM_TVALID", 1, hls_out, 13, "axis", "out_vld", 1),
Port_Property("OUT_STREAM_TREADY", 1, hls_in, 13, "axis", "out_acc", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
};
const char* HLS_Design_Meta::dut_name = "toGray";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("d_o_0_din", 16, hls_out, 0, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_0_full_n", 1, hls_in, 0, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_0_write", 1, hls_out, 0, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_1_din", 16, hls_out, 1, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_1_full_n", 1, hls_in, 1, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_1_write", 1, hls_out, 1, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_2_din", 16, hls_out, 2, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_2_full_n", 1, hls_in, 2, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_2_write", 1, hls_out, 2, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_3_din", 16, hls_out, 3, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_3_full_n", 1, hls_in, 3, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_3_write", 1, hls_out, 3, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_4_din", 16, hls_out, 4, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_4_full_n", 1, hls_in, 4, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_4_write", 1, hls_out, 4, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_5_din", 16, hls_out, 5, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_5_full_n", 1, hls_in, 5, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_5_write", 1, hls_out, 5, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_6_din", 16, hls_out, 6, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_6_full_n", 1, hls_in, 6, "ap_fifo", "fifo_status", 1),
Port_Property("d_o_6_write", 1, hls_out, 6, "ap_fifo", "fifo_update", 1),
Port_Property("d_o_7_din", 16, hls_out, 7, "ap_fifo", "fifo_data", 1),
Port_Property("d_o_7_full_n", 1, hls_in, 7, "ap_fifo", "fifo_status", 1),
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("io_cmd_V", 160, hls_in, 0, "ap_hs", "in_data", 1),
Port_Property("io_cmd_V_ap_vld", 1, hls_in, 0, "ap_hs", "in_vld", 1),
Port_Property("io_cmd_V_ap_ack", 1, hls_out, 0, "ap_hs", "in_acc", 1),
Port_Property("io_resp_V", 74, hls_out, 1, "ap_hs", "out_data", 1),
Port_Property("io_resp_V_ap_vld", 1, hls_out, 1, "ap_hs", "out_vld", 1),
Port_Property("io_resp_V_ap_ack", 1, hls_in, 1, "ap_hs", "out_acc", 1),
};
const char* HLS_Design_Meta::dut_name = "sub";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]= {
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("in_r_dout", 32, hls_in, 0, "ap_fifo", "fifo_data", 2),
Port_Property("in_r_empty_n", 1, hls_in, 0, "ap_fifo", "fifo_status", 2),
Port_Property("in_r_read", 1, hls_out, 0, "ap_fifo", "fifo_update", 2),
Port_Property("out_r_din", 32, hls_out, 1, "ap_fifo", "fifo_data", 2),
Port_Property("out_r_full_n", 1, hls_in, 1, "ap_fifo", "fifo_status", 2),
Port_Property("out_r_write", 1, hls_out, 1, "ap_fifo", "fifo_update", 2),
Port_Property("debug_ready", 8, hls_in, 2, "ap_none", "in_data", 1),
Port_Property("debug_out", 8, hls_out, 3, "ap_vld", "out_data", 1),
Port_Property("debug_out_ap_vld", 1, hls_out, 3, "ap_vld", "out_vld", 1),
};
const char* HLS_Design_Meta::dut_name = "xillybus_wrapper";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("s_axi_AXILiteS_AWVALID", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_AWREADY", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_AWADDR", 5, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_WVALID", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_WREADY", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_WDATA", 32, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_WSTRB", 4, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_ARVALID", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_ARREADY", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_ARADDR", 5, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_RVALID", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_RREADY", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_RDATA", 32, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_RRESP", 2, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_BVALID", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_BREADY", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_AXILiteS_BRESP", 2, hls_out, -1, "", "", 1),
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("m_axi_output_config_AWVALID", 1, hls_out, 1, "m_axi", "VALID", 1),
Port_Property("m_axi_output_config_AWREADY", 1, hls_in, 1, "m_axi", "READY", 1),
Port_Property("m_axi_output_config_AWADDR", 32, hls_out, 1, "m_axi", "ADDR", 1),
Port_Property("m_axi_output_config_AWID", 1, hls_out, 1, "m_axi", "ID", 1),
Port_Property("m_axi_output_config_AWLEN", 8, hls_out, 1, "m_axi", "LEN", 1),
Port_Property("m_axi_output_config_AWSIZE", 3, hls_out, 1, "m_axi", "SIZE", 1),
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("in_channels_ch1_address0", 22, hls_out, 0, "ap_memory", "mem_address", 1),
Port_Property("in_channels_ch1_ce0", 1, hls_out, 0, "ap_memory", "mem_ce", 1),
Port_Property("in_channels_ch1_q0", 8, hls_in, 0, "ap_memory", "mem_dout", 1),
Port_Property("in_channels_ch2_address0", 22, hls_out, 1, "ap_memory", "mem_address", 1),
Port_Property("in_channels_ch2_ce0", 1, hls_out, 1, "ap_memory", "mem_ce", 1),
Port_Property("in_channels_ch2_q0", 8, hls_in, 1, "ap_memory", "mem_dout", 1),
Port_Property("in_channels_ch3_address0", 22, hls_out, 2, "ap_memory", "mem_address", 1),
Port_Property("in_channels_ch3_ce0", 1, hls_out, 2, "ap_memory", "mem_ce", 1),
Port_Property("in_channels_ch3_q0", 8, hls_in, 2, "ap_memory", "mem_dout", 1),
Port_Property("in_width", 16, hls_in, 3, "ap_none", "in_data", 1),
Port_Property("in_height", 16, hls_in, 4, "ap_none", "in_data", 1),
Port_Property("out_channels_ch1_address0", 22, hls_out, 5, "ap_memory", "mem_address", 1),
Port_Property("out_channels_ch1_ce0", 1, hls_out, 5, "ap_memory", "mem_ce", 1),
Port_Property("out_channels_ch1_we0", 1, hls_out, 5, "ap_memory", "mem_we", 1),
Port_Property("out_channels_ch1_d0", 8, hls_out, 5, "ap_memory", "mem_din", 1),
Port_Property("out_channels_ch2_address0", 22, hls_out, 6, "ap_memory", "mem_address", 1),
Port_Property("out_channels_ch2_ce0", 1, hls_out, 6, "ap_memory", "mem_ce", 1),
Port_Property("out_channels_ch2_we0", 1, hls_out, 6, "ap_memory", "mem_we", 1),
Port_Property("out_channels_ch2_d0", 8, hls_out, 6, "ap_memory", "mem_din", 1),
Port_Property("out_channels_ch3_address0", 22, hls_out, 7, "ap_memory", "mem_address", 1),
Port_Property("out_channels_ch3_ce0", 1, hls_out, 7, "ap_memory", "mem_ce", 1),
Port_Property("out_channels_ch3_we0", 1, hls_out, 7, "ap_memory", "mem_we", 1),
Port_Property("out_channels_ch3_d0", 8, hls_out, 7, "ap_memory", "mem_din", 1),
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("sI1_TDATA", 32, hls_in, 0, "axis", "in_data", 1),
Port_Property("sI1_TVALID", 1, hls_in, 0, "axis", "in_vld", 1),
Port_Property("sI1_TREADY", 1, hls_out, 0, "axis", "in_acc", 1),
Port_Property("sI2_TDATA", 32, hls_in, 1, "axis", "in_data", 1),
Port_Property("sI2_TVALID", 1, hls_in, 1, "axis", "in_vld", 1),
Port_Property("sI2_TREADY", 1, hls_out, 1, "axis", "in_acc", 1),
Port_Property("mO1_TDATA", 32, hls_out, 2, "axis", "out_data", 1),
Port_Property("mO1_TVALID", 1, hls_out, 2, "axis", "out_vld", 1),
Port_Property("mO1_TREADY", 1, hls_in, 2, "axis", "out_acc", 1),
};
const char* HLS_Design_Meta::dut_name = "acc_vadd";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("out_r_address0", 1, hls_out, 0, "ap_memory", "mem_address", 1),
Port_Property("out_r_ce0", 1, hls_out, 0, "ap_memory", "mem_ce", 1),
Port_Property("out_r_we0", 1, hls_out, 0, "ap_memory", "mem_we", 1),
Port_Property("out_r_d0", 32, hls_out, 0, "ap_memory", "mem_din", 1),
Port_Property("w_address0", 7, hls_out, 1, "ap_memory", "mem_address", 1),
Port_Property("w_ce0", 1, hls_out, 1, "ap_memory", "mem_ce", 1),
Port_Property("w_q0", 32, hls_in, 1, "ap_memory", "mem_dout", 1),
Port_Property("b_address0", 7, hls_out, 2, "ap_memory", "mem_address", 1),
Port_Property("b_ce0", 1, hls_out, 2, "ap_memory", "mem_ce", 1),
Port_Property("b_q0", 32, hls_in, 2, "ap_memory", "mem_dout", 1),
Port_Property("x_address0", 7, hls_out, 3, "ap_memory", "mem_address", 1),
Port_Property("x_ce0", 1, hls_out, 3, "ap_memory", "mem_ce", 1),
Port_Property("x_q0", 32, hls_in, 3, "ap_memory", "mem_dout", 1),
};
const char* HLS_Design_Meta::dut_name = "top";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("imgIn_TDATA", 32, hls_in, 0, "axis", "in_data", 1),
Port_Property("pyrFilOut_V_M_real_V_TDATA", 24, hls_out, 1, "axis", "out_data", 1),
Port_Property("pyrFilOut_V_M_imag_V_TDATA", 24, hls_out, 2, "axis", "out_data", 1),
Port_Property("nL", 32, hls_in, 3, "ap_none", "in_data", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("imgIn_TVALID", 1, hls_in, 0, "axis", "in_vld", 1),
Port_Property("imgIn_TREADY", 1, hls_out, 0, "axis", "in_acc", 1),
Port_Property("pyrFilOut_V_M_real_V_TVALID", 1, hls_out, 1, "axis", "out_vld", 1),
Port_Property("pyrFilOut_V_M_real_V_TREADY", 1, hls_in, 1, "axis", "out_acc", 1),
Port_Property("pyrFilOut_V_M_imag_V_TVALID", 1, hls_out, 2, "axis", "out_vld", 1),
Port_Property("pyrFilOut_V_M_imag_V_TREADY", 1, hls_in, 2, "axis", "out_acc", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
};
const char* HLS_Design_Meta::dut_name = "pyrconstuct_top";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("A_address0", 14, hls_out, 0, "ap_memory", "mem_address", 1),
Port_Property("A_ce0", 1, hls_out, 0, "ap_memory", "mem_ce", 1),
Port_Property("A_q0", 32, hls_in, 0, "ap_memory", "mem_dout", 1),
Port_Property("B_address0", 14, hls_out, 1, "ap_memory", "mem_address", 1),
Port_Property("B_ce0", 1, hls_out, 1, "ap_memory", "mem_ce", 1),
Port_Property("B_q0", 32, hls_in, 1, "ap_memory", "mem_dout", 1),
Port_Property("C_address0", 14, hls_out, 2, "ap_memory", "mem_address", 1),
Port_Property("C_ce0", 1, hls_out, 2, "ap_memory", "mem_ce", 1),
Port_Property("C_we0", 1, hls_out, 2, "ap_memory", "mem_we", 1),
Port_Property("C_d0", 64, hls_out, 2, "ap_memory", "mem_din", 1),
Port_Property("C_q0", 64, hls_in, 2, "ap_memory", "mem_dout", 1),
Port_Property("mA", 8, hls_in, 3, "ap_none", "in_data", 1),
Port_Property("nA", 8, hls_in, 4, "ap_none", "in_data", 1),
Port_Property("mB", 8, hls_in, 5, "ap_none", "in_data", 1),
Port_Property("nB", 8, hls_in, 6, "ap_none", "in_data", 1),
Port_Property("mC", 8, hls_in, 7, "ap_none", "in_data", 1),
Port_Property("nC", 8, hls_in, 8, "ap_none", "in_data", 1),
};
const char* HLS_Design_Meta::dut_name = "MAT_Multiply";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("input_r", 16, hls_in, 0, "ap_none", "in_data", 1),
Port_Property("output_r", 16, hls_out, 1, "ap_vld", "out_data", 1),
Port_Property("output_r_ap_vld", 1, hls_out, 1, "ap_vld", "out_vld", 1),
};
const char* HLS_Design_Meta::dut_name = "top";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("theta", 64, hls_in, 0, "ap_none", "in_data", 1),
Port_Property("s", 64, hls_out, 1, "ap_vld", "out_data", 1),
Port_Property("s_ap_vld", 1, hls_out, 1, "ap_vld", "out_vld", 1),
Port_Property("c", 64, hls_out, 2, "ap_vld", "out_data", 1),
Port_Property("c_ap_vld", 1, hls_out, 2, "ap_vld", "out_vld", 1),
};
const char* HLS_Design_Meta::dut_name = "cordic";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("a_address0", 2, hls_out, 0, "ap_memory", "mem_address", 1),
Port_Property("a_ce0", 1, hls_out, 0, "ap_memory", "mem_ce", 1),
Port_Property("a_q0", 24, hls_in, 0, "ap_memory", "mem_dout", 1),
Port_Property("b_address0", 2, hls_out, 1, "ap_memory", "mem_address", 1),
Port_Property("b_ce0", 1, hls_out, 1, "ap_memory", "mem_ce", 1),
Port_Property("b_q0", 24, hls_in, 1, "ap_memory", "mem_dout", 1),
Port_Property("res_address0", 4, hls_out, 2, "ap_memory", "mem_address", 1),
Port_Property("res_ce0", 1, hls_out, 2, "ap_memory", "mem_ce", 1),
Port_Property("res_we0", 1, hls_out, 2, "ap_memory", "mem_we", 1),
Port_Property("res_d0", 16, hls_out, 2, "ap_memory", "mem_din", 1),
};
const char* HLS_Design_Meta::dut_name = "matrixmul";
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst_n", 1, hls_in, -1, "", "", 1),
Port_Property("ap_start", 1, hls_in, -1, "", "", 1),
Port_Property("ap_done", 1, hls_out, -1, "", "", 1),
Port_Property("ap_idle", 1, hls_out, -1, "", "", 1),
Port_Property("ap_ready", 1, hls_out, -1, "", "", 1),
Port_Property("m_axi_gmem_AWVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
Port_Property("m_axi_gmem_AWREADY", 1, hls_in, 0, "m_axi", "READY", 1),
Port_Property("m_axi_gmem_AWADDR", 32, hls_out, 0, "m_axi", "ADDR", 1),
Port_Property("m_axi_gmem_AWID", 1, hls_out, 0, "m_axi", "ID", 1),
Port_Property("m_axi_gmem_AWLEN", 8, hls_out, 0, "m_axi", "LEN", 1),
Port_Property("m_axi_gmem_AWSIZE", 3, hls_out, 0, "m_axi", "SIZE", 1),
Port_Property("m_axi_gmem_AWBURST", 2, hls_out, 0, "m_axi", "BURST", 1),
Port_Property("m_axi_gmem_AWLOCK", 2, hls_out, 0, "m_axi", "LOCK", 1),
Port_Property("m_axi_gmem_AWCACHE", 4, hls_out, 0, "m_axi", "CACHE", 1),
Port_Property("m_axi_gmem_AWPROT", 3, hls_out, 0, "m_axi", "PROT", 1),
Port_Property("m_axi_gmem_AWQOS", 4, hls_out, 0, "m_axi", "QOS", 1),
Port_Property("m_axi_gmem_AWREGION", 4, hls_out, 0, "m_axi", "REGION", 1),
Port_Property("m_axi_gmem_AWUSER", 1, hls_out, 0, "m_axi", "USER", 1),
Port_Property("m_axi_gmem_WVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
Port_Property("m_axi_gmem_WREADY", 1, hls_in, 0, "m_axi", "READY", 1),
Port_Property("m_axi_gmem_WDATA", 32, hls_out, 0, "m_axi", "DATA", 1),
Port_Property("m_axi_gmem_WSTRB", 4, hls_out, 0, "m_axi", "STRB", 1),
Port_Property("m_axi_gmem_WLAST", 1, hls_out, 0, "m_axi", "LAST", 1),
Port_Property("m_axi_gmem_WID", 1, hls_out, 0, "m_axi", "ID", 1),
Port_Property("m_axi_gmem_WUSER", 1, hls_out, 0, "m_axi", "USER", 1),
Port_Property("m_axi_gmem_ARVALID", 1, hls_out, 0, "m_axi", "VALID", 1),
Port_Property("m_axi_gmem_ARREADY", 1, hls_in, 0, "m_axi", "READY", 1),
Port_Property("m_axi_gmem_ARADDR", 32, hls_out, 0, "m_axi", "ADDR", 1),
#include "hls_design_meta.h"
const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("ap_clk", 1, hls_in, -1, "", "", 1),
Port_Property("ap_rst", 1, hls_in, -1, "", "", 1),
Port_Property("input_V_V_dout", 32, hls_in, 0, "ap_fifo", "fifo_data", 6),
Port_Property("input_V_V_empty_n", 1, hls_in, 0, "ap_fifo", "fifo_status", 6),
Port_Property("input_V_V_read", 1, hls_out, 0, "ap_fifo", "fifo_update", 6),
Port_Property("output_V_V_din", 32, hls_out, 1, "ap_fifo", "fifo_data", 6),
Port_Property("output_V_V_full_n", 1, hls_in, 1, "ap_fifo", "fifo_status", 6),
Port_Property("output_V_V_write", 1, hls_out, 1, "ap_fifo", "fifo_update", 6),
};
const char* HLS_Design_Meta::dut_name = "toplevel";
