uartPort_t *serialUART1(uint32_t baudRate, portMode_t mode, portOptions_t options) { uartPort_t *s; static volatile uint8_t rx1Buffer[UART1_RX_BUFFER_SIZE]; static volatile uint8_t tx1Buffer[UART1_TX_BUFFER_SIZE]; s = &uartPort1; s->port.vTable = uartVTable; s->port.baudRate = baudRate; s->port.rxBuffer = rx1Buffer; s->port.txBuffer = tx1Buffer; s->port.rxBufferSize = UART1_RX_BUFFER_SIZE; s->port.txBufferSize = UART1_TX_BUFFER_SIZE; #ifdef USE_UART1_RX_DMA s->rxDMAChannel = DMA1_Channel5; #endif s->txDMAChannel = DMA1_Channel4; s->USARTx = USART1; s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR; s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR; RCC_ClockCmd(RCC_APB2(USART1), ENABLE); RCC_ClockCmd(RCC_AHB(DMA1), ENABLE); serialUARTInit(IOGetByTag(IO_TAG(UART1_TX_PIN)), IOGetByTag(IO_TAG(UART1_RX_PIN)), mode, options, GPIO_AF_7, 1); dmaSetHandler(DMA1_CH4_HANDLER, handleUsartTxDma, NVIC_PRIO_SERIALUART1_TXDMA, (uint32_t)&uartPort1); #ifndef USE_UART1_RX_DMA NVIC_InitTypeDef NVIC_InitStructure; NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(NVIC_PRIO_SERIALUART1_RXDMA); NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(NVIC_PRIO_SERIALUART1_RXDMA); NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif return s; }
#include "drivers/accgyro/accgyro.h" #include "drivers/system.h" #include "drivers/sensor.h" #include "adc.h" #include "adc_impl.h" #include "drivers/io.h" #include "rcc.h" #include "dma.h" #ifndef ADC_INSTANCE #define ADC_INSTANCE ADC1 #endif const adcDevice_t adcHardware[] = { { .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Channelx = DMA1_Channel1 } }; ADCDevice adcDeviceByInstance(ADC_TypeDef *instance) { if (instance == ADC1) return ADCDEV_1; /* TODO -- ADC2 available on large 10x devices. if (instance == ADC2) return ADCDEV_2; */ return ADCINVALID; } const adcTagMap_t adcTagMap[] = {
* GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with Cleanflight. If not, see <http://www.gnu.org/licenses/>. */ #include <platform.h> #include "common/utils.h" #include "stm32f10x.h" #include "rcc.h" #include "timer.h" const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = { { .TIMx = TIM1, .rcc = RCC_APB2(TIM1), .inputIrq = TIM1_CC_IRQn }, { .TIMx = TIM2, .rcc = RCC_APB1(TIM2), .inputIrq = TIM2_IRQn }, { .TIMx = TIM3, .rcc = RCC_APB1(TIM3), .inputIrq = TIM3_IRQn }, { .TIMx = TIM4, .rcc = RCC_APB1(TIM4), .inputIrq = TIM4_IRQn }, #if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(STM32F10X_XL) || defined(STM32F10X_HD_VL) { .TIMx = TIM5, .rcc = RCC_APB1(TIM5), .inputIrq = TIM5_IRQn }, { .TIMx = TIM6, .rcc = RCC_APB1(TIM6), .inputIrq = 0 }, { .TIMx = TIM7, .rcc = RCC_APB1(TIM7), .inputIrq = 0 }, #endif #if defined(STM32F10X_XL) || defined(STM32F10X_HD_VL) { .TIMx = TIM8, .rcc = RCC_APB1(TIM8), .inputIrq = TIM8_CC_IRQn }, { .TIMx = TIM9, .rcc = RCC_APB2(TIM9), .inputIrq = TIM1_BRK_TIM9_IRQn }, { .TIMx = TIM10, .rcc = RCC_APB2(TIM10), .inputIrq = TIM1_UP_TIM10_IRQn }, { .TIMx = TIM11, .rcc = RCC_APB2(TIM11), .inputIrq = TIM1_TRG_COM_TIM11_IRQn }, { .TIMx = TIM12, .rcc = RCC_APB1(TIM12), .inputIrq = TIM12_IRQn }, { .TIMx = TIM13, .rcc = RCC_APB1(TIM13), .inputIrq = TIM13_IRQn },
{ .device = SPIDEV_1, .reg = SPI1, .sckPins = { { DEFIO_TAG_E(PA5) }, // { DEFIO_TAG_E(PB3) }, }, .misoPins = { { DEFIO_TAG_E(PA6) }, // { DEFIO_TAG_E(PB4) }, }, .mosiPins = { { DEFIO_TAG_E(PA7) }, // { DEFIO_TAG_E(PB5) }, }, .rcc = RCC_APB2(SPI1), }, { .device = SPIDEV_2, .reg = SPI2, .sckPins = { { DEFIO_TAG_E(PB13) }, // { DEFIO_TAG_E(PB3) }, }, .misoPins = { { DEFIO_TAG_E(PB14) }, // { DEFIO_TAG_E(PB4) }, }, .mosiPins = { { DEFIO_TAG_E(PB15) }, // { DEFIO_TAG_E(PB5) },
bool hcsr04Detect(rangefinderDev_t *dev, const sonarConfig_t * rangefinderHardwarePins) { bool detected = false; #ifdef STM32F10X // enable AFIO for EXTI support RCC_ClockCmd(RCC_APB2(AFIO), ENABLE); #endif #if defined(STM32F3) || defined(STM32F4) RCC_ClockCmd(RCC_APB2(SYSCFG), ENABLE); // XXX Do we need this? #endif triggerIO = IOGetByTag(rangefinderHardwarePins->triggerTag); echoIO = IOGetByTag(rangefinderHardwarePins->echoTag); if (IOGetOwner(triggerIO) != OWNER_FREE) { return false; } if (IOGetOwner(echoIO) != OWNER_FREE) { return false; } // trigger pin IOInit(triggerIO, OWNER_SONAR_TRIGGER, 0); IOConfigGPIO(triggerIO, IOCFG_OUT_PP); IOLo(triggerIO); delay(100); // echo pin IOInit(echoIO, OWNER_SONAR_ECHO, 0); IOConfigGPIO(echoIO, IOCFG_IN_FLOATING); // HC-SR04 echo line should be low by default and should return a response pulse when triggered if (IORead(echoIO) == false) { for (int i = 0; i < 5 && !detected; i++) { timeMs_t requestTime = millis(); hcsr04_start_reading(); while ((millis() - requestTime) < HCSR04_MinimumFiringIntervalMs) { if (IORead(echoIO) == true) { detected = true; break; } } } } if (detected) { // Hardware detected - configure the driver #ifdef USE_EXTI EXTIHandlerInit(&hcsr04_extiCallbackRec, hcsr04_extiHandler); EXTIConfig(echoIO, &hcsr04_extiCallbackRec, NVIC_PRIO_SONAR_EXTI, EXTI_Trigger_Rising_Falling); // TODO - priority! EXTIEnable(echoIO, true); #endif dev->delayMs = 100; dev->maxRangeCm = HCSR04_MAX_RANGE_CM; dev->detectionConeDeciDegrees = HCSR04_DETECTION_CONE_DECIDEGREES; dev->detectionConeExtendedDeciDegrees = HCSR04_DETECTION_CONE_EXTENDED_DECIDEGREES; dev->init = &hcsr04_init; dev->update = &hcsr04_update; dev->read = &hcsr04_get_distance; return true; } else { // Not detected - free resources IORelease(triggerIO); IORelease(echoIO); return false; } }
#ifndef SPI1_NSS_PIN #define SPI1_NSS_PIN NONE #endif #ifndef SPI2_NSS_PIN #define SPI2_NSS_PIN NONE #endif #ifndef SPI3_NSS_PIN #define SPI3_NSS_PIN NONE #endif #ifndef SPI4_NSS_PIN #define SPI4_NSS_PIN NONE #endif static spiDevice_t spiHardwareMap[] = { { .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, false }, { .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, false }, { .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF5_SPI3, false }, { .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, false } }; typedef struct{ SPI_HandleTypeDef Handle; }spiHandle_t; static spiHandle_t spiHandle[SPIDEV_MAX+1]; typedef struct{ DMA_HandleTypeDef Handle; }dmaHandle_t; static dmaHandle_t dmaHandle[SPIDEV_MAX+1];
// USART1 - Telemetry (RX/TX by DMA) uartPort_t *serialUART1(uint32_t baudRate, portMode_t mode, portOptions_t options) { uartPort_t *s; static volatile uint8_t rx1Buffer[UART1_RX_BUFFER_SIZE]; static volatile uint8_t tx1Buffer[UART1_TX_BUFFER_SIZE]; s = &uartPort1; s->port.vTable = uartVTable; s->port.baudRate = baudRate; s->port.rxBuffer = rx1Buffer; s->port.txBuffer = tx1Buffer; s->port.rxBufferSize = UART1_RX_BUFFER_SIZE; s->port.txBufferSize = UART1_TX_BUFFER_SIZE; s->USARTx = USART1; #ifdef USE_UART1_RX_DMA dmaInit(DMA1_CH5_HANDLER, OWNER_SERIAL_RX, 1); s->rxDMAChannel = DMA1_Channel5; s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR; #endif s->txDMAChannel = DMA1_Channel4; s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR; RCC_ClockCmd(RCC_APB2(USART1), ENABLE); // UART1_TX PA9 // UART1_RX PA10 if (options & SERIAL_BIDIR) { IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL_TX, 1); IOConfigGPIO(IOGetByTag(IO_TAG(PA9)), IOCFG_AF_OD); } else { if (mode & MODE_TX) { IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL_TX, 1); IOConfigGPIO(IOGetByTag(IO_TAG(PA9)), IOCFG_AF_PP); } if (mode & MODE_RX) { IOInit(IOGetByTag(IO_TAG(PA10)), OWNER_SERIAL_RX, 1); IOConfigGPIO(IOGetByTag(IO_TAG(PA10)), IOCFG_IPU); } } // DMA TX Interrupt dmaInit(DMA1_CH4_HANDLER, OWNER_SERIAL_TX, 1); dmaSetHandler(DMA1_CH4_HANDLER, uart_tx_dma_IRQHandler, NVIC_PRIO_SERIALUART1_TXDMA, (uint32_t)&uartPort1); #ifndef USE_UART1_RX_DMA // RX/TX Interrupt NVIC_InitTypeDef NVIC_InitStructure; NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(NVIC_PRIO_SERIALUART1); NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(NVIC_PRIO_SERIALUART1); NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif return s; }
#ifndef SPI1_NSS_PIN #define SPI1_NSS_PIN NONE #endif #ifndef SPI2_NSS_PIN #define SPI2_NSS_PIN NONE #endif #ifndef SPI3_NSS_PIN #define SPI3_NSS_PIN NONE #endif #ifndef SPI4_NSS_PIN #define SPI4_NSS_PIN NONE #endif static spiDevice_t spiHardwareMap[] = { { .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, .leadingEdge = false, .dmaIrqHandler = DMA2_ST3_HANDLER }, { .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, .leadingEdge = false, .dmaIrqHandler = DMA1_ST4_HANDLER }, { .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF6_SPI3, .leadingEdge = false, .dmaIrqHandler = DMA1_ST7_HANDLER }, { .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, .leadingEdge = false, .dmaIrqHandler = DMA2_ST1_HANDLER } }; SPIDevice spiDeviceByInstance(SPI_TypeDef *instance) { if (instance == SPI1) return SPIDEV_1; if (instance == SPI2) return SPIDEV_2; if (instance == SPI3) return SPIDEV_3;
#include "io_impl.h" #include "rcc.h" #include "dma.h" #include "sensor.h" #include "accgyro.h" #include "adc.h" #include "adc_impl.h" #ifndef ADC_INSTANCE #define ADC_INSTANCE ADC1 #endif const adcDevice_t adcHardware[] = { { .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Streamx = DMA2_Stream4, .channel = DMA_Channel_0 }, //{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 } }; /* note these could be packed up for saving space */ const adcTagMap_t adcTagMap[] = { /* { DEFIO_TAG_E__PF3, ADC_Channel_9 }, { DEFIO_TAG_E__PF4, ADC_Channel_14 }, { DEFIO_TAG_E__PF5, ADC_Channel_15 }, { DEFIO_TAG_E__PF6, ADC_Channel_4 }, { DEFIO_TAG_E__PF7, ADC_Channel_5 }, { DEFIO_TAG_E__PF8, ADC_Channel_6 }, { DEFIO_TAG_E__PF9, ADC_Channel_7 }, { DEFIO_TAG_E__PF10, ADC_Channel_8 }, */
#include "dma.h" #include "drivers/sensor.h" #include "adc.h" #include "adc_impl.h" #include "pg/adc.h" #ifndef ADC_INSTANCE #define ADC_INSTANCE ADC1 #endif const adcDevice_t adcHardware[] = { { .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Streamx = ADC1_DMA_STREAM, .channel = DMA_CHANNEL_0 }, { .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = ADC2_DMA_STREAM, .channel = DMA_CHANNEL_1 }, { .ADCx = ADC3, .rccADC = RCC_APB2(ADC3), .DMAy_Streamx = ADC3_DMA_STREAM, .channel = DMA_CHANNEL_2 } }; /* note these could be packed up for saving space */ const adcTagMap_t adcTagMap[] = { /* { DEFIO_TAG_E__PF3, ADC_DEVICES_3, ADC_CHANNEL_9 }, { DEFIO_TAG_E__PF4, ADC_DEVICES_3, ADC_CHANNEL_14 }, { DEFIO_TAG_E__PF5, ADC_DEVICES_3, ADC_CHANNEL_15 }, { DEFIO_TAG_E__PF6, ADC_DEVICES_3, ADC_CHANNEL_4 }, { DEFIO_TAG_E__PF7, ADC_DEVICES_3, ADC_CHANNEL_5 }, { DEFIO_TAG_E__PF8, ADC_DEVICES_3, ADC_CHANNEL_6 }, { DEFIO_TAG_E__PF9, ADC_DEVICES_3, ADC_CHANNEL_7 }, { DEFIO_TAG_E__PF10,ADC_DEVICES_3, ADC_CHANNEL_8 },