void RCC_Configuration(void)
{
RCC_DeInit();
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
FLASH_SetLatency(FLASH_Latency_2);
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16);
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource()!=0x08);
}
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);//72
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);//36
}
void RCC_Configuration(void)
{
RCC_DeInit (); /* RCC system reset(for debug purpose)*/
RCC_HSEConfig (RCC_HSE_ON); /* Enable HSE */
/* Wait till HSE is ready */
while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);
RCC_HCLKConfig (RCC_SYSCLK_Div1); /* HCLK = SYSCLK */
RCC_PCLK2Config (RCC_HCLK_Div1); /* PCLK2 = HCLK */
RCC_PCLK1Config (RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */
FLASH_SetLatency(FLASH_Latency_2); /* Flash 2 wait state */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig (RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
RCC_PLLCmd (ENABLE); /* Enable PLL */
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
/* Select PLL as system clock source */
RCC_SYSCLKConfig (RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08);
}
// Clocks
void RCC_Config(void) {
ErrorStatus HSEStartUpStatus;
// Configuration of SYSCLK, HCLK, PCLK2 + PCLK1
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS) {
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
// PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while (RCC_GetSYSCLKSource() != 0x08) {}
/* Enable GPIOA clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC, ENABLE);
} else {
// HSE start error - clock configuration will be wrong
// maybe say about it?
while (1) {}
}
}
/*******************************************************************************
* System Clock Configuration
*******************************************************************************/
void Set_System(void)
{
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
FLASH_SetLatency(FLASH_Latency_2); //Flash 2 wait state
RCC_HCLKConfig(RCC_SYSCLK_Div1); //HCLK = SYSCLK
RCC_PCLK2Config(RCC_HCLK_Div1); //PCLK2 = HCLK
RCC_PCLK1Config(RCC_HCLK_Div2); //PCLK1 = HCLK/2
RCC_ADCCLKConfig(RCC_PCLK2_Div4); //ADCCLK = PCLK2/4 = 18MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); //PLLCLK = 72 MHz
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource()!=0x08){}
}
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA, ENABLE);
RCC_APB2PeriphClockCmd(
RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_GPIOA |
RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO | RCC_APB2Periph_TIM1, ENABLE);
RCC_APB1PeriphClockCmd(
RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 |
RCC_APB1Periph_SPI2, ENABLE);
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5); //USBCLK = 48MHz
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); //Enable USB clock
}
void RCC_Config(void)
//konfigurowanie sygnalow taktujacych
{
ErrorStatus HSEStartUpStatus; //zmienna opisujaca rezultat uruchomienia HSE
RCC_DeInit(); //Reset ustawien RCC
RCC_HSEConfig(RCC_HSE_ON); //Wlaczenie HSE
HSEStartUpStatus = RCC_WaitForHSEStartUp(); //Odczekaj az HSE bedzie gotowy
if(HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);//
FLASH_SetLatency(FLASH_Latency_2); //ustaw zwloke dla pamieci Flash; zaleznie od taktowania rdzenia
//0:<24MHz; 1:24~48MHz; 2:>48MHz
RCC_HCLKConfig(RCC_SYSCLK_Div1); //ustaw HCLK=SYSCLK
RCC_PCLK2Config(RCC_HCLK_Div1); //ustaw PCLK2=HCLK
RCC_PCLK1Config(RCC_HCLK_Div2); //ustaw PCLK1=HCLK/2
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); //ustaw PLLCLK = HSE*9 czyli 8MHz * 9 = 72 MHz
RCC_PLLCmd(ENABLE); //wlacz PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //odczekaj na poprawne uruchomienie PLL
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //ustaw PLL jako zrodlo sygnalu zegarowego
while(RCC_GetSYSCLKSource() != 0x08); //odczekaj az PLL bedzie sygnalem zegarowym systemu
/*Tu nalezy umiescic kod zwiazany z konfiguracja sygnalow zegarowych potrzebnych w programie peryferiow*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);//wlacz taktowanie portu GPIO A
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);//wlacz taktowanie portu GPIO B
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);//wlacz taktowanie portu GPIO C
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); //wlacz taktowanie SPI
//RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); //wlacz taktowanie funkcji alternatywnych GPIO
} else {
}
}
void RCC_Config_HSI_PLL_Max(void){
RCC_DeInit();
FLASH_SetLatency(FLASH_Latency_2);
/*configurar clock a 64Mhz (max)*/
//divisão do prescaler AHB por 1
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//divisão do prescaler APB1 por 2
RCC_PCLK1Config(RCC_HCLK_Div2);
//divisão do prescaler APB2 por 1
RCC_PCLK2Config(RCC_HCLK_Div1);
//é usado a PLL com a source HSI (clock interno) e 16 de factor multiplicativo
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16);
//depois de configurado a PLL fazer enable
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus( RCC_FLAG_PLLRDY)==RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//garantir que o clock da pll está correcto
while(RCC_GetSYSCLKSource()!=0x08);
}
/**
* @brief Restore peripheral config before entering STOP mode.
* @param None
* @retval None
*/
static void RestoreConfiguration(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready and if Time out is reached exit */
HSEStatus = RCC_WaitForHSEStartUp();
if (HSEStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer */
FLASH_SetLatency(FLASH_Latency_1);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK = HCLK */
RCC_PCLKConfig(RCC_HCLK_Div1);
/* PLL configuration: = HSE * 6 = 48 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Div1);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_CFGR_PLLMULL6);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
}
}
uint8_t sysclockInit(void)
{
ErrorStatus HSEStartUpStatus;
RCC_DeInit();/* RCC重置 */
RCC_HSEConfig(RCC_HSE_ON); /*使能HSE*/
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS) //外部晶振使能成功
{
RCC_HCLKConfig(RCC_SYSCLK_Div1); /* 配置HCLK = SYSCLK */
RCC_PCLK2Config(RCC_HCLK_Div1); /* 配置PCLK2 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div2); /* 配置PCLK1 = HCLK/2 */
FLASH_SetLatency(FLASH_Latency_2);
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* RCC_PLLSource_HSE_Div1为外置晶振的分频系数;RCC_PLLMul_9为倍频数 */
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //等待pll工作
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* 选定PLL为系统主时钟 */
while(RCC_GetSYSCLKSource() != 0x08); //判断pll是否为系统时钟
return 1;
}
else
return 0;
}
void init_HSI_24MHz(void) {
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/6 10.67MHz */
RCC_ADCCLKConfig(RCC_PCLK2_Div2);
/* PLLCLK = 4MHz * 6 = 24 MHz */
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_6);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08);
}
void RCC_Configuration(void)
{
RCC_DeInit(); // RCC system reset(for debug purpose)
RCC_HSEConfig(RCC_HSE_ON); // Enable HSE
HSEStartUpStatus = RCC_WaitForHSEStartUp(); // Wait till HSE is ready
if(HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //开启FLASH预读缓冲功能，加速FLASH的读取。所有程序中必须的用法.位置：RCC初始化子函数里面，时钟起振之后
FLASH_SetLatency(FLASH_Latency_2); //flash操作的延时
RCC_HCLKConfig(RCC_SYSCLK_Div1); //HCLK = SYSCLK
RCC_PCLK2Config(RCC_HCLK_Div1); // PCLK2 = HCLK
RCC_PCLK1Config(RCC_HCLK_Div2); // PCLK1 = HCLK/2
FLASH_SetLatency(FLASH_Latency_2); // Flash 2 wait state
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); // Enable Prefetch Buffer
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); // PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLCmd(ENABLE); // Enable PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) // Wait till PLL is ready
{
}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); // Select PLL as system clock source
while(RCC_GetSYSCLKSource() != 0x08) // Wait till PLL is used as system clock source
{
}
}
}
//----------------------------------------------------------------------------
void RCC_Configuration(void)
{
unsigned int startDelay;
RCC_DeInit(); //-- RCC system reset(for debug purpose)
RCC_HSICmd(ENABLE);
RCC_HSEConfig(RCC_HSE_OFF);
// delay_40ms
startDelay = 960000;
while (startDelay) startDelay--;
//-- Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(ENABLE);
FLASH_SetLatency(FLASH_Latency_3); //-- Flash 3 wait state for 120MHz
//-- PLLCLK = 16MHz/16 * 240/2 = 120 MHz
RCC_PLLCmd(DISABLE);
RCC_HCLKConfig (RCC_SYSCLK_Div1 ) ;
RCC_PCLK1Config ( RCC_HCLK_Div4) ;
RCC_PCLK2Config ( RCC_HCLK_Div2) ;
RCC_PLLConfig(RCC_PLLSource_HSI, TPLL_M, TPLL_N, TPLL_P, TPLL_Q);
//
// //-- Enable PLL & wait till PLL is ready
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
// startDelay = 240000;
// while (startDelay) startDelay--;
// //-- Select PLL as system clock source & wait till PLL is used
// //-- as system clock source
startDelay = 10000;
while (startDelay) startDelay--;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// while(RCC_GetSYSCLKSource() != 0x08);
//
// RCC_ADCCLKConfig(RCC_PCLK2_Div4);
startDelay = RCC_GetSYSCLKSource() ;
/* DMA clock enable */
RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_DMA2 |
RCC_AHB1Periph_BKPSRAM,
ENABLE);
/* Enable USART2 clock */
// uart4 rs-485, uart6 irps
RCC_APB1PeriphClockCmd( RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 |
RCC_APB1Periph_PWR | RCC_APB1Periph_TIM2,
ENABLE);
/* Enable USART1, GPIOA, GPIOx and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 |
RCC_APB2Periph_USART1 ,
ENABLE);
RCC_AHB3PeriphClockCmd ( RCC_AHB3Periph_FSMC ,
ENABLE);
}
/************************************************************************************************
** Function name :
** Description :配置48M系统时钟
** RCC配置(使用外部8MHz晶振)，6倍频
** Input :
** Output :
** Return :
** Others :
**
************************************************************************************************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
//SystemInit();
/*将外设RCC寄存器重设为缺省值 */
RCC_DeInit();
/*设置外部高速晶振（HSE）*/
RCC_HSEConfig(RCC_HSE_ON); //RCC_HSE_ON——HSE晶振打开(ON)
/*等待HSE起振*/
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS){ //SUCCESS：HSE晶振稳定且就绪
/*设置AHB时钟（HCLK）*/
RCC_HCLKConfig(RCC_SYSCLK_Div1); //RCC_SYSCLK_Div1——AHB时钟 = 系统时钟
/* 设置高速AHB时钟（PCLK2）*/
RCC_PCLK2Config(RCC_HCLK_Div1); //RCC_HCLK_Div1——APB2时钟 = HCLK
/*设置低速AHB时钟（PCLK1）*/
RCC_PCLK1Config(RCC_HCLK_Div2); //RCC_HCLK_Div2——APB1时钟 = HCLK / 2
/*设置FLASH存储器延时时钟周期数*/
FLASH_SetLatency(FLASH_Latency_2); //FLASH_Latency_2 2延时周期
/*选择FLASH预取指缓存的模式*/
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); // 预取指缓存使能
/*设置PLL时钟源及倍频系数*/
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6); // PLL的输入时钟 = HSE时钟频率；RCC_PLLMul_5——PLL输入时钟x 5
/*使能PLL */
RCC_PLLCmd(ENABLE);
/*检查指定的RCC标志位(PLL准备好标志)设置与否*/
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){
}
/*设置系统时钟（SYSCLK） */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //RCC_SYSCLKSource_PLLCLK——选择PLL作为系统时钟
/* PLL返回用作系统时钟的时钟源*/
while(RCC_GetSYSCLKSource() != 0x08); //0x08：PLL作为系统时钟 { }
}
}
void Clk_Init (void)
{
// 1. Cloking the controller from internal HSI RC (8 MHz)
RCC_HSICmd(ENABLE);
// wait until the HSI is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
// 2. Enable ext. high frequency OSC
RCC_HSEConfig(RCC_HSE_ON);
// wait until the HSE is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);
// 3. Init PLL
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); // 72MHz
// RCC_PLLConfig(RCC_PLLSource_HSE_Div2,RCC_PLLMul_9); // 72MHz
RCC_PLLCmd(ENABLE);
// wait until the PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
// 4. Set system clock divders
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5);
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// Flash 1 wait state
*(vu32 *)0x40022000 = 0x12;
// 5. Clock system from PLL
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
}
/**
* @brief Restore peripheral config before entering DEEPSLEEP mode.
* @param None
* @retval None
*/
static void RestoreConfiguration(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* SYSCLK, HCLK, PCLK configuration */
/* Enable HSE */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready and if Time out is reached exit */
HSEStatus = RCC_WaitForHSEStartUp();
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC_AHBConfig(RCC_SYSCLK_DIV1);
/* PCLK = HCLK */
RCC_APB1Config(RCC_APB1AHB_DIV1);
/* PLL configuration: = HSE * 6 = 48 MHz */
RCC_HSEPREDVConfig(RCC_HSEPREDV1_DIV1);
RCC_PLLConfig(RCC_PLLSOURCE_HSEPREDIV, RCC_GCFGR_PLLMF6);
/* Enable PLL */
RCC_PLL_Enable(ENABLE);
/* PLL as system clock source */
RCC_CK_SYSConfig(RCC_SYSCLKSOURCE_PLLCLK);
}
}
/*
********************************************************************************
** 函数名称 ： RCC_Configuration(void)
** 函数功能 ： 时钟初始化
** 输 入 ： 无
** 输 出 ： 无
** 返 回 ： 无
********************************************************************************
*/
void RCC_Configuration(void)
{
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
FLASH_SetLatency(FLASH_Latency_2);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)==RESET)
{
}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
void clk_init(void)
{
// disable external oscillator so we can use pins PF0 , PF1
RCC_HSEConfig(RCC_HSE_OFF);
// this should be enabled already
RCC_HSI_Enable(ENABLE);
// wait for HSI to stabilize
// this is redundant
while( !RCC_GetBitState(RCC_FLAG_HSISTB) );
// this should be enabled already
RCC_CK_SYSConfig(RCC_SYSCLKSOURCE_HSI);
RCC_PLLConfig(RCC_PLLSOURCE_HSI_DIV2 , 18);
RCC_PLL_Enable(ENABLE);
// wait for pll to stablilize
// this is redundant
while( !RCC_GetBitState(RCC_FLAG_PLLSTB) );
RCC_CK_SYSConfig(RCC_SYSCLKSOURCE_PLLCLK);
// wait for clock to change to pll
while ((RCC->GCFGR & (uint32_t)RCC_GCFGR_SCSS) != (uint32_t)RCC_GCFGR_SCSS_PLL);
RCC_AHBConfig(RCC_SYSCLK_DIV1); // config ahb clock divider
RCC_APB1Config(RCC_APB1AHB_DIV1);
RCC_APB2Config(RCC_APB2AHB_DIV1);
}
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus; //原本是定义在全局变量中
RCC_DeInit(); //时钟控制寄存器全部恢复默认值
RCC_HSEConfig(RCC_HSE_ON); //外部高速时钟源开启（8M晶振）
HSEStartUpStatus = RCC_WaitForHSEStartUp(); //等待外部时钟就绪
if(HSEStartUpStatus == SUCCESS) //如果时钟启动成功
{
RCC_HCLKConfig(RCC_SYSCLK_Div1); //定义AHB设备时钟为系统时钟1分频
RCC_PCLK2Config(RCC_HCLK_Div1); //定义AHB2设备时钟为HCLK时钟1分频
RCC_PCLK1Config(RCC_HCLK_Div2); //定义AHB1设备时钟为HCLK时钟2分频
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
FLASH_SetLatency(FLASH_Latency_2); //设定内部FLASH的的延时周期为2周期
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //使能FLASH预存取缓冲区
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); //配置PLL时钟为外部高速时钟的9倍频，8MHz * 9 = 72 MHz
RCC_PLLCmd(ENABLE); //使能PLL时钟
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){} //等待PLL时钟设置完成准备就绪
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //使用PLL时钟作为系统时钟源
while(RCC_GetSYSCLKSource() != 0x08){} //返回系统所用时钟源确认为外部高速晶振，8M晶振。
}
// //释放JTAG占用的A13 A14 A15 B3 B4 A14不能拉高 A13不能拉低
// RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE);
// GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable , ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC, ENABLE);
// RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); //打开FSMC时钟
}
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
RCC_DeInit(); /* RCC system reset(for debug purpose) */
RCC_HSEConfig(RCC_HSE_ON); /* Enable HSE */
HSEStartUpStatus = RCC_WaitForHSEStartUp(); /* Wait till HSE is ready */
if(HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Enable Prefetch Buffer */
FLASH_SetLatency(FLASH_Latency_2); /* Flash 2 wait state */
RCC_HCLKConfig(RCC_SYSCLK_Div1); /* HCLK = SYSCLK */
RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK2 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div2); /* PCLK1 = HCLK/2 */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLCmd(ENABLE); /* Enable PLL */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Wait till PLL is ready */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Select PLL as system clock source */
while(RCC_GetSYSCLKSource() != 0x08) {} /* Wait till PLL is used as system clock source */
}
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
//RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // For IIN Chip EXTI
}
void RCC_Configuration(void)
{
ErrorStatus HSEStartupStatus;
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
HSEStartupStatus = RCC_WaitForHSEStartUp();
if(HSEStartupStatus == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
FLASH_SetLatency(FLASH_Latency_2);
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() != 0x08);
}
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA
,ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
}
//配置系统时钟
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus; //定义外部高速晶体启动状态枚举变量
RCC_DeInit(); //复位RCC外部设备寄存器到默认值
RCC_HSEConfig(RCC_HSE_ON); //打开外部高速晶振
HSEStartUpStatus = RCC_WaitForHSEStartUp(); //等待外部高速时钟准备好
if(HSEStartUpStatus == SUCCESS) //外部高速时钟已经准别好
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //开启FLASH预读缓冲功能，加速FLASH的读取。所有程序中必须的用法.位置：RCC初始化子函数里面，时钟起振之后
FLASH_SetLatency(FLASH_Latency_2); //flash操作的延时
RCC_HCLKConfig(RCC_SYSCLK_Div1); //配置AHB(HCLK)时钟等于==SYSCLK
RCC_PCLK2Config(RCC_HCLK_Div1); //配置APB2(PCLK2)钟==AHB时钟
RCC_PCLK1Config(RCC_HCLK_Div2); //配置APB1(PCLK1)钟==AHB1/2时钟
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); //配置PLL时钟 == 外部高速晶体时钟 * 9 = 72MHz
RCC_PLLCmd(ENABLE); //使能PLL时钟
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) //等待PLL时钟就绪
{
}
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //配置系统时钟 = PLL时钟
while(RCC_GetSYSCLKSource() != 0x08) //检查PLL时钟是否作为系统时钟
{
}
}
}
/**
* @brief Configures the different system clocks.
* @param None
* @retval : None
*/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/4 */
RCC_ADCCLKConfig(RCC_PCLK2_Div4);
/* PLLCLK = 8MHz * 7 = 56 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable DMA1 and DMA2 clocks */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_DMA2, ENABLE);
/* Enable ADC1, ADC2, ADC3 and GPIOC clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 |
RCC_APB2Periph_ADC3 | RCC_APB2Periph_GPIOC, ENABLE);
}
static void prvSetupHardware( void )
{
/* Start with the clocks in their expected state. */
RCC_DeInit();
/* Enable HSE (high speed external clock). */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready. */
while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET )
{
}
/* 2 wait states required on the flash. */
*( ( unsigned long * ) 0x40022000 ) = 0x02;
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1 );
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1 );
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config( RCC_HCLK_Div2 );
/* PLLCLK = (25MHz / 2 ) * 5 = 62.5 MHz. */
RCC_PLLConfig( RCC_PLLSource_HSE_Div2, RCC_PLLMul_5 );
/* Enable PLL. */
RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source. */
RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK );
/* Wait till PLL is used as system clock source. */
while( RCC_GetSYSCLKSource() != 0x08 )
{
}
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE );
/* Set the Vector Table base address at 0x08000000 */
NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */
SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );
/* Initialise the IO used for the LED outputs. */
vParTestInitialise();
}
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable USART1 and GPIOB clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOB, ENABLE);
/* Enable USART3 clocks */
RCC_APB1PeriphClockCmd ( RCC_APB1Periph_USART3 | RCC_APB1Periph_TIM2, ENABLE);
PWR_BackupAccessCmd(ENABLE);
}
static void prvSetupHardware( void )
{
/* RCC system reset(for debug purpose). */
RCC_DeInit ();
/* Enable HSE. */
RCC_HSEConfig( RCC_HSE_ON );
/* Wait till HSE is ready. */
while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);
/* HCLK = SYSCLK. */
RCC_HCLKConfig( RCC_SYSCLK_Div1 );
/* PCLK2 = HCLK. */
RCC_PCLK2Config( RCC_HCLK_Div1 );
/* PCLK1 = HCLK/2. */
RCC_PCLK1Config( RCC_HCLK_Div2 );
/* ADCCLK = PCLK2/4. */
RCC_ADCCLKConfig( RCC_PCLK2_Div4 );
/* Flash 2 wait state. */
*( volatile unsigned long * )0x40022000 = 0x01;
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 );
/* Enable PLL. */
RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
/* Select PLL as system clock source. */
RCC_SYSCLKConfig (RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source. */
while (RCC_GetSYSCLKSource() != 0x08);
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC
| RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE );
/* Set the Vector Table base address at 0x08000000. */
NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */
SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );
/* Initialise the IO used for the LED outputs. */
vParTestInitialise();
/* SPI2 Periph clock enable */
RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE );
}
static void sys_clk_init(void)
{
ErrorStatus HSEStartUpStatus;
// set clocks registers back to defaults (for debugging, st_demo)
RCC_DeInit();
// enable the high speed external osc (HSE) and spin for it to stabilise
RCC_HSEConfig(RCC_HSE_ON);
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus != SUCCESS)
{
///@todo handle error better
while (1)
{}
}
// Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(ENABLE);
// Flash 1 wait state
FLASH_SetLatency(FLASH_Latency_5);
// Setup the PLLCLK source and pre scaler for the following clocks
// PLLCLK = 8MHz * 336[N] / (8[M] * 2[P]) = 168MHz
// PLLCLK = 8MHz * 336[N] / (8[M] * 7[Q]) = 48MHz
/* Setup the PLLCLK source and pre scaler */
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
// AHB prescaler set to div 1, HCLK = SYSCLK (168MHz [max])
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// APB2 (high speed) prescaler set to div 2, APB2 = HCLK / 2 = 84MHz [max]
RCC_PCLK2Config(RCC_HCLK_Div2);
// APB1 (low speed) prescaler set to div 4, APB1 = HCLK / 4 = 42MHz [max]
RCC_PCLK1Config(RCC_HCLK_Div4);
// Enable the PLL and spin for it to be ready
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
// Switch the system clock over to the PLL output and spin until it is ready
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() != 0x08) ;
// enable backup register domain clocks incase they are not enabled
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
PWR_BackupAccessCmd(ENABLE);
RCC_RTCCLKConfig(RCC_RTCCLKSource_HSE_Div31);
RCC_RTCCLKCmd(ENABLE);
#ifdef DEBUG_MCO
/* this is a handy debugging option to output the sys_clk/4 to the MCO1 pin
* it must be sys_clk/4 as gpio can only output 50MHz max, so 168MHz/4 = 42MHz */
RCC_MCO1Config(RCC_MCO1Source_PLLCLK, RCC_MCO1Div_4);
#endif
}
void mcu_arch_init(void) {
#ifdef USE_OPENCM3
rcc_clock_setup_in_hse_12mhz_out_72mhz();
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
return;
#endif
#ifdef HSE_TYPE_EXT_CLK
#warning Info: Using external clock
/* Setup the microcontroller system.
* Initialize the Embedded Flash Interface,
* initialize the PLL and update the SystemFrequency variable.
*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE with external clock ( HSE_Bypass ) */
RCC_HSEConfig( STM32_RCC_MODE );
/* Wait till HSE is ready */
ErrorStatus HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus != SUCCESS) {
/* block if something went wrong */
while(1) {}
}
else {
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, STM32_PLL_MULT);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08) {}
}
#else /* HSE_TYPE_EXT_CLK */
#warning Using normal system clock setup
SystemInit();
#endif /* HSE_TYPE_EXT_CLK */
/* Set the Vector Table base location at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#ifdef STM32_FORCE_ALL_CLOCK_ON
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE);
#endif
}
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK/1 */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/8 */
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* Periph clock enable 72M max*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_USART1 |
RCC_APB2Periph_SPI1 | RCC_APB2Periph_ADC1 | RCC_APB2Periph_AFIO, ENABLE);
/* Periph clock enable 36M max*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2 | RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 |
RCC_APB1Periph_TIM4 | RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
}
void initClocks() {
// enable HSI and set it as the system clock source
RCC_HSICmd(ENABLE);
while(!(RCC->CR & RCC_CR_HSIRDY)); // wait for it to be ready
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
// disable PLL and PLLI2S
RCC_PLLCmd(DISABLE);
RCC_PLLI2SCmd(DISABLE);
// disable HSE and CSS (disabling the HSE also disables CSS)
RCC_HSEConfig(RCC_HSE_OFF);
// Configure PLL values and set source to HSE
RCC_PLLConfig(
RCC_PLLSource_HSE,
DESIRED_PLL_M,
DESIRED_PLL_N,
DESIRED_PLL_P,
DESIRED_PLL_Q
);
// set PLL I2S to our new values
RCC_PLLI2SConfig(
DESIRED_PLL_I2S_N,
DESIRED_PLL_I2S_R
);
// set I2S clock source to PLLI2S
RCC_I2SCLKConfig(RCC_I2S2CLKSource_PLLI2S);
// set AHB, APB1, APB2 prescalers
RCC_HCLKConfig(DESIRED_HCLK_DIV);
RCC_PCLK1Config(DESIRED_PCLK1_DIV);
RCC_PCLK2Config(DESIRED_PCKL2_DIV);
// enable HSE
RCC_HSEConfig(RCC_HSE_ON);
if(RCC_WaitForHSEStartUp() == ERROR) RCC_DeInit(); // SHUT DOWN, EVERYTHING!
// enable CSS
RCC_ClockSecuritySystemCmd(ENABLE);
// enable PLL
RCC_PLLCmd(ENABLE);
while(!(RCC->CR & RCC_CR_PLLRDY)); // wait for ready
// enable PLL I2S
RCC_PLLI2SCmd(ENABLE);
// set system clock source to PLL
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
if(!checkClocks()){
// No actual error reporting done here because we don't want to depend on GPIO etc
while(1);
}
}
/***************************************************************************//**
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
******************************************************************************/
void SetSysClockTo72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig( RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd( FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency( FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config( RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(0x00010000, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd( ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{
}
}
}
/**
* @brief Configures the different system clocks.
* @param None
* @retval : None
*/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/4 */
RCC_PCLK1Config(RCC_HCLK_Div16);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
/* TIM4 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* GPIOA and GPIOB clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
if (SysTick_Config(72000000 / 1000))
{
/* Capture error */
while (1);
}
}