static void jz_board_do_resume(unsigned long *ptr) { unsigned char i; /* Restore GPIO registers */ for(i = 1; i < GPIO_PORT_NUM; i++) { REG_GPIO_PXFUNS(i) = *ptr; REG_GPIO_PXFUNC(i) = ~(*ptr++); REG_GPIO_PXSELS(i) = *ptr; REG_GPIO_PXSELC(i) = ~(*ptr++); REG_GPIO_PXDIRS(i) = *ptr; REG_GPIO_PXDIRC(i) = ~(*ptr++); REG_GPIO_PXPES(i) = *ptr; REG_GPIO_PXPEC(i) = ~(*ptr++); REG_GPIO_PXIMS(i)=*ptr; REG_GPIO_PXIMC(i)=~(*ptr++); REG_GPIO_PXDATS(i)=*ptr; REG_GPIO_PXDATC(i)=~(*ptr++); REG_GPIO_PXTRGS(i)=*ptr; REG_GPIO_PXTRGC(i)=~(*ptr++); } /* Print messages of GPIO registers for debug */ for(i=0;i<GPIO_PORT_NUM;i++) { dprintk("resume dat:%x pin:%x fun:%x sel:%x dir:%x pull:%x msk:%x trg:%x\n", \ REG_GPIO_PXDAT(i),REG_GPIO_PXPIN(i),REG_GPIO_PXFUN(i),REG_GPIO_PXSEL(i), \ REG_GPIO_PXDIR(i),REG_GPIO_PXPE(i),REG_GPIO_PXIM(i),REG_GPIO_PXTRG(i)); } }
void board_save_gpio(unsigned int *ptr){ int i = 0; for(i = 0; i < GPIO_PORT_NUM; i++) { *ptr++ = REG_GPIO_PXFUN(i); *ptr++ = REG_GPIO_PXSEL(i); *ptr++ = REG_GPIO_PXDIR(i); *ptr++ = REG_GPIO_PXPE(i); *ptr++ = REG_GPIO_PXIM(i); *ptr++ = REG_GPIO_PXDAT(i); *ptr++ = REG_GPIO_PXTRG(i); } return; }
/* NOTES: * 1: Pins that are floated (NC) should be set as input and pull-enable. * 2: Pins that are pull-up or pull-down by outside should be set as input * and pull-disable. * 3: Pins that are connected to a chip except sdram and nand flash * should be set as input and pull-disable, too. */ static void jz_board_do_sleep(unsigned long *ptr) { unsigned char i; /* Print messages of GPIO registers for debug */ for(i=0;i<GPIO_PORT_NUM;i++) { dprintk("run dat:%x pin:%x fun:%x sel:%x dir:%x pull:%x msk:%x trg:%x\n", \ REG_GPIO_PXDAT(i),REG_GPIO_PXPIN(i),REG_GPIO_PXFUN(i),REG_GPIO_PXSEL(i), \ REG_GPIO_PXDIR(i),REG_GPIO_PXPE(i),REG_GPIO_PXIM(i),REG_GPIO_PXTRG(i)); } /* Save GPIO registers */ for(i = 1; i < GPIO_PORT_NUM; i++) { *ptr++ = REG_GPIO_PXFUN(i); *ptr++ = REG_GPIO_PXSEL(i); *ptr++ = REG_GPIO_PXDIR(i); *ptr++ = REG_GPIO_PXPE(i); *ptr++ = REG_GPIO_PXIM(i); *ptr++ = REG_GPIO_PXDAT(i); *ptr++ = REG_GPIO_PXTRG(i); } /* * Set all pins to pull-disable, and set all pins as input except * sdram and the pins which can be used as CS1_N to CS4_N for chip select. */ __gpio_as_sleep(); /* * Set proper status for GPC21 to GPC24 which can be used as CS1_N to CS4_N. * Keep the pins' function used for chip select(CS) here according to your * system to avoid chip select crashing with sdram when resuming from sleep mode. */ #if defined(CONFIG_JZ4750L_APUS) /* GPB25/CS1_N is used as chip select for nand flash, shouldn't be change. */ /* GPB26/CS2_N is connected to nand flash, needn't be changed. */ /* GPB28/CS3_N is used as cs8900's chip select, shouldn't be changed. */ /* GPB27/CS4_N is used as NOR's chip select, shouldn't be changed. */ #endif /* * Enable pull for NC pins here according to your system */ #if defined(CONFIG_JZ4750L_APUS) #endif /* * If you must set some GPIOs as output to high level or low level, * you can set them here, using: * __gpio_as_output(n); * __gpio_set_pin(n); or __gpio_clear_pin(n); */ #if defined(CONFIG_JZ4750L_APUS) /* GPC7 which is used as AMPEN_N should be set to high to disable audio amplifier */ __gpio_as_output(32*2+7); __gpio_set_pin(32*2+7); #endif #ifdef DEBUG /* Keep uart function for printing debug message */ __gpio_as_uart0(); __gpio_as_uart1(); __gpio_as_uart2(); __gpio_as_uart3(); /* Print messages of GPIO registers for debug */ for(i=0;i<GPIO_PORT_NUM;i++) { dprintk("sleep dat:%x pin:%x fun:%x sel:%x dir:%x pull:%x msk:%x trg:%x\n", \ REG_GPIO_PXDAT(i),REG_GPIO_PXPIN(i),REG_GPIO_PXFUN(i),REG_GPIO_PXSEL(i), \ REG_GPIO_PXDIR(i),REG_GPIO_PXPE(i),REG_GPIO_PXIM(i),REG_GPIO_PXTRG(i)); } #endif }