/*******************************************************************************
* @brief This function initialises the App, based on User provided
* configuration.
*
* @param[in] None
*
* @return None <BR>
*
* <b>Reentrant: No </b><BR>
******************************************************************************/
void I2C003_Init(void)
{
uint32_t LoopIndex;
#if (__TARGET_DEVICE__ != XMC45)
#if ((__TARGET_DEVICE__ == XMC13) || \
(__TARGET_DEVICE__ == XMC12) || \
(__TARGET_DEVICE__ == XMC11))
/* Disable the USIC0/USIC1 clock gating for XMC1000 devices */
SCU_GENERAL->PASSWD = 0x000000C0UL;
WR_REG(SCU_CLK->CLKCR, SCU_CLK_CLKCR_CNTADJ_Msk, \
SCU_CLK_CLKCR_CNTADJ_Pos,CLK002_DELAYCNT);
#if defined(I2C003_PER0_USIC0_ENABLED)
SET_BIT(SCU_CLK->CGATCLR0, SCU_CLK_CGATCLR0_USIC0_Pos);
#endif
#if defined(I2C003_PER1_USIC1_ENABLED)
SET_BIT(SCU_CLK->CGATCLR1, SCU_CLK_CGATCLR1_USIC1_Pos);
#endif
while ((SCU_CLK->CLKCR)&(SCU_CLK_CLKCR_VDDC2LOW_Msk))
{
;
}
SCU_GENERAL->PASSWD = 0x000000C3UL;
#else
/* Disable the USIC0/USIC1 clock gating for XMC4400 and XMC4200 devices*/
#if defined(I2C003_PER0_USIC0_ENABLED)
SET_BIT(SCU_CLK->CGATCLR0, SCU_CLK_CGATCLR0_USIC0_Pos);
#endif
#if defined(I2C003_PER1_USIC1_ENABLED)
SET_BIT(SCU_CLK->CGATCLR1, SCU_CLK_CGATCLR1_USIC1_Pos);
#endif
#endif
#endif
#if ((__TARGET_DEVICE__ == XMC45) || \
(__TARGET_DEVICE__ == XMC44) || \
(__TARGET_DEVICE__ == XMC42))
/* Reset the Peripheral*/
#if defined(I2C003_PER0_USIC0_ENABLED)
RESET001_DeassertReset(PER0_USIC0);
#endif
#if defined(I2C003_PER1_USIC1_ENABLED)
RESET001_DeassertReset(PER1_USIC1);
#endif
#if defined(I2C003_PER1_USIC2_ENABLED)
RESET001_DeassertReset(PER1_USIC2);
#endif
#endif
for (LoopIndex = (uint32_t)0; LoopIndex < (uint32_t)I2C003_NUM_HANDLES; \
LoopIndex++)
{
I2C003_lConfigSCLPin(I2C003_HandleArray[LoopIndex]);
I2C003_lConfigSDAPin(I2C003_HandleArray[LoopIndex]);
I2C003_lInit(I2C003_HandleArray[LoopIndex]);
}
}
/******************************************************************************
** Public Function Definitions **
******************************************************************************/
void UART001_Init(void)
{
/* Reset the Peripheral*/
RESET001_DeassertReset(PER0_USIC0);
UART001_lInit(&UART001_Handle0);
/* Configuration of TX Pin 1.5 based on User configuration */
/* PDR_PD = 0 */
PORT1->PDR0 &= (~(PORT1_PDR0_PD5_Msk));
/* Configuration of RX Pin 1.4 based on User configuration */
}
/******************************************************************************
** Public Function Definitions **
******************************************************************************/
void I2C001_Init(void)
{
/* Reset the Peripheral*/
RESET001_DeassertReset(PER1_USIC2);
I2C001_lInit(&I2C001_Handle0);
/* Configuration of SCL Pin 5.2 based on User configuration */
PORT5->PDR0 &= (~(PORT5_PDR0_PD2_Msk));
PORT5->PDR0 |= (((uint32_t)4 << PORT5_PDR0_PD2_Pos) & PORT5_PDR0_PD2_Msk);
PORT5->IOCR0 |= ((uint32_t)24 << 19);
PORT5->OMR |= ((uint32_t)0x01 << 2);
/* Configuration of SDA Pin 5.0 based on User configuration */
PORT5->PDR0 &= (~(PORT5_PDR0_PD0_Msk));
PORT5->PDR0 |= (((uint32_t)4 << PORT5_PDR0_PD0_Pos) & PORT5_PDR0_PD0_Msk);
PORT5->IOCR0 |= ((uint32_t)24 << 3);
PORT5->OMR |= ((uint32_t)0x01 << 0);
RESET001_DeassertReset(PER0_USIC0);
I2C001_lInit(&I2C001_Handle1);
/* Configuration of SCL Pin 0.8 based on User configuration */
PORT0->PDR1 &= (~(PORT0_PDR1_PD8_Msk));
PORT0->PDR1 |= (((uint32_t)4 << PORT0_PDR1_PD8_Pos) & PORT0_PDR1_PD8_Msk);
PORT0->IOCR8 |= ((uint32_t)16 << 3);
PORT0->OMR |= ((uint32_t)0x01 << 8);
/* Configuration of SDA Pin 1.5 based on User configuration */
PORT1->PDR0 &= (~(PORT1_PDR0_PD5_Msk));
PORT1->PDR0 |= (((uint32_t)4 << PORT1_PDR0_PD5_Pos) & PORT1_PDR0_PD5_Msk);
PORT1->IOCR4 |= ((uint32_t)16 << 11);
PORT1->OMR |= ((uint32_t)0x01 << 5);
}
static void CCU4Global_lInit(const CCU4Global_HandleType * Handle)
{
if( Handle->KernelNumber <= 2 )
{
/* Disables the gating for CCU4 kernel */
/*This is applicable for XMC4400,XMC4200 and XMC1xxx Devices*/
#if (UC_FAMILY == XMC1 )
if (!((uint32_t)SCU_CLK->CGATCLR0 & Handle->ClockGating))
{
SCU_GENERAL->PASSWD = 0x000000C0UL;
WR_REG(SCU_CLK->CLKCR, SCU_CLK_CLKCR_CNTADJ_Msk,
SCU_CLK_CLKCR_CNTADJ_Pos,CCU4GLOBAL_DELAYCNT);
SET_BIT(SCU_CLK->CGATCLR0, Handle->ClockGating);
while ((uint32_t)SCU_CLK->CLKCR &
(uint32_t)SCU_CLK_CLKCR_VDDC2LOW_Msk)
{
;
}
SCU_GENERAL->PASSWD = 0x000000C3UL;
}
#endif
#if ((__TARGET_DEVICE__ == XMC42) || (__TARGET_DEVICE__ == XMC44))
SET_BIT(SCU_CLK->CGATCLR0, Handle->ClockGating);
#endif
}
#if (__TARGET_DEVICE__ == XMC44)
else
{
SET_BIT(SCU_CLK->CGATCLR1, Handle->ClockGating);
}
#endif
#if (UC_FAMILY == XMC4)
/* Deassert the peripheral */
/*This is applicable for XMC4500, XMC4400 and XMC4200 Devices*/
RESET001_DeassertReset(Handle->PeripheralReset);
#endif
/* Sets Run bit of the Prescalar */
SET_BIT(Handle->CC4yKernRegsPtr->GIDLC,CCU4_GIDLC_SPRB_Pos);
}
/**
* @brief This function initialises the Event Request Select(ERSx) and
* Event Trigger Logic(ETLx) input channel according GUI configuration.
* values.
*
* @param[in] Pointer to ERU001_HandleType
*
* @return None <BR>
*
* <b>Reentrant: Yes </b><BR>
*/
void ERU001_lInit(const ERU001_HandleType *Handle)
{
/* Used to store the value that needs to be loaded to
Event Input Control register */
uint32_t uRegValue = 0U;
#if (UC_FAMILY == XMC4)
/* Check instantiated app resource is ERU1 kernel*/
if (ERU1 == Handle->ERURegs)
{
/* Get the reset status of the ERU1 peripheral */
if (TRUE == RESET001_GetStatus(PER0_ERU1))
{
/* De-assert the ERU1 peripheral */
RESET001_DeassertReset(PER0_ERU1);
}
}
#endif
/* Rebuild Level Detection for Status Flag ETLx */
uRegValue |= ( ( (uint32_t)Handle->LevelDetect << ERU_EXICON_LD_Pos ) & \
ERU_EXICON_LD_Msk );
/* Rising Edge Detection Enable ETLx */
uRegValue |= ( ( (uint32_t)Handle->RiseEdgeDetEn << ERU_EXICON_RE_Pos ) & \
ERU_EXICON_RE_Msk );
/* Falling Edge Detection Enable ETLx */
uRegValue |= ( ( (uint32_t)Handle->FallEdgeDetEn << ERU_EXICON_FE_Pos ) & \
ERU_EXICON_FE_Msk );
/* Input Source Select for ERSx */
uRegValue |= ( ( (uint32_t)Handle->InputSrcSel << ERU_EXICON_SS_Pos ) & \
ERU_EXICON_SS_Msk );
/* Input A Negation Select for ERSx */
uRegValue |= ( ( (uint32_t)Handle->InputANegSel << ERU_EXICON_NA_Pos ) & \
ERU_EXICON_NA_Msk );
/* Input B Negation Select for ERSx */
uRegValue |= ( ( (uint32_t)Handle->InputBNegSel << ERU_EXICON_NB_Pos ) & \
ERU_EXICON_NB_Msk );
/* Update of Event Input Control register*/
Handle->ERURegs->EXICON[Handle->InputChannel] |= uRegValue;
}