static inline void __rem_from_runqueue(runqueue_t *runq, uthread_struct_t *u_elem)
{
unsigned int uprio, ugroup;
uthread_head_t *uhead;
/* Find a position in the runq based on priority and group.
* Update the masks. */
uprio = u_elem->uthread_priority;
ugroup = u_elem->uthread_gid;
/* Insert at the tail */
uhead = &runq->prio_array[uprio].group[ugroup];
TAILQ_REMOVE(uhead, u_elem, uthread_runq);
/* Update information */
if(TAILQ_EMPTY(uhead))
RESET_BIT(runq->prio_array[uprio].group_mask, ugroup);
runq->uthread_tot--;
if(!(--(runq->uthread_prio_tot[uprio])))
RESET_BIT(runq->uthread_mask, uprio);
if(!(--(runq->uthread_group_tot[ugroup])))
{
assert(TAILQ_EMPTY(uhead));
RESET_BIT(runq->uthread_group_mask[ugroup], uprio);
}
return;
}
void Reset_OBJECT4D(LPOBJECT4D obj)
{
RESET_BIT(obj->state, OBJECT4D_STATE_CULLED);
for (int poly = 0; poly < obj->numPolys; poly++)
{
LPPOLY4D currentPoly = &obj->polyList[poly];
if (!currentPoly->state & POLY4D_STATE_ACTIVE)
continue;
RESET_BIT(currentPoly->state, POLY4D_STATE_CLIPPED);
RESET_BIT(currentPoly->state, POLY4D_STATE_BACKFACE);
}
}
// Free the children of p->root, except for the child exception.
// Connect the parent of bl with the exception child. If except == TP_NULL, remove all children.
// Then we starts a few threads to free the tree (also free bl).
void tree_simple_free_except(TreePool *p, TreeBlock *except) {
TreeBlock *r = p->root->children[0].child;
if (r == TP_NULL) {
memset(&p->root->data.stats[0], 0, sizeof(Stat));
return;
}
// Free the nodes.
for (int i = 0; i < r->n; ++i) {
if (r->children[i].child != except) {
recursive_free(p, r->children[i].child);
}
}
// Reconnect. Note this is run in single thread, so order does not matter.
p->root->children[0].child = except;
if (except != TP_NULL) {
float black_win = 0.0;
int total = 0;
// In this case, we need to recompute the stats.
for (int i = 0; i < except->n; ++i) {
black_win += except->data.stats[i].black_win;
total += except->data.stats[i].total;
}
p->root->data.stats[0].black_win = black_win;
p->root->data.stats[0].total = total;
except->parent = p->root;
except->parent_offset = 0;
} else {
// Empty the child and reset the statistics.
RESET_BIT(p->root->expansion, 0);
memset(&p->root->data.stats[0], 0, sizeof(Stat));
}
}
void Emulator::HandleInterupt()
{
if (!mMasterIntFlag)
return ;
BYTE regIntEnable = mInterrupEnable;
BYTE regIntReq = mIOPorts[0x0F];
for (int i = 0; i < 5; i++)
{
if (IS_BIT_SET(regIntReq, i) && IS_BIT_SET(regIntEnable, i))
{
Push(mPC);
switch (i)
{
case 0: mPC = 0x40; break;
case 1: mPC = 0x48; break;
case 2: mPC = 0x50; break;
case 3: mPC = 0x58; break;
case 4: mPC = 0x60; break;
}
RESET_BIT(mIOPorts[0x0F], i);
mMasterIntFlag = false;
mIsHalted = false;
}
}
}
/* Update the Pending Register. This will trigger an interrupt if a bit is
* set.
*/
static void stm32_exti_change_EXTI_PR_bit(Stm32Exti *s, unsigned pos,
unsigned new_bit_value)
{
unsigned old_bit_value;
assert((new_bit_value == 0) || (new_bit_value == 1));
assert(pos < EXTI_LINE_COUNT);
old_bit_value = GET_BIT_VALUE(s->EXTI_PR, pos);
/* Only continue if the PR bit is actually changing value. */
if(new_bit_value != old_bit_value) {
/* If the bit is being reset, the corresponding Software Interrupt Event
* Register bit is automatically reset.
*/
if(!new_bit_value) {
RESET_BIT(s->EXTI_SWIER, pos);
}
/* Update the IRQ for this EXTI line. Some lines share the same
* NVIC IRQ.
*/
if(pos <= 4) {
/* EXTI0 - EXTI4 each have their own NVIC IRQ */
qemu_set_irq(s->irq[pos], new_bit_value);
} else if(pos <= 9) {
/* EXTI5 - EXTI9 share an NVIC IRQ */
qemu_set_irq(s->irq[5], new_bit_value);
} else if(pos <= 15) {
/* EXTI10 - EXTI15 share an NVIC IRQ */
qemu_set_irq(s->irq[6], new_bit_value);
} else if(pos == 16) {
/* PVD IRQ */
qemu_set_irq(s->irq[7], new_bit_value);
} else if(pos == 17) {
/* RTCAlarm IRQ */
qemu_set_irq(s->irq[8], new_bit_value);
} else if(pos == 18) {
/* OTG_FS_WKUP IRQ */
qemu_set_irq(s->irq[9], new_bit_value);
} else if(pos == 19) {
/* ETH_WKUP IRQ */
qemu_set_irq(s->irq[10], new_bit_value);
} else if(pos == 20) {
/* OTG_HS_WKUP IRQ */
qemu_set_irq(s->irq[11], new_bit_value);
} else if(pos == 21) {
/* TAMP_STAMP IRQ */
qemu_set_irq(s->irq[12], new_bit_value);
} else if(pos == 22) {
/* RTC_WKUP IRQ */
qemu_set_irq(s->irq[13], new_bit_value);
} else {
assert(false);
}
/* Update the register. */
CHANGE_BIT(s->EXTI_PR, pos, new_bit_value);
}
}
/// <summary>
/// Remove exception on return
/// </summary>
/// <returns>Return address</returns>
BLACKBONE_API ptr_t unhookReturn()
{
auto val = returnAddress();
RESET_BIT( val, (_wordSize * 8 - 1) );
if (!returnAddress( val ))
return 0;
return val;
}
void BitVector::setBitTo(int i, unsigned int x)
{
int wordIndex = i / WORD_SIZE;
int bitIndex = i % WORD_SIZE;
if ( x == 1 ) {
if ( wordIndex < f_words - 1 )
SET_BIT(f_array[wordIndex], (0x1 << bitIndex));
else
SET_BIT(f_array[wordIndex],
(0x1 << (WORD_SIZE - f_bits % WORD_SIZE + bitIndex))
);
} else {
if ( wordIndex < f_words - 1 )
RESET_BIT(f_array[wordIndex], (0x1 << bitIndex));
else
RESET_BIT(f_array[wordIndex],
(0x1 << (WORD_SIZE - f_bits % WORD_SIZE + bitIndex))
);
}
}
static basic_block
cfg_blocks_get (void)
{
basic_block bb;
bb = VARRAY_BB (cfg_blocks, cfg_blocks_head);
gcc_assert (!cfg_blocks_empty_p ());
gcc_assert (bb);
cfg_blocks_head = (cfg_blocks_head + 1) % VARRAY_SIZE (cfg_blocks);
--cfg_blocks_num;
RESET_BIT (bb_in_list, bb->index);
return bb;
}
/// <summary>
/// Remove existing hardware breakpoint
/// </summary>
/// <param name="idx">Breakpoint index</param>
/// <returns>true on success</returns>
bool Thread::RemoveHWBP( int idx )
{
if (idx > 0 && idx < 4)
{
_CONTEXT64 context;
if (GetContext( context, CONTEXT64_DEBUG_REGISTERS ))
{
*(&context.Dr0 + idx) = 0;
RESET_BIT( context.Dr7, ( 2 * idx) );
return SetContext( context );
}
}
return false;
}
static basic_block
cfg_blocks_get (void)
{
basic_block bb;
bb = VEC_index (basic_block, cfg_blocks, cfg_blocks_head);
gcc_assert (!cfg_blocks_empty_p ());
gcc_assert (bb);
cfg_blocks_head = ((cfg_blocks_head + 1)
% VEC_length (basic_block, cfg_blocks));
--cfg_blocks_num;
RESET_BIT (bb_in_list, bb->index);
return bb;
}
void Serial_Init()
{
// Enable peripheral
RESET_BIT(PRR, PRUSART0);
uint16_t ubrr = ((F_CPU/16)/BAUD_RATE)-1;
// Set UBRR
UBRR0H = HIGH_BYTE(ubrr);
UBRR0L = LOW_BYTE(ubrr);
// Enable transmitter
SET_BIT(UCSR0B, TXEN0);
// Frame format: 8 bits, no parity bit, 1 stop bit
UCSR0C = 0x06;
transmitStateMachine = Serial_Ready;
}
/// <summary>
/// Remove existing hardware breakpoint
/// </summary>
/// <param name="ptr">Breakpoint address</param>
/// <returns>true on success</returns>
bool Thread::RemoveHWBP( ptr_t ptr )
{
_CONTEXT64 context;
if (GetContext( context, CONTEXT64_DEBUG_REGISTERS ))
{
// Search breakpoint
for (int i = 0; i < 4; i++)
{
if ((&context.Dr0)[i] == ptr)
{
*(&context.Dr0 + i) = 0;
RESET_BIT( context.Dr7, ( 2 * i ) );
return SetContext( context );
}
}
}
return false;
}
void Emulator::KeyChange(eKey key, bool isPress)
{
int idKey;
switch (key)
{
case Start:
idKey = 3;
break;
case Select:
idKey = 2;
break;
case BUTTON_B:
idKey = 1;
break;
case BUTTON_A:
idKey = 0;
break;
case Down:
idKey = 3;
break;
case Up:
idKey = 2;
break;
case Left:
idKey = 1;
break;
case Right:
idKey = 0;
break;
}
mIsStop = false;
if (isPress && !IS_BIT_SET(mJoypadMask, idKey))
REQ_INT(JOYPAD);
if (isPress)
SET_BIT(mJoypadMask, key);
else
RESET_BIT(mJoypadMask, key);
}
static void recursive_free(TreePool *p, TreeBlock *r) {
// Open multithread to recursively free the tree.
// For now just single thread
if (r == TP_NULL) return;
for (int i = 0; i < r->n; ++i) {
if (r->children[i].child != TP_NULL) {
recursive_free(p, r->children[i].child);
}
}
if (r->parent != TP_NULL) {
RESET_BIT(r->parent->expansion, r->parent_offset);
r->parent->children[r->parent_offset].child = TP_NULL;
event_count_destroy(&r->parent->children[r->parent_offset].event_count);
}
for (int j = 0; j < BIT_CNN_NUM_BITS; ++j) {
event_count_destroy(&r->cnn_data.event_counts[j]);
}
if (r->extra) free(r->extra);
free(r);
p->allocated --;
return;
}
void Os_Init()
{
// Disable all peripherals
PRR = 0xFF;
// Enable pullup resistor on all inputs
DDRB = 0;
DDRC = 0;
DDRD = 0;
PORTB = 0xFF;
PORTC = 0xFF;
PORTD = 0xFF;
// Init Timer2 as 1ms counter with interrupts
RESET_BIT(PRR, PRTIM2); // Enable peripheral
OCR2A = (F_CPU/8)/1000; // Count 1000us
TCNT2 = 0; // Reset timer value
TCCR2A = 0x2; // CTC mode
TCCR2B = 0x2; // Set prescaler to 8
SET_BIT(TIMSK2, OCIE2A); // Enable interrupt on Compare Match A
// Enable interrupts
sei();
}
/* runqueue operations */
static inline void __add_to_runqueue(runqueue_t *runq, uthread_struct_t *u_elem)
{
#if 1
{ unsigned int uprio, ugroup;
uthread_head_t *uhead;
/* Find a position in the runq based on priority and group.
* Update the masks. */
uprio = u_elem->uthread_priority;
ugroup = u_elem->uthread_gid;
/* Insert at the tail */
uhead = &runq->prio_array[uprio].group[ugroup];
TAILQ_INSERT_TAIL(uhead, u_elem, uthread_runq);
/* Update information */
if(!IS_BIT_SET(runq->prio_array[uprio].group_mask, ugroup))
SET_BIT(runq->prio_array[uprio].group_mask, ugroup);
runq->uthread_tot++;
runq->uthread_prio_tot[uprio]++;
if(!IS_BIT_SET(runq->uthread_mask, uprio))
SET_BIT(runq->uthread_mask, uprio);
runq->uthread_group_tot[ugroup]++;
if(!IS_BIT_SET(runq->uthread_group_mask[ugroup], uprio))
SET_BIT(runq->uthread_group_mask[ugroup], uprio);
}
#endif
#if 0
{
//unsigned int uprio, ugroup;
/*uthread_head_t *uhead = &u_elem;
// Insert at the ta
TAILQ_INSERT_TAIL(uhead, u_elem, uthread_runq);
runq->uthread_tot++;
}*/
#endif
return;
}
static inline void __rem_from_runqueue(runqueue_t *runq, uthread_struct_t *u_elem)
{
#if 1
unsigned int uprio, ugroup;
uthread_head_t *uhead;
/* Find a position in the runq based on priority and group.
* Update the masks. */
uprio = u_elem->uthread_priority;
ugroup = u_elem->uthread_gid;
/* Insert at the tail */
uhead = &runq->prio_array[uprio].group[ugroup];
TAILQ_REMOVE(uhead, u_elem, uthread_runq);
/* Update information */
if(TAILQ_EMPTY(uhead))
RESET_BIT(runq->prio_array[uprio].group_mask, ugroup);
runq->uthread_tot--;
if(!(--(runq->uthread_prio_tot[uprio])))
RESET_BIT(runq->uthread_mask, uprio);
if(!(--(runq->uthread_group_tot[ugroup])))
{
assert(TAILQ_EMPTY(uhead));
RESET_BIT(runq->uthread_group_mask[ugroup], uprio);
}
#endif
#if 0
/*uthread_head_t *uhead = &u_elem;
TAILQ_REMOVE(uhead, u_elem, uthread_runq);
runq->uthread_tot--;*/
#endif
return;
}
/* Checks that LOOPS are all right:
-- sizes of loops are all right
-- results of get_loop_body really belong to the loop
-- loop header have just single entry edge and single latch edge
-- loop latches have only single successor that is header of their loop
-- irreducible loops are correctly marked
*/
void
verify_loop_structure (struct loops *loops)
{
unsigned *sizes, i, j;
sbitmap irreds;
basic_block *bbs, bb;
struct loop *loop;
int err = 0;
edge e;
/* Check sizes. */
sizes = xcalloc (loops->num, sizeof (int));
sizes[0] = 2;
FOR_EACH_BB (bb)
for (loop = bb->loop_father; loop; loop = loop->outer)
sizes[loop->num]++;
for (i = 0; i < loops->num; i++)
{
if (!loops->parray[i])
continue;
if (loops->parray[i]->num_nodes != sizes[i])
{
error ("Size of loop %d should be %d, not %d.",
i, sizes[i], loops->parray[i]->num_nodes);
err = 1;
}
}
free (sizes);
/* Check get_loop_body. */
for (i = 1; i < loops->num; i++)
{
loop = loops->parray[i];
if (!loop)
continue;
bbs = get_loop_body (loop);
for (j = 0; j < loop->num_nodes; j++)
if (!flow_bb_inside_loop_p (loop, bbs[j]))
{
error ("Bb %d do not belong to loop %d.",
bbs[j]->index, i);
err = 1;
}
free (bbs);
}
/* Check headers and latches. */
for (i = 1; i < loops->num; i++)
{
loop = loops->parray[i];
if (!loop)
continue;
if ((loops->state & LOOPS_HAVE_PREHEADERS)
&& (!loop->header->pred->pred_next
|| loop->header->pred->pred_next->pred_next))
{
error ("Loop %d's header does not have exactly 2 entries.", i);
err = 1;
}
if (loops->state & LOOPS_HAVE_SIMPLE_LATCHES)
{
if (!loop->latch->succ
|| loop->latch->succ->succ_next)
{
error ("Loop %d's latch does not have exactly 1 successor.", i);
err = 1;
}
if (loop->latch->succ->dest != loop->header)
{
error ("Loop %d's latch does not have header as successor.", i);
err = 1;
}
if (loop->latch->loop_father != loop)
{
error ("Loop %d's latch does not belong directly to it.", i);
err = 1;
}
}
if (loop->header->loop_father != loop)
{
error ("Loop %d's header does not belong directly to it.", i);
err = 1;
}
if ((loops->state & LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS)
&& (loop_latch_edge (loop)->flags & EDGE_IRREDUCIBLE_LOOP))
{
error ("Loop %d's latch is marked as part of irreducible region.", i);
err = 1;
}
}
/* Check irreducible loops. */
if (loops->state & LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS)
{
/* Record old info. */
irreds = sbitmap_alloc (last_basic_block);
FOR_EACH_BB (bb)
{
if (bb->flags & BB_IRREDUCIBLE_LOOP)
SET_BIT (irreds, bb->index);
else
RESET_BIT (irreds, bb->index);
for (e = bb->succ; e; e = e->succ_next)
if (e->flags & EDGE_IRREDUCIBLE_LOOP)
e->flags |= EDGE_ALL_FLAGS + 1;
}
/* Recount it. */
mark_irreducible_loops (loops);
/* Compare. */
FOR_EACH_BB (bb)
{
if ((bb->flags & BB_IRREDUCIBLE_LOOP)
&& !TEST_BIT (irreds, bb->index))
{
error ("Basic block %d should be marked irreducible.", bb->index);
err = 1;
}
else if (!(bb->flags & BB_IRREDUCIBLE_LOOP)
&& TEST_BIT (irreds, bb->index))
{
error ("Basic block %d should not be marked irreducible.", bb->index);
err = 1;
}
for (e = bb->succ; e; e = e->succ_next)
{
if ((e->flags & EDGE_IRREDUCIBLE_LOOP)
&& !(e->flags & (EDGE_ALL_FLAGS + 1)))
{
error ("Edge from %d to %d should be marked irreducible.",
e->src->index, e->dest->index);
err = 1;
}
else if (!(e->flags & EDGE_IRREDUCIBLE_LOOP)
&& (e->flags & (EDGE_ALL_FLAGS + 1)))
{
error ("Edge from %d to %d should not be marked irreducible.",
e->src->index, e->dest->index);
err = 1;
}
e->flags &= ~(EDGE_ALL_FLAGS + 1);
}
}
free (irreds);
}