예제 #1
0
파일: My_I2C.c 프로젝트: nemo1992/9DOF
void I2C_Read_Packet_From_Sensor(int *readData,unsigned char slave_add,int dataLength,unsigned char offset)
{
  unsigned char j;
  //DISABLE INTERRUPTS
  //ROM_IntDisable(I2C0_BASE);
  ROM_I2CMasterSlaveAddrSet(I2C0_BASE, slave_add, false);
  //BufferIn(reg_address);
  // SysCtlDelay(53333);
  ROM_I2CMasterDataPut(I2C0_BASE, offset);
  ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
  //SysCtlDelay(53333);
  while(ROM_I2CMasterBusy(I2C0_BASE));
  ROM_I2CMasterSlaveAddrSet(I2C0_BASE, slave_add, true);
  ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
  while(ROM_I2CMasterBusy(I2C0_BASE));
  readData[0] = ROM_I2CMasterDataGet(I2C0_BASE);
  if(dataLength>1){
    for(j = 1 ; j < dataLength - 1 ; j++ )
    {
      ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
      while(ROM_I2CMasterBusy(I2C0_BASE));
      readData[j] = ROM_I2CMasterDataGet(I2C0_BASE);
    }
    ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
    while(ROM_I2CMasterBusy(I2C0_BASE));
    readData[dataLength-1] = ROM_I2CMasterDataGet(I2C0_BASE);
  }
  //ROM_IntEnable(I2C0_BASE);
  // SysCtlDelay(53333);
}
예제 #2
0
파일: My_I2C.c 프로젝트: nemo1992/9DOF
unsigned char I2C_read_byte(unsigned char slave_address, unsigned char reg_address)
{
  unsigned char DATA;
  //DISABLE INTERRUPTS
  //ROM_IntDisable(I2C0_BASE);
  ROM_I2CMasterSlaveAddrSet(I2C0_BASE, slave_address, false);
  //BufferIn(reg_address);

  ROM_I2CMasterDataPut(I2C0_BASE, reg_address);
  ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);

  while(ROM_I2CMasterBusy(I2C0_BASE));
  ROM_I2CMasterSlaveAddrSet(I2C0_BASE, slave_address, true);

  ROM_I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);

  while(ROM_I2CMasterBusy(I2C0_BASE))
  {

  }

  DATA = ROM_I2CMasterDataGet(I2C0_BASE);

  //ENABLE INTERRUPTS

  //ROM_IntEnable(I2C0_BASE);

  return DATA;

}
예제 #3
0
static int finish_op(const i2c_op_t * op)
{
	// Check for errors first
	uint32_t error_status = ROM_I2CMasterErr(I2C_PORT);
	if(error_status != I2C_MASTER_ERR_NONE)
	{
		return error_status; // return with errors
	}
  
	switch(op->op)
	{
		case OP_BURST_RECEIVE_START:
		case OP_BURST_RECEIVE_CONT:
		case OP_BURST_RECEIVE_FINISH:
		case OP_SINGLE_RECEIVE:
			*op->valueptr = ROM_I2CMasterDataGet(I2C_PORT);
		case OP_BURST_SEND_START:
		case OP_BURST_SEND_CONT:
		case OP_BURST_SEND_FINISH:
		case OP_SINGLE_SEND:
			break;
	}
  
	return I2C_MASTER_ERR_NONE; // no errors
}
예제 #4
0
int I2CRead(unsigned char slave, unsigned char address, unsigned int len, unsigned char * readdata, unsigned int readcnt)
{
unsigned long ulToRead;

	// Start with a dummy write to get the address set in the EEPROM.
	ROM_I2CMasterSlaveAddrSet(I2C_MASTER_BASE, slave, false);

	// Place the address to be written in the data register.
	ROM_I2CMasterDataPut(I2C_MASTER_BASE, address);

	// Perform a single send, writing the address as the only byte.
	ROM_I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);

	// Wait until the current byte has been transferred.
	if(!WaitI2CFinished()) 
	{ 
		return(false); 
	}

	// Put the I2C master into receive mode.
	ROM_I2CMasterSlaveAddrSet(I2C_MASTER_BASE, slave, true);

	// Start the receive.
	ROM_I2CMasterControl(I2C_MASTER_BASE, ((readcnt > 1) ? I2C_MASTER_CMD_BURST_RECEIVE_START :
	I2C_MASTER_CMD_SINGLE_RECEIVE));

	// Receive the required number of bytes.
	ulToRead = readcnt;

	while(ulToRead)
	{
		// Wait until the current byte has been read.
		while(ROM_I2CMasterIntStatus(I2C_MASTER_BASE, false) == 0){}
		// Fixes I2C transactions.. ?
		ROM_SysCtlDelay(1000);

		// Clear pending interrupt notification.
		ROM_I2CMasterIntClear(I2C_MASTER_BASE);

		// Read the received character.
		*readdata++ = ROM_I2CMasterDataGet(I2C_MASTER_BASE);
		ulToRead--;

		// Set up for the next byte if any more remain.
		if(ulToRead)
		{
			ROM_I2CMasterControl(I2C_MASTER_BASE, ((ulToRead == 1) ? I2C_MASTER_CMD_BURST_RECEIVE_FINISH :
			I2C_MASTER_CMD_BURST_RECEIVE_CONT));
		}
	}

	return(readcnt - ulToRead);
}
예제 #5
0
파일: Wire.cpp 프로젝트: JuergenGe/Energia
uint8_t TwoWire::getRxData(unsigned long cmd) {

    if (currentState == IDLE) while(ROM_I2CMasterBusBusy(MASTER_BASE));
    HWREG(MASTER_BASE + I2C_O_MCS) = cmd;
    while(ROM_I2CMasterBusy(MASTER_BASE));
    uint8_t error = ROM_I2CMasterErr(MASTER_BASE);
    if (error != I2C_MASTER_ERR_NONE) {
        ROM_I2CMasterControl(MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP);
    }
    else {
        while(ROM_I2CMasterBusy(MASTER_BASE));
        rxBuffer[rxWriteIndex] = ROM_I2CMasterDataGet(MASTER_BASE);
        rxWriteIndex = (rxWriteIndex + 1) % BUFFER_LENGTH;
    }
    return error;

}
예제 #6
0
파일: Wire.cpp 프로젝트: gferrera/AidaDSP
uint8_t TwoWire::getRxData(unsigned long cmd) {

    if (currentState == IDLE) while(ROM_I2CMasterBusBusy(MASTER_BASE));
    HWREG(MASTER_BASE + I2C_O_MCS) = cmd;
    while(ROM_I2CMasterBusy(MASTER_BASE));
    uint8_t error = ROM_I2CMasterErr(MASTER_BASE);
    if (error != I2C_MASTER_ERR_NONE) {
        ROM_I2CMasterControl(MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP);
    }
    else {
        if(speedMode==I2C_SPEED_STANDARD) //Fast modes works without delay (Tested on stellaris&GY-80)
            delayMicroseconds(SLOWMODE_DELAYUS);
        rxBuffer[rxWriteIndex] = ROM_I2CMasterDataGet(MASTER_BASE);
        rxWriteIndex = (rxWriteIndex + 1) % BUFFER_LENGTH;
    }
    return error;

}
예제 #7
0
//*****************************************************************************
//
//! Reads the I2C slave register.
//!
//! \param ACCEL_I2C_MASTER_BASE is the base for the I2C module.
//! \param SlaveID is the 7-bit address of the slave to be addressed.
//! \param addr is the register to read from.
//!
//! This function initiates a read from the slave device.
//! The ACCEL_I2C_MASTER_BASE parameter is the I2C modules master base address.
//! \e ACCEL_I2C_MASTER_BASE parameter can be one of the following values:
//!
//! \return Register value in an unsigned long format.  Note that 0 will be
//! returned if there is ever an error, 1 if there was not.
//
//*****************************************************************************
uint8_t i2c_ReadByte(uint8_t SlaveID, uint8_t addr) {
	unsigned long ulRegValue = 0;

//      LED_TOGGLE(BLUE);

// Wait until master module is done transferring.
//
	while (ROM_I2CMasterBusy(ACCEL_I2C_MASTER_BASE)) {
	};

	//
	// Tell the master module what address it will place on the bus when
	// writing to the slave.
	//
	ROM_I2CMasterSlaveAddrSet(ACCEL_I2C_MASTER_BASE, SlaveID, 0);

	//
	// Place the command to be sent in the data register.
	//
	ROM_I2CMasterDataPut(ACCEL_I2C_MASTER_BASE, addr);

	//
	// Initiate send of data from the master.
	//
	ROM_I2CMasterControl(ACCEL_I2C_MASTER_BASE, I2C_MASTER_CMD_SINGLE_SEND);

	//
	// Wait until master module is done transferring.
	//
	while (ROM_I2CMasterBusy(ACCEL_I2C_MASTER_BASE)) {
	};

	//
	// Check for errors.
	//
	if (ROM_I2CMasterErr(ACCEL_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) {
		return 2;
	}

	//
	// Tell the master module what address it will place on the bus when
	// reading from the slave.
	//
	ROM_I2CMasterSlaveAddrSet(ACCEL_I2C_MASTER_BASE, SlaveID, 1);

	//
	// Tell the master to read data.
	//
	ROM_I2CMasterControl(ACCEL_I2C_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);

	//
	// Wait until master module is done receiving.
	//
	while (ROM_I2CMasterBusy(ACCEL_I2C_MASTER_BASE)) {
	};

	//
	// Check for errors.
	//
	if (ROM_I2CMasterErr(ACCEL_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) {
		return 1;
	}

	//
	// Read the data from the master.
	//
	ulRegValue = ROM_I2CMasterDataGet(ACCEL_I2C_MASTER_BASE);

	//
	// Return the register value.
	//
	return 3;
//	return ulRegValue;
}
예제 #8
0
void I2C0IntHandler(void)
{
  statearray[stateindex++] = g_ulState;
  if (stateindex == 20)
    stateindex = 0;
    //
    // Clear the I2C interrupt.
    //
    ROM_I2CMasterIntClear(I2C0_MASTER_BASE);

    //
    // Determine what to do based on the current state.
    //
    switch(g_ulState)
    {
        //
        // The idle state.
        //
        case STATE_IDLE:
        {
            //
            // There is nothing to be done.
            //
            break;
        }

        //
        // The state for the middle of a burst write.
        //
        case STATE_WRITE_NEXT:
        {
            //
            // Write the next byte to the data register.
            //
            ROM_I2CMasterDataPut(I2C0_MASTER_BASE, *g_pucData++);
            g_ulCount--;

            //
            // Continue the burst write.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);

            //
            // If there is one byte left, set the next state to the final write
            // state.
            //
            if(g_ulCount == 1)
            {
                g_ulState = STATE_WRITE_FINAL;
            }

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the final write of a burst sequence.
        //
        case STATE_WRITE_FINAL:
        {
            //
            // Write the final byte to the data register.
            //
            ROM_I2CMasterDataPut(I2C0_MASTER_BASE, *g_pucData++);
            g_ulCount--;

            //
            // Finish the burst write.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE,
                             I2C_MASTER_CMD_BURST_SEND_FINISH);

            //
            // The next state is to wait for the burst write to complete.
            //
            g_ulState = STATE_SEND_ACK;

            //
            // This state is done.
            //
            break;
        }

        //
        // Wait for an ACK on the read after a write.
        //
        case STATE_WAIT_ACK:
        {
            //
            // See if there was an error on the previously issued read.
            //
            if(ROM_I2CMasterErr(I2C0_MASTER_BASE) == I2C_MASTER_ERR_NONE)
            {
                //
                // Read the byte received.
                //
                ROM_I2CMasterDataGet(I2C0_MASTER_BASE);

                //
                // There was no error, so the state machine is now idle.
                //
                g_ulState = STATE_IDLE;

                //
                // This state is done.
                //
                break;
            }
			else
			{
            	//
            	// Fall through to STATE_SEND_ACK.
            	//
            	BBLedToggle();
			}
            	
        }

        //
        // Send a read request, looking for the ACK to indicate that the write
        // is done.
        //
        case STATE_SEND_ACK:
        {
            //
            // Put the I2C master into receive mode.
            //
            ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, currentaddress, true);

            //
            // Perform a single byte read.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);

            //
            // The next state is the wait for the ack.
            //
            g_ulState = STATE_WAIT_ACK;

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for a single byte read.
        //
        case STATE_READ_ONE:
        {
            //
            // Put the I2C master into receive mode.
            //
            ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, currentaddress, true);

            //
            // Perform a single byte read.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);

            //
            // The next state is the wait for final read state.
            //
            g_ulState = STATE_READ_WAIT;

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the start of a burst read.
        //
        case STATE_READ_FIRST: // 6
        {
            //
            // Put the I2C master into receive mode.
            //
            ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, currentaddress, true);

            //
            // Start the burst receive.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE,
                             I2C_MASTER_CMD_BURST_RECEIVE_START);

            //
            // The next state is the middle of the burst read.
            //
            g_ulState = STATE_READ_NEXT; // 7

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the middle of a burst read.
        //
        case STATE_READ_NEXT: // 7
        {
            //
            // Read the received character.
            //
            *g_pucData++ = ROM_I2CMasterDataGet(I2C0_MASTER_BASE);
            g_ulCount--;

            //
            // Continue the burst read.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE,
                             I2C_MASTER_CMD_BURST_RECEIVE_CONT);

            //
            // If there are two characters left to be read, make the next
            // state be the end of burst read state.
            //
            if(g_ulCount == 2)
            {
                g_ulState = STATE_READ_FINAL; // 8
            }

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the end of a burst read.
        //
        case STATE_READ_FINAL: // 8
        {
            //
            // Read the received character.
            //
            *g_pucData++ = ROM_I2CMasterDataGet(I2C0_MASTER_BASE);
            g_ulCount--;

            //
            // Finish the burst read.
            //
            ROM_I2CMasterControl(I2C0_MASTER_BASE,
                             I2C_MASTER_CMD_BURST_RECEIVE_FINISH);

            //
            // The next state is the wait for final read state.
            //
            g_ulState = STATE_READ_WAIT; // 9

            //
            // This state is done.
            //
            break;
        }

        //
        // This state is for the final read of a single or burst read.
        //
        case STATE_READ_WAIT: // 9
        {
            //
            // Read the received character.
            //
            tempc = ROM_I2CMasterDataGet(I2C0_MASTER_BASE);
            *g_pucData++ = (unsigned char)tempc;
            g_ulCount--;

            //
            // The state machine is now idle.
            //
            g_ulState = STATE_IDLE;

            //
            // This state is done.
            //
            break;
        }
    }
}
//*****************************************************************************
//
// Reads a register in the TLV320AIC3107 DAC.
//
// \param ucRegister is the offset to the register to write.
// \param pucData is a pointer to the returned data.
//
//  \return \b true on success or \b false on error.
//
//*****************************************************************************
static tBoolean
DACReadRegister(unsigned char ucRegister, unsigned char *pucData)
{
    //
    // Set the slave address and "WRITE"
    //
    ROM_I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC3107_ADDR,
                              false);

    //
    // Write the first byte to the controller (register)
    //
    ROM_I2CMasterDataPut(DAC_I2C_MASTER_BASE, ucRegister);

    //
    // Continue the transfer.
    //
    ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);

    //
    // Wait until the current byte has been transferred.
    //
    while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0)
    {
    }

    if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE)
    {
        ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE);
        return(false);
    }

    //
    // Wait until the current byte has been transferred.
    //
    while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false))
    {
        ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE);
    }

    //
    // Set the slave address and "READ"/true.
    //
    ROM_I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC3107_ADDR, true);

    //
    // Read Data Byte.
    //
    ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);

    //
    // Wait until the current byte has been transferred.
    //
    while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0)
    {
    }

    if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE)
    {
        ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE);
        return(false);
    }

    //
    // Wait until the current byte has been transferred.
    //
    while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false))
    {
        ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE);
    }

    //
    // Read the value received.
    //
    *pucData  = ROM_I2CMasterDataGet(DAC_I2C_MASTER_BASE);

    return(true);
}
예제 #10
0
//*****************************************************************************
//
// Reads from the I2C-attached EEPROM device.
//
// \param pucData points to storage for the data read from the EEPROM.
// \param ulOffset is the EEPROM address of the first byte to read.
// \param ulCount is the number of bytes of data to read from the EEPROM.
//
// This function reads one or more bytes of data from a given address in the
// ID EEPROM found on several of the development kit daughter boards.  The
// return code indicates whether the read was successful.
//
// \return Returns \b true on success of \b false on failure.
//
//*****************************************************************************
static tBoolean
EEPROMReadPolled(unsigned char *pucData, unsigned long ulOffset,
                 unsigned long ulCount)
{
    unsigned long ulToRead;

    //
    // Clear any previously signalled interrupts.
    //
    ROM_I2CMasterIntClear(I2C0_MASTER_BASE);

    //
    // Start with a dummy write to get the address set in the EEPROM.
    //
    ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, ID_I2C_ADDR, false);

    //
    // Place the address to be written in the data register.
    //
    ROM_I2CMasterDataPut(I2C0_MASTER_BASE, ulOffset);

    //
    // Perform a single send, writing the address as the only byte.
    //
    ROM_I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);

    //
    // Wait until the current byte has been transferred.
    //
    if(!WaitI2CFinished())
    {
        return(false);
    }

    //
    // Put the I2C master into receive mode.
    //
    ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, ID_I2C_ADDR, true);

    //
    // Start the receive.
    //
    ROM_I2CMasterControl(I2C0_MASTER_BASE,
                         ((ulCount > 1) ? I2C_MASTER_CMD_BURST_RECEIVE_START :
                         I2C_MASTER_CMD_SINGLE_RECEIVE));

    //
    // Receive the required number of bytes.
    //
    ulToRead = ulCount;

    while(ulToRead)
    {
        //
        // Wait until the current byte has been read.
        //
        while(ROM_I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0)
        {
        }

        //
        // Clear pending interrupt notification.
        //
        ROM_I2CMasterIntClear(I2C0_MASTER_BASE);

        //
        // Read the received character.
        //
        *pucData++ = ROM_I2CMasterDataGet(I2C0_MASTER_BASE);
        ulToRead--;

        //
        // Set up for the next byte if any more remain.
        //
        if(ulToRead)
        {
            ROM_I2CMasterControl(I2C0_MASTER_BASE,
                                 ((ulToRead == 1) ?
                                  I2C_MASTER_CMD_BURST_RECEIVE_FINISH :
                                  I2C_MASTER_CMD_BURST_RECEIVE_CONT));
        }
    }

    //
    // Tell the caller we read the required data.
    //
    return(true);
}