void ForceUsbIdSwitchOpen (void)
{
ReadModifyWriteIndexedRegister(0x01, 0x90, BIT_0, 0x00);
ReadModifyWriteIndexedRegister(0x01, 0x95, BIT_6, BIT_6);
WriteIndexedRegister(0x01, 0x92, 0x86);
ReadModifyWriteIndexedRegister(0x01, 0x79, BIT_5 | BIT_4, BIT_4);
}
void ForceUsbIdSwitchOpen (void)
{
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x90, SI_BIT_0, 0x00); // Disable discovery
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x95, SI_BIT_6, SI_BIT_6); // Force USB ID Switch
WriteIndexedRegister(INDEXED_PAGE_0, 0x92, 0x46); // Force MHD mode
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x79, SI_BIT_5 | SI_BIT_4, SI_BIT_4); // Force HPD to 0 when not in MHD mode.
}
byte MHD_Bridge_detect(void)
{
byte temp = 0;
byte BridgeOn = 0;
DisableInterrupts();
msleep(180);
if(!gpio_get_value(GPIO_ACCESSORY_INT)&& MHD_HW_IsOn())
{
temp = ReadIndexedRegister(INDEXED_PAGE_0, 0x09);
if ((temp & RSEN) == 0x00)
{
BridgeOn = FALSE;
//ReadModifyWriteTPI(0x79, SI_BIT_5 | SI_BIT_4, SI_BIT_4); //force HPD to 0
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x79, SI_BIT_5 | SI_BIT_4, SI_BIT_4);
}
else
{
BridgeOn = TRUE;
//ReadModifyWriteTPI(0x79, BIT_5 | BIT_4, 0); //back to current state
}
printk("[MHD] Bridge detect %x :: HPD %d\n",BridgeOn,gpio_get_value(GPIO_HDMI_HPD));
//ReadModifyWriteTPI(0x79, SI_BIT_5 | SI_BIT_4, 0); //back to current state
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x79, SI_BIT_5 | SI_BIT_4, 0);
}
MHD_INT_clear();
EnableInterrupts();
printk("[MHD]MHD_Bridge_detect -- \n");
return BridgeOn;
}
byte MHD_Bridge_detect(void)
{
byte temp = 0;
byte BridgeOn = 0;
/* disable interrupts */
ReadModifyWriteTPI(TPI_INTERRUPT_ENABLE_REG,
RECEIVER_SENSE_EVENT_MASK, 0x00);
msleep(180);
if(!gpio_get_value(TEGRA_GPIO_PI5)&& MHD_HW_IsOn()) //TEGRA_GPIO_PI5: GPIO_ACCESSORY_INT
{
temp = ReadIndexedRegister(INDEXED_PAGE_0, 0x09);
if ((temp & RSEN) == 0x00) {
BridgeOn = FALSE;
//ReadModifyWriteTPI(0x79, SI_BIT_5 | SI_BIT_4, SI_BIT_4); //force HPD to 0
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x79, SI_BIT_5 | SI_BIT_4, SI_BIT_4);
} else {
BridgeOn = TRUE;
//ReadModifyWriteTPI(0x79, BIT_5 | BIT_4, 0); //back to current state
}
printk("[HDMI] Bridge detect %x :: HPD %d\n",BridgeOn,gpio_get_value(TEGRA_GPIO_PN7)); //TEGRA_GPIO_PN7: GPIO_HDMI_HPD
//ReadModifyWriteTPI(0x79, SI_BIT_5 | SI_BIT_4, 0); //back to current state
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x79, SI_BIT_5 | SI_BIT_4, 0);
}
MHD_INT_clear();
/* enable interrupts */
WriteIndexedRegister(INDEXED_PAGE_0, 0x78, 0x01);
printk("[HDMI]MHD_Bridge_detect -- \n");
return BridgeOn;
}
static void TxPowerStateD0(void)
{
ReadModifyWriteTPI(0x1E, BIT_1 | BIT_0, 0x00);
TPI_DEBUG_PRINT(("TX Power State D0\n"));
ReadModifyWriteIndexedRegister(0x01, 0x94, BIT_0 | BIT_1, 0x01);
ReadModifyWriteIndexedRegister(0x01, 0x93, 0xF0, 0x80);
}
static void TxPowerStateD3(void)
{
ReadModifyWriteIndexedRegister(0x01, 0x94, BIT_0 | BIT_1, 0x00);
ReadModifyWriteIndexedRegister(0x01, 0x93, BIT_3 | BIT_4 | BIT_5 | BIT_7, BIT_3);
ReadModifyWriteIndexedRegister(0x02, 0x3D, BIT_0, 0x00);
bInTpiMode = false;
TPI_DEBUG_PRINT(("TX Power State D3\n"));
CLEAR_CBUS_TOGGLE();
}
void TxPowerStateD3 (void)
{
ReadModifyWriteIndexedRegister(INDEXED_PAGE_1, 0x3D, SI_BIT_0, 0x00);
printk("[SIMG] TX Power State D3\n");
txPowerState = TX_POWER_STATE_D3;
}
void MHD_OUT_EN(void)
{
byte state , int_stat;
int_stat = ReadIndexedRegister(INDEXED_PAGE_0,0x74);
printk("[MHD]MHD_OUT_EN INT register value is: 0x%02x \n", int_stat);
state = ReadIndexedRegister(INDEXED_PAGE_0, 0x81);
printk("[MHD]MHD_OUT_EN register 0x81 value is: 0x%02x\n", state);
if((state & 0x02) && (int_stat &0x01))
{
printk("[MHD]MHD_OUT_EN :: enable output\n");
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0,0x80,SI_BIT_4,0x0);
msleep(20);
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0,0x80,SI_BIT_4,SI_BIT_4);
msleep(60);
set_mhd_power_active_mode();
mhd_tx_fifo_stable(); //fifo clear
}
MHD_INT_clear();
}
void MHD_OUT_EN(void)
{
byte state , int_stat;
int_stat = ReadIndexedRegister(INDEXED_PAGE_0, 0x74);
pr_info("[HDMI]MHD_OUT_EN INT register value is: 0x%02x\n", int_stat);
state = ReadIndexedRegister(INDEXED_PAGE_0, 0x81);
pr_info("[HDMI]MHD_OUT_EN register 0x81 value is: 0x%02x\n", state);
if ((state & 0x02) && (int_stat & 0x01)) {
pr_info("[HDMI]MHD_OUT_EN :: enable output\n");
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x80, SI_BIT_4,
0x0);
msleep(20);
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x80, SI_BIT_4,
SI_BIT_4);
msleep(60);
/* set mhd power active mode */
ReadModifyWriteTPI(TPI_DEVICE_POWER_STATE_CTRL_REG,
TX_POWER_STATE_MASK, 0x00);
mhd_tx_fifo_stable(); /*fifo clear*/
}
MHD_INT_clear();
}
static void ReleaseUsbIdSwitchOpen (void)
{
delay_ms(25);
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x95, SI_BIT_6, 0x00);
ReadModifyWriteIndexedRegister(INDEXED_PAGE_0, 0x90, SI_BIT_0, SI_BIT_0); // Enable discovery
}
static void DisableInterrupts(uint8_t Interrupt_Pattern)
{
ReadClearWriteTPI(0x3C, Interrupt_Pattern);
ReadModifyWriteIndexedRegister(0x01, 0x75, BIT_5, 0);
}
void ReleaseUsbIdSwitchOpen(void)
{
DelayMS(25);
ReadModifyWriteIndexedRegister(0x01, 0x95, BIT_6, 0x00);
ReadModifyWriteIndexedRegister(0x01, 0x90, BIT_0, BIT_0);
}
