static inline void s3c_adc_select(struct adc_device *adc,
struct s3c_adc_client *client)
{
unsigned con = readl(adc->regs + S3C2410_ADCCON);
enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
client->select_cb(client, 1);
if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2)
con &= ~S3C2410_ADCCON_MUXMASK;
con &= ~S3C2410_ADCCON_STDBM;
con &= ~S3C2410_ADCCON_STARTMASK;
if (!client->is_ts) {
if (cpu == TYPE_ADCV3)
writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12)
writel(client->channel & 0xf,
adc->regs + S3C2443_ADCMUX);
else
con |= S3C2410_ADCCON_SELMUX(client->channel);
}
writel(con, adc->regs + S3C2410_ADCCON);
}
static inline void s3c_adc_select(struct adc_device *adc,
struct s3c_adc_client *client)
{
unsigned con = readl(adc->regs + S3C2410_ADCCON);
client->select_cb(client, 1);
con &= ~S3C2410_ADCCON_MUXMASK;
con &= ~S3C2410_ADCCON_STDBM;
con &= ~S3C2410_ADCCON_STARTMASK;
if (!client->is_ts)
con |= S3C2410_ADCCON_SELMUX(client->channel);
writel(con, adc->regs + S3C2410_ADCCON);
}
void adc_init(void)
{
int user_data = 0;
unsigned int adc_con = 0;
/* set register value*/
/* 50,000,000/(9+1) | enable select = 0 | stat by set 1 to bit 0 | set to normal model*/
adc_con = (S3C2410_ADCCON_PRSCVL(9) | S3C2410_ADCCON_PRSCEN | S3C2410_ADCCON_SELMUX(0));
printk("[%x]\n", adc_con);
/* write to register*/
writel(readl(S3C2410_CLKCON) | S3C2410_CLKCON_ADC,S3C2410_CLKCON);
writel(adc_con, (S3C2410_ADCCON + SYS_ADDRESS));
#ifdef DEBUG
printk("[%x]\n", readl(S3C2410_ADCCON + SYS_ADDRESS));
#endif
// user_data = adc_test();
printk("%d", user_data);
}
static inline void s3c_adc_select(struct adc_device *adc,
struct s3c_adc_client *client)
{
unsigned con = readl(adc->regs + S3C2410_ADCCON);
client->select_cb(client, 1);
con &= ~S3C2410_ADCCON_MUXMASK;
con &= ~S3C2410_ADCCON_STDBM;
con &= ~S3C2410_ADCCON_STARTMASK;
con |= S3C2410_ADCCON_PRSCEN;
if (!client->is_ts) {
if (adc->cputype == TYPE_S3C64XX)
writel(S3C_ADCCON_SELMUX_1(client->channel),
adc->regs + S3C_ADCMUX);
else
con |= S3C2410_ADCCON_SELMUX(client->channel);
}
writel(con, adc->regs + S3C2410_ADCCON);
}
unsigned int s3c_adc_convert(void __iomem *reg_base,unsigned int s3c_adc_port)
{
unsigned int adc_return;
unsigned long data0;
unsigned long data1;
writel(readl(reg_base+S3C2410_ADCCON)|S3C2410_ADCCON_SELMUX(s3c_adc_port), reg_base+S3C2410_ADCCON);
udelay(10);
writel(readl(reg_base+S3C2410_ADCCON)|S3C2410_ADCCON_ENABLE_START, reg_base+S3C2410_ADCCON);
do {
data0 = readl(reg_base+S3C2410_ADCCON);
} while(!(data0 & S3C2410_ADCCON_ECFLG));
data1 = readl(reg_base+S3C2410_ADCDAT0);
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK_12BIT;
return adc_return;
}
