static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) { /* Set all the necessary GPG pins to special-function 2 */ s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); /* force card-detected for prototype 0 */ s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN); }
void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPH pins to special-function 2 */ s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); } }
void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { unsigned int gpio; unsigned int end; end = S3C64XX_GPH(2 + width); /* Set all the necessary GPG pins to special-function 0 */ for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); }
void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { unsigned int gpio; unsigned int end; end = S3C64XX_GPH(2 + width); /* Set all the necessary GPG pins to special-function 0 */ for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } #if 1 /* only ch0 will have card detection pin. by scsuh. */ s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); #endif }
void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; unsigned int gpio; unsigned int end; end = S3C64XX_GPH(2 + width); /* Set all the necessary GPG pins to special-function 0 */ for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); } }
.ngpio = S3C64XX_GPIO_D_NR, .label = "GPD", }, }, { .base = S3C64XX_GPE_BASE, .config = &gpio_4bit_cfg_noint, .chip = { .base = S3C64XX_GPE(0), .ngpio = S3C64XX_GPIO_E_NR, .label = "GPE", }, }, { .base = S3C64XX_GPG_BASE, .config = &gpio_4bit_cfg_eint0111, .chip = { .base = S3C64XX_GPG(0), .ngpio = S3C64XX_GPIO_G_NR, .label = "GPG", }, }, { .base = S3C64XX_GPM_BASE, .config = &gpio_4bit_cfg_eint0011, .chip = { .base = S3C64XX_GPM(0), .ngpio = S3C64XX_GPIO_M_NR, .label = "GPM", .to_irq = s3c64xx_gpio2int_gpm, }, }, };