void S9xSA1MainLoop ()
{
int i;
#if 0
if (SA1.Flags & NMI_FLAG)
{
SA1.Flags &= ~NMI_FLAG;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
S9xSA1Opcode_NMI ();
}
#endif
if (SA1.Flags & IRQ_FLAG)
{
if (SA1.IRQActive)
{
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
if (!SA1CheckFlag (IRQ))
S9xSA1Opcode_IRQ ();
}
else
SA1.Flags &= ~IRQ_FLAG;
}
for (i = 0; i < 3 && SA1.Executing; i++)
{
#ifdef DEBUGGER
if (SA1.Flags & TRACE_FLAG){ S9xSA1Trace(); }
#endif
#ifdef CPU_SHUTDOWN
SA1.PBPCAtOpcodeStart = SA1Registers.PBPC;
#endif
register uint8 Op;
register struct SOpcodes *Opcodes;
if(SA1.PCBase){
SA1OpenBus = Op = SA1.PCBase[Registers.PCw];
Opcodes = SA1.S9xOpcodes;
} else {
Op = S9xSA1GetByte(Registers.PBPC);
Opcodes = S9xOpcodesSlow;
}
if((SA1Registers.PCw&MEMMAP_MASK)+SA1.S9xOpLengths[Op]>=MEMMAP_BLOCK_SIZE){
uint32 oldPC = SA1Registers.PBPC;
S9xSA1SetPCBase(SA1Registers.PBPC);
SA1Registers.PBPC = oldPC;
Opcodes = S9xSA1OpcodesSlow;
}
Registers.PCw++;
(*Opcodes[Op].S9xOpcode) ();
}
}
void S9xSA1MainLoop ()
{
int i;
#if 0
if (SA1.Flags & NMI_FLAG)
{
SA1.Flags &= ~NMI_FLAG;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1.PC++;
}
S9xSA1Opcode_NMI ();
}
#endif
if (SA1.Flags & IRQ_PENDING_FLAG)
{
if (SA1.IRQActive)
{
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1.PC++;
}
if (!SA1CheckFlag (IRQ))
S9xSA1Opcode_IRQ ();
}
else
SA1.Flags &= ~IRQ_PENDING_FLAG;
}
#ifdef DEBUGGER
if (SA1.Flags & TRACE_FLAG)
{
for (i = 0; i < 3 && SA1.Executing; i++)
{
S9xSA1Trace ();
#ifdef CPU_SHUTDOWN
SA1.PCAtOpcodeStart = SA1.PC;
#endif
(*SA1.S9xOpcodes [*SA1.PC++].S9xOpcode)();
}
return;
}
#endif
for (i = 0; i < 3 && SA1.Executing; i++)
{
#ifdef CPU_SHUTDOWN
SA1.PCAtOpcodeStart = SA1.PC;
#endif
(*SA1.S9xOpcodes [*SA1.PC++].S9xOpcode)();
}
}
void S9xSA1MainLoop (void)
{
if (Memory.FillRAM[0x2200] & 0x60)
{
SA1.Cycles += 6; // FIXME
S9xSA1UpdateTimer();
return;
}
// SA-1 NMI
if ((Memory.FillRAM[0x2200] & 0x10) && !(Memory.FillRAM[0x220b] & 0x10))
{
Memory.FillRAM[0x2301] |= 0x10;
Memory.FillRAM[0x220b] |= 0x10;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
S9xSA1Opcode_NMI();
}
else
if (!SA1CheckFlag(IRQ))
{
// SA-1 Timer IRQ
if ((Memory.FillRAM[0x220a] & 0x40) && !(Memory.FillRAM[0x220b] & 0x40))
{
Memory.FillRAM[0x2301] |= 0x40;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
S9xSA1Opcode_IRQ();
}
else
// SA-1 DMA IRQ
if ((Memory.FillRAM[0x220a] & 0x20) && !(Memory.FillRAM[0x220b] & 0x20))
{
Memory.FillRAM[0x2301] |= 0x20;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
S9xSA1Opcode_IRQ();
}
else
// SA-1 IRQ
if ((Memory.FillRAM[0x2200] & 0x80) && !(Memory.FillRAM[0x220b] & 0x80))
{
Memory.FillRAM[0x2301] |= 0x80;
if (SA1.WaitingForInterrupt)
{
SA1.WaitingForInterrupt = FALSE;
SA1Registers.PCw++;
}
S9xSA1Opcode_IRQ();
}
}
for (int i = 0; i < 3 && !(Memory.FillRAM[0x2200] & 0x60); i++)
{
#ifdef DEBUGGER
if (SA1.Flags & TRACE_FLAG)
S9xSA1Trace();
#endif
register uint8 Op;
register Opcode *Opcodes;
if (SA1.PCBase)
{
SA1OpenBus = Op = SA1.PCBase[Registers.PCw];
Opcodes = SA1.S9xOpcodes;
}
else
{
Op = S9xSA1GetByte(Registers.PBPC);
Opcodes = S9xOpcodesSlow;
}
if ((SA1Registers.PCw & MEMMAP_MASK) + SA1.S9xOpLengths[Op] >= MEMMAP_BLOCK_SIZE)
{
uint32 oldPC = SA1Registers.PBPC;
S9xSA1SetPCBase(SA1Registers.PBPC);
SA1Registers.PBPC = oldPC;
Opcodes = S9xSA1OpcodesSlow;
}
Registers.PCw++;
Opcodes[Op]();
}
S9xSA1UpdateTimer();
}