static bool
read_fifo(uint16_t *data)
{
struct { /* status register and data as read back from the device */
uint8_t cmd;
uint8_t status;
int16_t x;
int16_t y;
int16_t z;
} __attribute__((packed)) report;
report.cmd = ADDR_STATUS_REG | DIR_READ | ADDR_INCREMENT;
/* exchange the report structure with the device */
SPI_LOCK(lis331_dev.spi, true);
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_EXCHANGE(lis331_dev.spi, &report, &report, sizeof(report));
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
SPI_LOCK(lis331_dev.spi, false);
data[0] = report.x;
data[1] = report.y;
data[2] = report.z;
return report.status & STATUS_ZYXDA;
}
int
SPI::transfer(uint8_t *send, uint8_t *recv, unsigned len)
{
if ((send == nullptr) && (recv == nullptr))
return -EINVAL;
/* do common setup */
if (!up_interrupt_context())
SPI_LOCK(_dev, true);
SPI_SETFREQUENCY(_dev, _frequency);
SPI_SETMODE(_dev, _mode);
SPI_SETBITS(_dev, 8);
SPI_SELECT(_dev, _device, true);
/* do the transfer */
SPI_EXCHANGE(_dev, send, recv, len);
/* and clean up */
SPI_SELECT(_dev, _device, false);
if (!up_interrupt_context())
SPI_LOCK(_dev, false);
return OK;
}
/* called when master is writing to slave */
static int mods_reg_read_cb(void *v)
{
struct mods_reg_data *slf = (struct mods_reg_data *)v;
FAR struct spi_dev_s *dev = slf->dev;
#ifdef CONFIG_STM32_SPI_INTERRUPTS
uint8_t val;
SPI_SLAVE_READ(dev, &val);
if (slf->addr < 0)
{
if (val < MODS_NUM_REGS)
{
slf->addr = val;
}
}
else
{
slf->regs[slf->addr] = val;
slf->addr = (slf->addr + 1) % MODS_NUM_REGS;
}
#endif
#ifdef CONFIG_STM32_SPI_DMA
SPI_EXCHANGE(dev,slf->regs, slf->regs, sizeof(slf->regs) + 2);
#endif
txn_status = 0;
return 0;
}
int mods_spi_reg_main(int argc, char *argv[])
#endif
{
if (dev1 == NULL)
{
dev1 = up_spiinitialize(CONFIG_MODS_SPI_REG_BUS);
mods_self.dev = dev1;
logd("Slave init complete!\n");
#ifdef CONFIG_SPI_SLAVE
SPI_SLAVE_REGISTERCALLBACK(dev1, &cb_ops, &mods_self);
logd("Slave setup complete!\n");
#endif
}
dump_regs();
#ifdef CONFIG_STM32_SPI_DMA
if (txn_status == -1)
{
SPI_EXCHANGE(dev1,mods_self.regs, mods_self.regs, sizeof(mods_self.regs) + 2);
logd("Slave DMA armed!\n");
}
#endif
return 0;
}
static int
mpu6000_read_fifo(int16_t *data)
{
// struct { /* status register and data as read back from the device */
// uint8_t cmd;
// uint8_t temp;
// uint8_t status;
// int16_t x;
// int16_t y;
// int16_t z;
// } __attribute__((packed)) report;
//
// report.cmd = ADDR_OUT_TEMP | DIR_READ | ADDR_INCREMENT;
//
// /* exchange the report structure with the device */
// SPI_LOCK(mpu6000_dev.spi, true);
//
// SPI_SELECT(mpu6000_dev.spi, mpu6000_dev.spi_id, true);
//
// read_reg(ADDR_WHO_AM_I);
//
// SPI_EXCHANGE(mpu6000_dev.spi, &report, &report, sizeof(report));
// SPI_SELECT(mpu6000_dev.spi, mpu6000_dev.spi_id, false);
//
// SPI_LOCK(mpu6000_dev.spi, false);
//
//
//
//
// Device has MSB first at lower address (big endian)
struct { /* status register and data as read back from the device */
uint8_t cmd;
uint8_t int_status;
int16_t xacc;
int16_t yacc;
int16_t zacc;
int8_t temp;
int16_t rollspeed;
int16_t pitchspeed;
int16_t yawspeed;
} __attribute__((packed)) report;
report.cmd = 0x26 | DIR_READ | ADDR_INCREMENT;
SPI_LOCK(mpu6000_dev.spi, true);
SPI_SELECT(mpu6000_dev.spi, PX4_SPIDEV_MPU, true);
SPI_EXCHANGE(mpu6000_dev.spi, &report, &report, sizeof(report));
SPI_SELECT(mpu6000_dev.spi, PX4_SPIDEV_MPU, false);
SPI_LOCK(mpu6000_dev.spi, false);
data[0] = report.xacc;
data[1] = report.yacc;
data[2] = report.zacc;
return (report.int_status & 0x01);
}
int
SPI::_transferword(uint16_t *send, uint16_t *recv, unsigned len)
{
SPI_SETFREQUENCY(_dev, _frequency);
SPI_SETMODE(_dev, _mode);
SPI_SETBITS(_dev, 16); /* 16 bit transfer */
SPI_SELECT(_dev, _device, true);
/* do the transfer */
//SPI_EXCHANGE(_dev, send, recv, len); /* Try to be compatible with the t_stall of the ADIS16448 which is 9usec (by applying 5usec delay ) */
SPI_EXCHANGE(_dev, send, nullptr, 1);
up_udelay(5); /* Reduced to 5 usec (from 10 use) */
SPI_EXCHANGE(_dev, nullptr, recv+1, len-1);
////
/* and clean up */
SPI_SELECT(_dev, _device, false);
return OK;
}
static uint8_t
read_reg(uint8_t address)
{
uint8_t cmd[2] = {address | DIR_READ, 0};
uint8_t data[2];
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_EXCHANGE(lis331_dev.spi, cmd, data, sizeof(cmd));
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
return data[1];
}
/* called to end transaction */
static int mods_reg_txn_err_cb(void *v)
{
struct mods_reg_data *slf = (struct mods_reg_data *)v;
FAR struct spi_dev_s *dev = slf->dev;
txn_status = -1;
#ifdef CONFIG_STM32_SPI_DMA
SPI_EXCHANGE(dev,slf->regs, slf->regs, sizeof(slf->regs) + 2);
logd("Slave DMA armed! from txn_err\n");
txn_status = 0;
#endif
return 0;
}
int
SPI::_transfer(uint8_t *send, uint8_t *recv, unsigned len)
{
SPI_SETFREQUENCY(_dev, _frequency);
SPI_SETMODE(_dev, _mode);
SPI_SETBITS(_dev, 8);
SPI_SELECT(_dev, _device, true);
/* do the transfer */
SPI_EXCHANGE(_dev, send, recv, len);
/* and clean up */
SPI_SELECT(_dev, _device, false);
return OK;
}
static uint8_t
read_reg(uint8_t address)
{
uint8_t cmd[2] = {address | DIR_READ, 0};
uint8_t data[2];
/* The commented lines don't seem to work since
* lis331_dev.spi_id is not set. the changed variant
* is a hack, but will have to be re-added once we merge
* with the new code XXX TODO
*/
// SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, true);
SPI_EXCHANGE(lis331_dev.spi, cmd, data, sizeof(cmd));
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, false);
// SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
return data[1];
}
unsigned int SPIPump(uint8_t data)
{
uint8_t rx;
printf("SPIPump tx = 0x%X ", data);
if (!spi)
{
spi = up_spiinitialize(1);
SPI_SETBITS(spi, 8);
SPI_SETMODE(spi, SPIDEV_MODE1);
}
SPI_EXCHANGE(spi, &data, &rx, 1);
printf(" rx = 0x%X\n", rx);
return rx;
}
bool iotjs_spi_transfer(iotjs_spi_t* spi) {
iotjs_spi_platform_data_t* platform_data = spi->platform_data;
struct spi_dev_s* spi_dev = platform_data->spi_dev;
SPI_LOCK(spi_dev, true);
SPI_SETFREQUENCY(spi_dev, spi->max_speed);
SPI_SETMODE(spi_dev, spi->mode);
SPI_SETBITS(spi_dev, spi->bits_per_word);
// Select the SPI
iotjs_gpio_write_nuttx(platform_data->cs_chip, false);
SPI_EXCHANGE(spi_dev, spi->tx_buf_data, spi->rx_buf_data, spi->buf_len);
// Unselect the SPI device
iotjs_gpio_write_nuttx(platform_data->cs_chip, true);
SPI_LOCK(spi_dev, false);
return true;
}
