/** * @brief This function handles SPI interrupt request. * @param None * @retval None */ void BSP_SPIx_IRQHANDLER(void) { //Debug_ShowRegister( SPI2_BASE, (DebugPeripheralTypedef *)&DeBugSPI ); /* SPI in Receiver mode */ if (SPI_I2S_GetITStatus(BSP_SPIx, SPI_I2S_IT_RXNE) == SET) { if (ubRxIndex < BUFFERSIZE) { /* Receive Transaction data */ aRxBuffer[ubRxIndex++] = SPI_I2S_ReceiveData(BSP_SPIx); } else { /* Disable the Rx buffer not empty interrupt */ SPI_I2S_ITConfig(BSP_SPIx, SPI_I2S_IT_RXNE, DISABLE); } } /* SPI in Transmitter mode */ if (SPI_I2S_GetITStatus(BSP_SPIx, SPI_I2S_IT_TXE) == SET) { if (ubTxIndex < BUFFERSIZE) { /* Send Transaction data */ SPI_I2S_SendData(BSP_SPIx, aTxBuffer[ubTxIndex++]); } else { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(BSP_SPIx, SPI_I2S_IT_TXE, DISABLE); } } }
/** * @brief This function handles SPI interrupt request. * @param None * @retval None */ void SPIx_IRQHANDLER(void) { #ifdef SPI_SLAVE /* SPI in Slave Receiver mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) == SET) { RxBuffer[Rx_Idx++] = SPI_I2S_ReceiveData(SPIx); } #endif #ifdef SPI_MASTER /* SPI in Master Tramitter mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_TXE) == SET) { if (CmdStatus == 0x00) { /* Send Transaction code */ SPI_I2S_SendData(SPIx, CmdTransmitted); CmdStatus = 0x01; } else { if (Tx_Idx < GetVar_NbrOfData()) { /* Send Transaction data */ SPI_I2S_SendData(SPIx, TxBuffer[Tx_Idx++]); } else { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_TXE, DISABLE); } } } #endif /* SPI_SLAVE */ }
/** * @brief This function handles SPI interrupt request. * @param None * @retval None */ void SPIx_IRQHANDLER(void) { /* SPI in Receiver mode */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) == SET) { if (ubRxIndex < BUFFERSIZE) { /* Receive Transaction data */ aRxBuffer[ubRxIndex++] = SPI_I2S_ReceiveData(SPIx); } else { /* Disable the Rx buffer not empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_RXNE, DISABLE); } } /* SPI in Transmitter mode */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_TXE) == SET) { if (ubTxIndex < BUFFERSIZE) { /* Send Transaction data */ SPI_I2S_SendData(SPIx, aTxBuffer[ubTxIndex++]); } else { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_TXE, DISABLE); } } }
/** * Функция обработки прерываний TX */ void halSPI1_Interrupt_TX_Handler(void) { if (DMA_GetFlagStatus(channel, SPI1_MASTER_Tx_DMA_FLAG_TC) == SET) { SPI_error = SPI_TRANSFER_COMPLETE; DMA_ITConfig(SPI1_MASTER_Rx_DMA_Channel, (DMA_IT_TC | DMA_IT_TE), DISABLE); SPI_I2S_ITConfig(SPI1_MASTER, (SPI_I2S_IT_TXE | SPI_I2S_IT_RXNE), ENABLE); DMA_ClearFlag (channel, SPI1_MASTER_Tx_DMA_FLAG_TC); DMA_ClearITPendingBit(channel, SPI1_MASTER_Tx_DMA_FLAG_TC); } if (DMA_GetFlagStatus(channel, SPI1_MASTER_Tx_DMA_FLAG_TE) == SET) { SPI_error = SPI_TRANSFER_ERROR_FAIL; DMA_ITConfig(SPI1_MASTER_Rx_DMA_Channel, (DMA_IT_TC | DMA_IT_TE), DISABLE); SPI_I2S_ITConfig(SPI1_MASTER, (SPI_I2S_IT_TXE | SPI_I2S_IT_RXNE), ENABLE); DMA_ClearFlag (channel, SPI1_MASTER_Tx_DMA_FLAG_TE); DMA_ClearITPendingBit(channel, SPI1_MASTER_Tx_DMA_FLAG_TE); halSPI1_SS_off(); } /* SPI in Receiver mode */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) != RESET) { if (ubRxIndex < BUFFERSIZE) { /* Receive Transaction data */ aRxBuffer[ubRxIndex++] = SPI_I2S_ReceiveData(SPIx); } else { /* Disable the Rx buffer not empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_RXNE, DISABLE); } } /* SPI in Tramitter mode */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_TXE) != RESET) { if (ubTxIndex < BUFFERSIZE) { /* Send Transaction data */ SPI_I2S_SendData(SPIx, aTxBuffer[ubTxIndex++]); } else { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_TXE, DISABLE); } } }
/******************************************************************************* * Function Name : SPI2_IRQHandler * Description : This function handles SPI2 global interrupt request. * Input : None * Output : None * Return : None *******************************************************************************/ void SPI2_IRQHandler(void) { static uint8_t channel = 0; if ((SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)) { /* Audio codec configuration section */ if (GetVar_SendDummyData() == 1) { /* Send a dummy data just to generate the I2S clock */ SPI_I2S_SendData(SPI2, DUMMYDATA); } else if ((Out_Data_Offset < In_Data_Offset) && ((uint8_t)(MUTE_DATA) == 0)) { if ((channel++) & 1) { SPI_I2S_SendData(SPI2, (uint16_t)Stream_Buff[Out_Data_Offset++]); } else { SPI_I2S_SendData(SPI2, (uint16_t)Stream_Buff[Out_Data_Offset]); } } } }
void SPI_IRQ_HANDLER() { volatile int dummy; if (SPI_I2S_GetITStatus(SPI, SPI_I2S_IT_RXNE) == SET) { if (rxBuffer) { rxBuffer[nextRxByte] = SPI_I2S_ReceiveData(SPI); } else { dummy = SPI_I2S_ReceiveData(SPI); dummy; // To avoid GCC Warning } if (byteRxLeft > 1) { if (txBuffer) { SPI_I2S_SendData(SPI, txBuffer[nextTxByte]); } else { SPI_I2S_SendData(SPI, DUMMY_BYTE); } } byteRxLeft--; nextRxByte++; nextTxByte++; if (byteRxLeft == 0) { portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; SPI_I2S_ITConfig(SPI, SPI_I2S_IT_RXNE, DISABLE); xSemaphoreGiveFromISR(xferComplete, &xHigherPriorityTaskWoken); portYIELD_FROM_ISR(xHigherPriorityTaskWoken); } } }
void SPI2_IRQHandler(void) { if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_RXNE) == SET) { tp_buffer=SPI_I2S_ReceiveData(SPI2); } }
/** * @brief This function handles SPI2 global interrupt request. * @param None * @retval None */ void SPI2_IRQHandler(void) { if ((SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)) { /* Send data on the SPI2 and Check the current commands */ I2S_CODEC_DataTransfer(); } }
/******************************************************************************* * Function Name : SPI3_IRQHandler * Description : This function handles SPI3 global interrupt request. * Input : None * Output : None * Return : None *******************************************************************************/ void SPI3_IRQHandler(void) { /* Check the interrupt source */ if (SPI_I2S_GetITStatus(SPI3, SPI_I2S_IT_RXNE) == SET) { /* Store the I2S3 received data in the relative data table */ I2S3_Buffer_Rx[RxIdx++] = SPI_I2S_ReceiveData(SPI3); } }
void SPI2_IRQHandler(void) { OSIntEnter(); if(SPI_I2S_GetITStatus(SPI2, SPI_IT_CRCERR) == SET) { SPI_I2S_ClearITPendingBit(SPI2, SPI_IT_CRCERR); //MotorCommErr++; } if(SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_OVR) == SET) { SPI_I2S_ClearITPendingBit(SPI2, SPI_I2S_IT_OVR); //MotorCommErr++; } if(SPI_I2S_GetITStatus(SPI2, SPI_IT_MODF) == SET) { SPI_I2S_ClearITPendingBit(SPI2, SPI_IT_MODF); //MotorCommErr++; } OSIntExit(); }
int check_status(uint8_t bit) { int i=0; while(SPI_I2S_GetITStatus(SPI1,bit)!=SET) { i++; if(i==100){ DEBUG("check bit %x timeout\r\n",bit); return RT_FALSE; } rt_thread_delay(1); } return RT_TRUE; }
/******************************************************************************* * Function Name : SPI1_IRQHandler * Description : This function handles SPI1 global interrupt request. * Input : None * Output : None * Return : None *******************************************************************************/ void SPI1_IRQHandler(void) { if (SPI_I2S_GetITStatus(SPI1, SPI_I2S_IT_TXE) != RESET) { /* Send SPI1 data */ SPI_I2S_SendData(SPI1, SPI1_Buffer_Tx[TxIdx++]); /* Disable SPI1 TXE interrupt */ if (TxIdx == BufferSize) { SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_TXE, DISABLE); } } }
void SPI1_IRQHandler()//ПРЕРЫВАНИЕ ПО SPI(НАДО ЕЩЕ ДОБАВИТЬ ОПРОСНЫЙ СИГНАЛ И СТРОКУ ОШИБКИ.ТАК ЖЕ НУЖНА ОБРАБОТКА КАЖДОГО БАЙТА) { if(SPI_I2S_GetITStatus(SPI1, SPI_I2S_IT_RXNE)==SET) read_spi(SPI1,SPIBuffer); //ЗДЕСЬ БУДЕТ НЕВЕДОМАЯ ФИГНЯ SPI_I2S_ClearITPendingBit(SPI1, SPI_I2S_IT_RXNE); }
/******************************************************************************* * Function Name : SPI2_IRQHandler * Description : This function handles SPI2 global interrupt request. * Input : None * Output : None * Return : None *******************************************************************************/ void SPI2_IRQHandler(void) { /* Check the interrupt source */ if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET) { /* Send a data from I2S2 */ SPI_I2S_SendData(SPI2, I2S2_Buffer_Tx[TxIdx++]); } /* Check the end of buffer transfer */ if (RxIdx == 32) { /* Disable the I2S2 TXE interrupt to end the communication */ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE); } }
int main(void) { init(); currentWriteBuffer = mp3_data; currentReadBuffer = mp3_data2; mySPI_Init(); //Init SPI for comm with Pi //initialize SPI rx buffer counter rxIndex = 0; /* Enable the Rx buffer not empty interrupt */ SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_RXNE, ENABLE); /* send initial pulse for RPi to send data*/ GPIO_ToggleBits(GPIOD, GPIO_Pin_11); //sending end of pulse if (SPI_I2S_GetITStatus(SPI1, SPI_I2S_IT_RXNE) != SET) { GPIO_ToggleBits(GPIOD, GPIO_Pin_11); } //wait until data buffer loaded first time (change?) while (!dataRxComplete) { dataRxComplete = dataRxComplete; } //rxIndex = 0; //reset rxIndex (do in interrupt?) dataRxComplete = 0; flipBuffers(); hMP3Decoder = MP3InitDecoder(); //Send need more data GPIO signal InitializeAudio(Audio44100HzSettings); SetAudioVolume(0xCF); PlayAudioWithCallback(AudioCallback, 0); while(1) { // while(!dataRxComplete) // { // dataRxComplete = dataRxComplete; // } // dataRxComplete = 0; // // //flip buffers // char *tempBuffer = currentReadBuffer; // currentReadBuffer = currentWriteBuffer; // currentWriteBuffer = tempBuffer; // // // GPIO_ToggleBits(GPIOD, GPIO_Pin_11); // GPIO_ToggleBits(GPIOD, GPIO_Pin_11); } }
void SPI2_IRQHandler(void) { if(SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_RXNE) == SET) sample_proc(SPI_I2S_ReceiveData(SPI2)); }
/** * @brief This function handles SPI interrupt request. * @param None * @retval None */ void SPI3_IRQHandler(void) { #if defined (SPI_SLAVE) /* SPI in Slave Tramitter mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_TXE) == SET) { SPI_SendData8(SPIx, TxBuffer[Tx_Idx++]); if (Tx_Idx == GetVar_NbrOfData()) { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_TXE, DISABLE); } } /* SPI in Slave Receiver mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) == SET) { if (CmdReceived == 0x00) { CmdReceived = SPI_ReceiveData8(SPIx); CmdStatus = 0x01; } else { RxBuffer[Rx_Idx++] = SPI_ReceiveData8(SPIx); } } /* SPI Error interrupt--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_OVR) == SET) { SPI_ReceiveData8(SPIx); SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_OVR); } #endif /* SPI_SLAVE*/ #if defined (SPI_MASTER) /* SPI in Master Tramitter mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_TXE) == SET) { if (CmdStatus == 0x00) { SPI_SendData8(SPIx, CmdTransmitted); CmdStatus = 0x01; } else { SPI_SendData8(SPIx, TxBuffer[Tx_Idx++]); if (Tx_Idx == GetVar_NbrOfData()) { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(SPIx, SPI_I2S_IT_TXE, DISABLE); } } } /* SPI in Master Receiver mode--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) == SET) { if (CmdReceived == 0x00) { CmdReceived = SPI_ReceiveData8(SPIx); Rx_Idx = 0x00; } else { RxBuffer[Rx_Idx++] = SPI_ReceiveData8(SPIx); } } /* SPI Error interrupt--------------------------------------- */ if (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_OVR) == SET) { SPI_ReceiveData8(SPIx); SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_OVR); } #endif /* SPI_MASTER*/ }
void SPI1_IRQHandler(void) { if(SPI_I2S_GetITStatus(SPI1,SPI_I2S_IT_RXNE)==SET) { inputValues = SPI_I2S_ReceiveData(SPI1); } }
static void SPI_IRQHandler(SPI_TypeDef *SPIx, IOEventFlags device) { while (SPI_I2S_GetITStatus(SPIx, SPI_I2S_IT_RXNE) != RESET) { // Read one byte/word from the receive data register jshSPIPush(device, SPI_I2S_ReceiveData(SPIx)); } }
/* while the SPI is in IDLE state. */ void SPI2_IRQHandler(void) { /* SPI in Receiver mode */ if (SPI_I2S_GetITStatus(WIFI_SPI, SPI_I2S_IT_RXNE) == SET) { if (ubRxIndex < ubRxMax && ubRxIndex < SPI_BUFFER_SIZE) { /* Receive Transaction data */ wlan_rx_buffer[ubRxIndex++] = SPI_I2S_ReceiveData(WIFI_SPI); if (wifi_state == 1 )//rx header { if(ubRxIndex == 5){ unsigned char lsb_size; int size; size=wlan_rx_buffer[3]; lsb_size=wlan_rx_buffer[4]; size = (size << 8) + lsb_size; for (int i = 0; i < size; i++) { wlan_tx_buffer[i]= 0; } wifi_state=2; //rx body ubTxMax = size; ubTxIndex = 1 ; ubRxMax = size + 5; SpiSendByte(wlan_tx_buffer[0]); //sends first byte so next are sent by interrupt SPI_I2S_ITConfig(WIFI_SPI, SPI_I2S_IT_TXE, ENABLE); } }else if (wifi_state==2)//rx body { if (ubRxIndex == ubRxMax){ //end reception WIFI_CS_HIGH(); EXTI_ClearITPendingBit(EXTI_Line8); fWlanInterruptEnable(); SPI_I2S_ITConfig(WIFI_SPI, SPI_I2S_IT_TXE, DISABLE); (*_pfRxHandler)(wlan_rx_buffer+5); } }else if (ubTxIndex == ubTxMax &&ubRxIndex == ubRxMax && wifi_state == 0){//end of transsmision WIFI_CS_HIGH(); EXTI_ClearITPendingBit(EXTI_Line8); fWlanInterruptEnable(); SPI_I2S_ITConfig(WIFI_SPI, SPI_I2S_IT_TXE, DISABLE); } } else { /* Disable the Rx buffer not empty interrupt */ SPI_I2S_ReceiveData(WIFI_SPI); //SPI_I2S_ITConfig(WIFI_SPI, SPI_I2S_IT_RXNE, DISABLE); } } /* SPI in Tramitter mode */ if (SPI_I2S_GetITStatus(WIFI_SPI, SPI_I2S_IT_TXE) == SET) { if ((ubTxIndex < ubTxMax && ubTxIndex < SPI_BUFFER_SIZE))//||wifi_state==1|| wifi_state==2) { /* Send Transaction data */ SPI_I2S_SendData(WIFI_SPI, wlan_tx_buffer[ubTxIndex++]); } else { /* Disable the Tx buffer empty interrupt */ SPI_I2S_ITConfig(WIFI_SPI, SPI_I2S_IT_TXE, DISABLE); } } //wlan_rx_buffer[0] = SpiSendByte(0); }