int main(void)
{
uint32_t i = 0;
uint8_t err = 0;
spi_transfer_t xfer = {0};
spi_slave_config_t userConfig;
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitDebugConsole();
PRINTF("\n\rSlave is working....\n\r");
/*
* userConfig.polarity = kSPI_ClockPolarityActiveHigh;
* userConfig.phase = kSPI_ClockPhaseFirstEdge;
* userConfig.direction = kSPI_MsbFirst;
* userConfig.enableStopInWaitMode = false;
* userConfig.dataMode = kSPI_8BitMode;
* userConfig.txWatermark = kSPI_TxFifoOneHalfEmpty;
* userConfig.rxWatermark = kSPI_RxFifoOneHalfFull;
*/
SPI_SlaveGetDefaultConfig(&userConfig);
SPI_SlaveInit(EXAMPLE_SPI_SLAVE, &userConfig);
SPI_SlaveTransferCreateHandle(EXAMPLE_SPI_SLAVE, &handle, slaveCallback, NULL);
for (i = 0; i < 64; i++)
{
sendBuff[i] = i;
}
/* receive data from master */
xfer.txData = sendBuff;
xfer.rxData = buff;
xfer.dataSize = BUFFER_SIZE;
SPI_SlaveTransferNonBlocking(EXAMPLE_SPI_SLAVE, &handle, &xfer);
while (slaveFinished != true)
{
}
for (i = 0; i < BUFFER_SIZE; i++)
{
if (buff[i] != i)
{
PRINTF("\n\rThe %d number is wrong! It is %dn\r", i, buff[i]);
err++;
}
}
PRINTF("\r\n");
if (err == 0)
{
PRINTF("Succeed!\n\r");
}
while (1)
{
}
}
void spi_format(spi_t *obj, int bits, int mode, int slave)
{
spi_master_config_t master_config;
spi_slave_config_t slave_config;
/* Bits: values between 4 and 16 are valid */
MBED_ASSERT(bits >= 4 && bits <= 16);
obj->bits = bits;
if (slave) {
/* Slave config */
SPI_SlaveGetDefaultConfig(&slave_config);
slave_config.dataWidth = (spi_data_width_t)(bits - 1);
slave_config.polarity = (mode & 0x2) ? kSPI_ClockPolarityActiveLow : kSPI_ClockPolarityActiveHigh;
slave_config.phase = (mode & 0x1) ? kSPI_ClockPhaseSecondEdge : kSPI_ClockPhaseFirstEdge;
SPI_SlaveInit(spi_address[obj->instance], &slave_config);
} else {
/* Master config */
SPI_MasterGetDefaultConfig(&master_config);
master_config.dataWidth = (spi_data_width_t)(bits - 1);
master_config.polarity = (mode & 0x2) ? kSPI_ClockPolarityActiveLow : kSPI_ClockPolarityActiveHigh;
master_config.phase = (mode & 0x1) ? kSPI_ClockPhaseSecondEdge : kSPI_ClockPhaseFirstEdge;
master_config.direction = kSPI_MsbFirst;
switch (obj->instance) {
case 0:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
break;
case 1:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
RESET_PeripheralReset(kFC1_RST_SHIFT_RSTn);
break;
case 2:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
break;
case 3:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM3);
RESET_PeripheralReset(kFC3_RST_SHIFT_RSTn);
break;
case 4:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
break;
case 5:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM5);
RESET_PeripheralReset(kFC5_RST_SHIFT_RSTn);
break;
case 6:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM6);
RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
break;
case 7:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
break;
#if (FSL_FEATURE_SOC_FLEXCOMM_COUNT > 8U)
case 8:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8);
RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn);
break;
#endif
#if (FSL_FEATURE_SOC_FLEXCOMM_COUNT > 9U)
case 9:
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM9);
RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);
break;
#endif
}
SPI_MasterInit(spi_address[obj->instance], &master_config, 12000000);
}
}
