//////////
// Function Name : POST_SetClkSrc
// Function Description : Set the clock for processing
// Input : eClkSrc - Video clock source
// sCh - POST structure base address
// Output : None
void POST_SetClkSrc(POST_CLK_SRC eClkSrc, POST *sCh)
{
u32 uPostPortSelect;
PostInp32(POST_MODE_CTRL, sCh->m_uModeRegValue);
if(sCh->m_uBaseAddr == POST0_BASE)
uPostPortSelect = POST_PORT;
else
uPostPortSelect = SCALER_PORT;
if((eClkSrc == HCLK))
{
if(g_HCLK>66000000)
{
sCh->m_uModeRegValue &= ~(0x7F<<23);
sCh->m_uModeRegValue |= (Post_ClkDivider<<24); // CLKVAL_F, Clock Source/2
sCh->m_uModeRegValue |= (1<<23); // Divided by CLKVAL_F
}
else
{
sCh->m_uModeRegValue &= ~(0x7F<<23);
}
sCh->m_uModeRegValue = (sCh->m_uModeRegValue & ~(0x3<<21)) | (0<<21);
}
else if(eClkSrc == PLL_EXT_MOUTEPLL)
{
SYSC_SetPLL(eEPLL, 32, 1, 2, 0); // EPLL => 96MHz
if(uPostPortSelect == POST_PORT)
SYSC_ClkSrc(eLCD_MOUTEPLL);
else
SYSC_ClkSrc(eSCALER_MOUTEPLL);
SYSC_ClkSrc(eEPLL_FOUT);
sCh->m_uModeRegValue &= ~(0x7F<<23);
sCh->m_uModeRegValue |= (Post_ClkDivider<<24); // CLKVAL_F, Clock Source/2
sCh->m_uModeRegValue |= (1<<23); // Divided by CLKVAL_F
sCh->m_uModeRegValue = (sCh->m_uModeRegValue & ~(0x3<<21)) | (1<<21);
}
else if(eClkSrc == PLL_EXT_FINEPLL)
{
if(uPostPortSelect == POST_PORT)
SYSC_ClkSrc(eLCD_FINEPLL);
else
SYSC_ClkSrc(eSCALER_FINEPLL);
//SYSC_ClkSrc(eEPLL_FIN);
sCh->m_uModeRegValue &= ~(0x7F<<23); //for clear CLKVAL_F
sCh->m_uModeRegValue = (sCh->m_uModeRegValue & ~(0x3<<21)) | (1<<21);
}
else if(eClkSrc == PLL_EXT_DOUTMPLL)
{
if(uPostPortSelect == POST_PORT)
SYSC_ClkSrc(eLCD_DOUTMPLL);
else
SYSC_ClkSrc(eSCALER_DOUTMPLL);
SYSC_ClkSrc(eMPLL_FOUT);
sCh->m_uModeRegValue &= ~(0x7F<<23);
sCh->m_uModeRegValue |= (Post_ClkDivider<<24); // CLKVAL_F, Clock Source/2
sCh->m_uModeRegValue |= (1<<23); // Divided by CLKVAL_F
sCh->m_uModeRegValue = (sCh->m_uModeRegValue & ~(0x3<<21)) | (1<<21);
}
else //27MHz Ext Clock Input
{
sCh->m_uModeRegValue &= ~(0x7F<<23);
sCh->m_uModeRegValue = (sCh->m_uModeRegValue & ~(0x3<<21)) | (3<<21);
}
PostOutp32(POST_MODE_CTRL, sCh->m_uModeRegValue);
if(uPostPortSelect == POST_PORT)
ePost_ClkSrc = eClkSrc;
else
eScaler_ClkSrc = eClkSrc;
}
u8 UART_SetConfig(u8 cCh, u32 uBreakorLoop,u32 uParity,u32 uNumStop,u32 uWordLength,u32 uOpCLK,u32 uSelPLL,
u32 uExtIFtype,u32 uBaudrate,u32 uSelOpmode,u32 uSelFIFO,u32 uSelAFC,u32 uRTSLvL)
{
volatile UART_CON *pUartCon;
pUartCon = &g_AUartCon[cCh];
//Set Other Options
// UART_Printf("\nSelect Other Options\n 0. Nothing[D] 1.Send Break Signal 2. Loop Back Mode \n Choose : ");
switch(uBreakorLoop)
{
default :
pUartCon->cSendBreakSignal = 0x0;
pUartCon->cLoopTest = 0x0;
break;
case 1 :
pUartCon->cSendBreakSignal = 1;
return cCh;
case 2 :
pUartCon->cLoopTest = 1;
break;
}
//Set Parity mode
// UART_Printf("\nSelect Parity Mode\n 1. No parity[D] 2. Odd 3. Even 4. Forced as '1' 5. Forced as '0' \n Choose : ");
switch(uParity)
{
default :
pUartCon->cParityBit = 0;
break;
case 2 :
pUartCon->cParityBit = 4;
break;
case 3 :
pUartCon->cParityBit = 5;
break;
case 4 :
pUartCon->cParityBit = 6;
break;
case 5 :
pUartCon->cParityBit = 7;
break;
}
//Set the number of stop bit
// UART_Printf("\n\nSelect Number of Stop Bit\n 1. One stop bit per frame[D] 2. Two stop bit per frame");
switch(uNumStop)
{
default :
pUartCon->cStopBit = 0;
break;
case 2 :
pUartCon->cStopBit = 1;
break;
}
//Set Word Length
// UART_Printf("\n\nSelect Word Length\n 1. 5bits 2. 6bits 3. 7bits 4. 8bits[D] \n Choose : ");
switch(uWordLength)
{
case 1 :
pUartCon->cDataBit = 0;
break;
case 2 :
pUartCon->cDataBit = 1;
break;
case 3 :
pUartCon->cDataBit = 2;
break;
default :
pUartCon->cDataBit = 3;
break;
}
// Set Operation clock
// UART_Printf("\n\nSelect Operating Clock\n 1. PCLK[D] 2. UEXTCLK 3. EPLL \n Choose : ");
switch (uOpCLK)
{
case 2 :
pUartCon->cOpClock = 1;
// g_uOpClock=12000000;
GPIO_SetFunctionEach(eGPIO_F,eGPIO_13,2);
// connect CLKOUT and UEXTCLK
// UART_Printf("\nInput PWM EXT_CLK by Pulse Generater\n");
break;
case 3 :
pUartCon->cOpClock = 3;
// UART_Printf("\nSelect Clock SRC\n 1.EPLL 2.MPLL \n Choose: ");
switch(uSelPLL)
{
case 1:
// SYSC_SetPLL(eEPLL,64,3,1,0); //EPLL=128Mhz
SYSC_SetPLL(eEPLL,32,1,1,0); //EPLL=192Mhz
SYSC_ClkSrc(eEPLL_FOUT);
SYSC_ClkSrc(eUART_MOUTEPLL);
// SYSC_CtrlCLKOUT(eCLKOUT_EPLLOUT,9);
g_uOpClock = CalcEPLL(32,1,1,0);
// UART_Printf("EPLL = %dMhz\n",(g_uOpClock/1000000));
// use EPLL output clock
//SetEPLL(42, 1, 2); // Epll output - 96MHz, pll input - 12MHz
//CLK_SRC UART_SEL[13] 0:EPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
case 2: //MPLL
SYSC_ClkSrc(eMPLL_FOUT);
SYSC_ClkSrc(eUART_DOUTMPLL);
Delay(100);
g_uOpClock = (u32)g_MPLL/2;
// UART_Printf("MPLL = %dMhz\n",(g_uOpClock/1000000));
// use MPLL output clock
//CLK_SRC UART_SEL[13] 1:MPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
default: //MPLL
SYSC_ClkSrc(eMPLL_FOUT);
SYSC_ClkSrc(eUART_DOUTMPLL);
Delay(100);
g_uOpClock =(u32) g_MPLL/2;
//SetEPLL(42, 1, 2); // Epll output - 96MHz, pll input - 12MHz
//CLK_SRC UART_SEL[13] 0:EPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
}
break;
default :
pUartCon->cOpClock = 0; // PCLK
break;
}
// Select UART or IrDA 1.0
// UART_Printf("\n\nSelect External Interface Type\n 1. UART[D] 2. IrDA mode\n Choose : ");
if (uExtIFtype==2)
pUartCon->cSelUartIrda = 1; // IrDA mode
else
pUartCon->cSelUartIrda = 0; // IrDA mode
// Set Baudrate
// UART_Printf("\n\nType the baudrate and then change the same baudrate of host, too.\n");
// UART_Printf(" Baudrate (ex 9600, 115200[D], 921600) : ");
pUartCon->uBaudrate = uBaudrate;
// if ((s32)pUartCon->uBaudrate == -1)
// pUartCon->uBaudrate = 115200;
// Select UART operating mode
// UART_Printf("\n\nSelect Operating Mode\n 1. Interrupt[D] 2. DMA\n Choose : ");
if (uSelOpmode==2)
{
pUartCon->cTxMode = 2; // DMA0 mode
pUartCon->cRxMode = 3; // DMA1 mode
}
else
{
pUartCon->cTxMode = 1; // Int mode
pUartCon->cRxMode = 1; // Int mode
}
// Select UART FIFO mode
// UART_Printf("\n\nSelect FIFO Mode (Tx/Rx[byte])\n 1. no FIFO[D] 2. Empty/1 3. 16/8 4. 32/16 5. 48/32 \n Choose : ");
if ( (uSelFIFO>1)&&(uSelFIFO<6) )
{
pUartCon->cEnableFifo = 1;
pUartCon->cTxTrig = uSelFIFO -2;
pUartCon->cRxTrig = uSelFIFO -2;
}
else
{
pUartCon->cEnableFifo = 0;
}
// Select AFC mode enable/disable
// UART_Printf("\n\nSelect AFC Mode\n 1. Disable[D] 2. Enable\n Choose : ");
if (uSelAFC == 2)
{
pUartCon->cAfc = 1; // AFC mode enable
// UART_Printf("Select nRTS trigger level(byte)\n 1. 63[D] 2. 56 3. 48 4. 40 5. 32 6. 24 7. 16 8. 8\n Choose : ");
if ( (uRTSLvL>1)&&(uRTSLvL<9) )
pUartCon->cRtsTrig = uRTSLvL -1;
else
pUartCon->cRtsTrig = 0; // default 63 byte
}
else
{
pUartCon->cAfc = 0; // AFC mode disable
}
return cCh;
}
