C++ (Cpp) SataBar5setting 예제들

예제 #1

파일: Ide2AhciLate.c 프로젝트: Godkey/coreboot

/**
 * FchInitLateSataIde2Ahci - Prepare SATA Ide2Ahci controller to
 * boot to OS.
 *
 *              - Set class ID to Ide2Ahci (if set to Ide2Ahci * Mode)
 *              - Enable Ide2Ahci interrupt
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchInitLateSataIde2Ahci (
  IN  VOID     *FchDataPtr
  )
{
  UINT32       Bar5;
  FCH_DATA_BLOCK         *LocalCfgPtr;
  AMD_CONFIG_PARAMS      *StdHeader;

  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
  StdHeader = LocalCfgPtr->StdHeader;

  //
  //program the AHCI class code
  //
  RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01060100, StdHeader);

  SataBar5setting (LocalCfgPtr, &Bar5);

  //
  //Set interrupt enable bit
  //
  RwMem ((Bar5 + 0x04), AccessWidth8, (UINT32)~0, BIT1);
  ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5);
}

예제 #2

파일: AhciLate.c 프로젝트: B-Rich/coreboot

/**
 * FchInitLateSataAhci - Prepare SATA AHCI controller to boot to
 * OS.
 *
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchInitLateSataAhci (
  IN  VOID     *FchDataPtr
  )
{
  UINT32       Bar5;
  FCH_DATA_BLOCK         *LocalCfgPtr;

  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
  SataBar5setting (LocalCfgPtr, &Bar5);
  ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5);
}

예제 #3

파일: KernSataIdeEnv.c 프로젝트: fishbaoz/CarrizoPI

/**
 * FchInitEnvSataIde - Config SATA IDE controller before PCI
 * emulation
 *
 *
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchInitEnvSataIde (
  IN  VOID     *FchDataPtr
  )
{
  UINT8                  ChannelByte;
  FCH_DATA_BLOCK         *LocalCfgPtr;
  AMD_CONFIG_PARAMS      *StdHeader;
  UINT32                 Bar5;
  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
  StdHeader = LocalCfgPtr->StdHeader;

  SataBar5setting (LocalCfgPtr, &Bar5);
  //
  // Class code
  //
  if ( LocalCfgPtr->Sata.SataClass == SataLegacyIde ) {
    RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0xFF, 0x01018A00, StdHeader);
  } else {
    RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0xFF, 0x01018F00, StdHeader);
  }
  //
  // Device ID
  //
  RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, KERN_FCH_SATA_DID, StdHeader);
  //
  // SSID
  //
  if (LocalCfgPtr->Sata.SataIdeSsid != NULL ) {
    RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG2C, AccessWidth32, 0x00, LocalCfgPtr->Sata.SataIdeSsid, StdHeader);
  }
  //
  // Sata IDE Channel configuration
  //
  ChannelByte = 0x00;
  ReadPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48 + 3), AccessWidth8, &ChannelByte, StdHeader);
  ChannelByte &= 0xCF;

  if ( LocalCfgPtr->Sata.SataDisUnusedIdePChannel ) {
    ChannelByte |= 0x10;
  }

  if ( LocalCfgPtr->Sata.SataDisUnusedIdeSChannel ) {
    ChannelByte |= 0x20;
  }
  RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth32, 0xFFFFFFFF, 0x07, StdHeader);
  // Clear AHCI Enable during POST time. DE is investigating when/how to restore this bit before goes to OS boot.
  RwMem ((Bar5 + FCH_SATA_BAR5_REG04), AccessWidth32, ~(UINT32) (BIT31), 0);
  RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth32, 0xFFFFFFFF, 0x00, StdHeader);
  WritePci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48 + 3), AccessWidth8, &ChannelByte, StdHeader);
}

예제 #4

파일: AvalonRaidMid.c 프로젝트: fishbaoz/edk2ml

/**
 * FchInitMidSataRaid  - Config SATA Raid controller after PCI
 * emulation
 *
 *
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchInitMidSataRaid (
  IN  VOID     *FchDataPtr
  )
{
  UINT32       Bar5;
  FCH_DATA_BLOCK         *LocalCfgPtr;

  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;

  SataRaidSetDeviceNumMsi (LocalCfgPtr);
  SataBar5setting (LocalCfgPtr, &Bar5);
  ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5);
}

예제 #5

파일: AvalonSataLib.c 프로젝트: fishbaoz/edk2ml

/**
 * FchSataDriveFpga -
 *
 *
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchSataDriveFpga (
  IN  VOID     *FchDataPtr
  )
{
  UINT32                 Bar5;
  FCH_DATA_BLOCK         *LocalCfgPtr;

  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;

  Bar5 = 0;
  SataBar5setting (LocalCfgPtr, &Bar5);

  FchSataBar5settingFpga (LocalCfgPtr, &Bar5);
  FchSataDriveDetectionFpga (LocalCfgPtr, &Bar5);
}

예제 #6

파일: SataIdeMid.c 프로젝트: andy737/firebrickRemote

/**
 * FchInitMidSataIde - Config SATA controller after PCI
 * emulation
 *
 *
 *
 * @param[in] FchDataPtr Fch configuration structure pointer.
 *
 */
VOID
FchInitMidSataIde (
  IN  VOID     *FchDataPtr
  )
{
  UINT32                 Bar5;
  FCH_DATA_BLOCK         *LocalCfgPtr;

  LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;

  Bar5 = 0;
  SataBar5setting (LocalCfgPtr, &Bar5);
  //
  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
  //
  if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
    SataDriveDetection (LocalCfgPtr, &Bar5);
  }
}