void sd_int_hdl(struct adapter *adapter) { struct hal_com_data *hal; if ( (adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ) return; hal = GET_HAL_DATA(adapter); hal->sdio_hisr = 0; ReadInterrupt8723BSdio(adapter, &hal->sdio_hisr); if (hal->sdio_hisr & hal->sdio_himr) { u32 v32; hal->sdio_hisr &= hal->sdio_himr; /* clear HISR */ v32 = hal->sdio_hisr & MASK_SDIO_HISR_CLEAR; if (v32) { SdioLocalCmd52Write4Byte(adapter, SDIO_REG_HISR, v32); } sd_int_dpc(adapter); } else { RT_TRACE(_module_hci_ops_c_, _drv_err_, ("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n", __func__, hal->sdio_hisr, hal->sdio_himr)); } }
void sd_int_hdl(PADAPTER padapter) { PHAL_DATA_TYPE phal; if ((padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE)) return; phal = GET_HAL_DATA(padapter); phal->sdio_hisr = 0; ReadInterrupt8723BSdio(padapter, &phal->sdio_hisr); if (phal->sdio_hisr & phal->sdio_himr) { u32 v32; phal->sdio_hisr &= phal->sdio_himr; // clear HISR v32 = phal->sdio_hisr & MASK_SDIO_HISR_CLEAR; if (v32) { SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, v32); } sd_int_dpc(padapter); } else { RT_TRACE(_module_hci_ops_c_, _drv_err_, ("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n", __FUNCTION__, phal->sdio_hisr, phal->sdio_himr)); } }
// // Description: // Clear corresponding SDIO Host ISR interrupt service. // // Assumption: // Using SDIO Local register ONLY for configuration. // // Created by Roger, 2011.02.11. // void ClearInterrupt8723ASdio(PADAPTER padapter) { u32 tmp = 0; tmp = SdioLocalCmd52Read4Byte(padapter, SDIO_REG_HISR); SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, tmp); // padapter->IsrContent.IntArray[0] = 0; padapter->IsrContent = 0; }
// // Description: // Disable SDIO Host IMR configuration to mask unnecessary interrupt service. // // Assumption: // Using SDIO Local register ONLY for configuration. // // Created by Roger, 2011.02.11. // void DisableInterrupt8188ESdio(PADAPTER padapter) { // Clear all ISRs //PlatformEFSdioLocalCmd52Write4Byte(Adapter, SDIO_REG_HISR, pHalData->IntrMaskToClear[0]); //PlatformEFIOWrite4Byte(Adapter, REG_HSISR, pHalData->SysIntrMaskToClear[0]); // Clear all IMRs #if 0 SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HIMR, SDIO_HIMR_DISABLED); #else u32 himr; himr = cpu_to_le32(SDIO_HIMR_DISABLED); sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); #endif }
// // Description: // Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. // // Assumption: // 1. Using SDIO Local register ONLY for configuration. // 2. PASSIVE LEVEL // // Created by Roger, 2011.02.11. // void EnableInterrupt8188ESdio(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); #if 0 SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HIMR, pHalData->sdio_himr); #else { u32 himr; himr = cpu_to_le32(pHalData->sdio_himr); sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); } #endif // // <Roger_Notes> There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. // So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. // 2011.10.19. // rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); }