static void BandaiPower(void) { BandaiSync(); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x6000,0xFFFF,BandaiWrite); SetReadHandler(0x6000,0x7FFF,BandaiRead); }
static void UNLKS7032Power(void) { Sync(); SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4020,0xFFFF,UNLKS7032Write); }
void GenMMC3Power(void) { if (UNIFchrrama) setchr8(0); SetWriteHandler(0x8000, 0xBFFF, MMC3_CMDWrite); SetWriteHandler(0xC000, 0xFFFF, MMC3_IRQWrite); SetReadHandler(0x8000, 0xFFFF, CartBR); A001B = A000B = 0; setmirror(1); if (mmc3opts & 1) { if (WRAMSIZE == 1024) { FCEU_CheatAddRAM(1, 0x7000, WRAM); SetReadHandler(0x7000, 0x7FFF, MAWRAMMMC6); SetWriteHandler(0x7000, 0x7FFF, MBWRAMMMC6); } else { FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM); SetWriteHandler(0x6000, 0x6000 + ((WRAMSIZE - 1) & 0x1fff), CartBW); SetReadHandler(0x6000, 0x6000 + ((WRAMSIZE - 1) & 0x1fff), CartBR); setprg8r(0x10, 0x6000, 0); } if (!(mmc3opts & 2)) FCEU_dwmemset(WRAM, 0, WRAMSIZE); } MMC3RegReset(); if (CHRRAM) FCEU_dwmemset(CHRRAM, 0, CHRRAMSIZE); }
static void M108Power(void) { Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0x8FFF, M108Write); // regular 108 SetWriteHandler(0xF000, 0xFFFF, M108Write); // simplified Kaiser BB Hack }
void MDFN_VSUniInstallRWHooks(void) { assert(NESIsVSUni); if(secptr) SetReadHandler(0x5e00,0x5e01,VSSecRead); if(curppu == RC2C05_04) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_Topgun); } else if(curppu == RC2C05_03) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_Gumshoe); } else if(curppu == RC2C05_02) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_MBJ); } if(curppu == RC2C05_04 || curppu == RC2C05_01 || curppu == RC2C05_03 || curppu == RC2C05_02) { OldWritePPU[0] = GetWriteHandler(0x2000); OldWritePPU[1] = GetWriteHandler(0x2001); SetWriteHandler(0x2000, 0x2001, B2000_2001_2C05); } if(curmd5 == 0x2d396247cf58f9faLL) /* Super Xevious */ { SetReadHandler(0x5400,0x57FF,XevRead); } }
void FCEU_VSUniPower(void) { coinon = 0; VSindex = 0; if(secptr) SetReadHandler(0x5e00,0x5e01,VSSecRead); if(curppu == RC2C05_04) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_Topgun); } else if(curppu == RC2C05_03) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_Gumshoe); } else if(curppu == RC2C05_02) { OldReadPPU = GetReadHandler(0x2002); SetReadHandler(0x2002, 0x2002, A2002_MBJ); } if(curppu == RC2C05_04 || curppu == RC2C05_01 || curppu == RC2C05_03 || curppu == RC2C05_02) { OldWritePPU[0] = GetWriteHandler(0x2000); OldWritePPU[1] = GetWriteHandler(0x2001); SetWriteHandler(0x2000, 0x2001, B2000_2001_2C05); } if(curmd5 == 0x2d396247cf58f9faLL) /* Super Xevious */ { SetReadHandler(0x5400,0x57FF,XevRead); } }
static void FDSInit(void) { memset(FDSRegs, 0, sizeof(FDSRegs)); writeskip = DiskPtr = DiskSeekIRQ = 0; setmirror(1); setprg8(0xE000, 0); // BIOS setprg32r(1, 0x6000, 0); // 32KB RAM setchr8(0); // 8KB CHR RAM MapIRQHook = FDSFix; GameStateRestore = FDSStateRestore; SetReadHandler(0x4030, 0x4030, FDSRead4030); SetReadHandler(0x4031, 0x4031, FDSRead4031); SetReadHandler(0x4032, 0x4032, FDSRead4032); SetReadHandler(0x4033, 0x4033, FDSRead4033); SetWriteHandler(0x4020, 0x4025, FDSWrite); SetWriteHandler(0x6000, 0xDFFF, CartBW); SetReadHandler(0x6000, 0xFFFF, CartBR); IRQCount = IRQLatch = IRQa = 0; FDSSoundReset(); InDisk = 0; SelectDisk = 0; }
int BTR_Init(CartInfo *info) { SetupCartPRGMapping(0x10,WRAM,8192,1); SetWriteHandler(0x8000,0xbfff,Mapper69_write); SetWriteHandler(0xc000,0xdfff,Mapper69_SWL); SetWriteHandler(0xe000,0xffff,Mapper69_SWH); SetWriteHandler(0x6000,0x7fff,SUN5BWRAM); SetReadHandler(0x6000,0x7fff,SUN5AWRAM); SetReadHandler(0x8000, 0xFFFF, CartBR); info->Power = Power; info->Reset = Reset; info->StateAction = StateAction; if(info->battery) { info->SaveGame[0] = WRAM; info->SaveGameLen[0] = 8192; } Mapper69_ESI(&info->CartExpSound); MapIRQHook = SunIRQHook; return(1); }
void GenMMC3Power(void) { if (UNIFchrrama) setchr8(0); SetWriteHandler(0x8000, 0xBFFF, MMC3_CMDWrite); SetWriteHandler(0xC000, 0xFFFF, MMC3_IRQWrite); SetReadHandler(0x8000, 0xFFFF, CartBR); // KT-008 boards hack 2-in-1, TODO assign to new ines mapper, most dump of KT-boards on the net are mapper 4, so need database or goodnes fix support SetWriteHandler(0x5000,0x5FFF, KT008HackWrite); A001B = A000B = 0; setmirror(1); if (mmc3opts & 1) { if (WRAMSIZE == 1024) { FCEU_CheatAddRAM(1, 0x7000, WRAM); SetReadHandler(0x7000, 0x7FFF, MAWRAMMMC6); SetWriteHandler(0x7000, 0x7FFF, MBWRAMMMC6); } else { FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM); SetWriteHandler(0x6000, 0x6000 + ((WRAMSIZE - 1) & 0x1fff), CartBW); SetReadHandler(0x6000, 0x6000 + ((WRAMSIZE - 1) & 0x1fff), CartBR); setprg8r(0x10, 0x6000, 0); } if (!(mmc3opts & 2)) FCEU_dwmemset(WRAM, 0, WRAMSIZE); } MMC3RegReset(); if (CHRRAM) FCEU_dwmemset(CHRRAM, 0, CHRRAMSIZE); }
static void M246Power(void) { regs[0] = regs[1] = regs[2] = regs[3] = ~0; Sync(); SetWriteHandler(0x6000, 0x67FF, M246Write); SetReadHandler(0x6800, 0x6FFF, CartBR); SetWriteHandler(0x6800, 0x6FFF, CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR); }
static void UNLSMB2JPower(void) { prg=~0; Sync(); SetReadHandler(0x5000,0x7FFF,CartBR); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4020,0xffff,UNLSMB2JWrite); }
static void UNLBBPower(void) { chr = 0; reg = ~0; Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLBBWrite); }
static void UNLKS7012Power(void) { reg = ~0; Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLKS7012Write); }
static void UNLSMB2JPower(void) { prg = 0; Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR); SetReadHandler(0x4042, 0x4055, UNLSMB2JRead); SetWriteHandler(0x4068, 0x4068, UNLSMB2JWrite2); SetWriteHandler(0x4027, 0x4027, UNLSMB2JWrite1); }
static void UNLD2000Power(void) { prg = mode = 0; Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW); SetReadHandler(0x8000, 0xFFFF, UNLD2000Read); SetWriteHandler(0x5000, 0x5FFF, UNLD2000Write); }
static void M177Power(void) { reg = 0; Sync(); SetReadHandler(0x6000, 0x7fff, CartBR); SetWriteHandler(0x6000, 0x7fff, CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0xFFFF, M177Write); }
static void M170Power(void) { Sync(); SetWriteHandler(0x6502,0x6502,M170ProtW); SetWriteHandler(0x7000,0x7000,M170ProtW); SetReadHandler(0x7001,0x7001,M170ProtR); SetReadHandler(0x7777,0x7777,M170ProtR); SetReadHandler(0x8000,0xFFFF,CartBR); }
static void UNLSC127Power(void) { Sync(); setprg8r(0x10, 0x6000, 0); setprg8(0xE000, ~0); SetReadHandler(0x6000, 0x7fff, CartBR); SetWriteHandler(0x6000, 0x7fff, CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLSC127Write); }
static void Power(void) { prg_reg = 0; chr_reg = 0; Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0xFFFF, M216WriteHi); SetWriteHandler(0x5000, 0x5000, M216Write5000); SetReadHandler(0x5000, 0x5000, M216Read5000); }
static void M106Power(void) { reg[8]=reg[9]=reg[0xa]=reg[0xb]=-1; Sync(); SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0x8000,0xFFFF,M106Write); }
static void UNLD2000Power(void) { prg = mode = 0; Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW); SetReadHandler(0x8000, 0xFFFF, UNLD2000Read); SetWriteHandler(0x5000, 0x5FFF, UNLD2000Write); FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM); }
static void M153Power(void) { BandaiSync(); setprg8r(0x10,0x6000,0); SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000,0xFFFF,BandaiWrite); }
static void M34Power(void) { regs[0] = regs[1] = 0; regs[2] = 1; Sync(); SetReadHandler(0x6000, 0x7ffc, CartBR); SetWriteHandler(0x6000, 0x7ffc, CartBW); SetReadHandler(0x8000, 0xffff, CartBR); SetWriteHandler(0x7ffd, 0xffff, M34Write); }
void ResetMapping(void) { SetReadHandler(0x0000,0xFFFF,0); SetWriteHandler(0x0000,0xFFFF,0); SetReadHandler(0,0x1FFF,ARAML); SetWriteHandler(0,0x1FFF,BRAML); SetNESSoundMap(); }
static void MALEEReset(void) { setprg2r(0x10,0x7000,0); SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000,0x67FF,CartBR); SetReadHandler(0x7000,0x77FF,CartBR); setprg2r(1,0x6000,0); setprg32(0x8000,0); setchr8(0); }
static void Power(void) { latche=0; Sync(); setchr8(0); setprg16(0xc000,0x7); SetReadHandler(0x6000,0x7FFF,ExtDev); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000,0xFFFF,M188Write); }
static void LatchPower(void) { latche = latcheinit; WSync(); if (WRAM) { SetReadHandler(0x6000, 0xFFFF, CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW); } else SetReadHandler(0x6000, 0xFFFF, defread); SetWriteHandler(addrreg0, addrreg1, LatchWrite); }
static void M32Power(void) { Sync(); SetReadHandler(0x6000,0x7fff,CartBR); SetWriteHandler(0x6000,0x7fff,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR); SetWriteHandler(0x8000, 0x8FFF, M32Write0); SetWriteHandler(0x9000, 0x9FFF, M32Write1); SetWriteHandler(0xA000, 0xAFFF, M32Write2); SetWriteHandler(0xB000, 0xBFFF, M32Write3); }
static void M179Power(void) { reg[0]=reg[1]=0; Sync(); SetWriteHandler(0x4020,0x5fff,M179WriteLo); SetReadHandler(0x6000,0x7fff,CartBR); SetWriteHandler(0x6000,0x7fff,CartBW); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000,0xFFFF,M179Write); }
static void UNLSB2000Power(void) { UNLSB2000Reset(); Sync(); SetReadHandler(0x6000, 0x7fff, CartBR); SetWriteHandler(0x6000, 0x7fff, CartBW); SetReadHandler(0x8000, 0xffff, CartBR); SetWriteHandler(0x8000, 0xbfff, CartBW); SetWriteHandler(0x4020, 0x5fff, UNLSB2000Write); SetReadHandler(0x4020, 0x5fff, UNLSB2000Read); }