void radio_init(uint8_t * rxbuf, uint8_t rxbufsz)
{
trx_regval_t status;
/* init cpu peripherals and global IRQ enable */
radiostatus.rxframe = rxbuf;
radiostatus.rxframesz = rxbufsz;
//trx_set_irq_handler(radio_irq_handler);
/* transceiver initialization */
TRX_RESET_LOW();
TRX_SLPTR_LOW();
DELAY_US(TRX_RESET_TIME_US);
#if defined(CUSTOM_RESET_TIME_MS)
DELAY_MS(CUSTOM_RESET_TIME_MS);
#endif
TRX_RESET_HIGH();
/* disable IRQ and clear any pending IRQs */
trx_reg_write(RG_IRQ_MASK, 0);
trx_reg_read(RG_IRQ_STATUS);
trx_bit_write(SR_TRX_CMD, CMD_TRX_OFF);
DELAY_US(510);
status = trx_bit_read(SR_TRX_STATUS);
if (status != TRX_OFF)
{
radio_error(STATE_SET_FAILED);
}
trx_bit_write(SR_TX_AUTO_CRC_ON, 1);
trx_reg_write(RG_IRQ_MASK, TRX_IRQ_RX_START | TRX_IRQ_RX_END | TRX_IRQ_TX_END);
radiostatus.state = STATE_OFF;
radiostatus.idle_state = STATE_OFF;
}
void radio_init(uint8_t * rxbuf, uint8_t rxbufsz)
{
trx_regval_t status;
/* init cpu peripherals and global IRQ enable */
radiostatus.rxframe = rxbuf;
radiostatus.rxframesz = rxbufsz;
trx_io_init(DEFAULT_SPI_RATE);
trx_set_irq_handler(radio_irq_handler);
/* transceiver initialization */
TRX_RESET_LOW();
TRX_SLPTR_LOW();
DELAY_US(TRX_RESET_TIME_US);
#if defined(CUSTOM_RESET_TIME_MS)
DELAY_MS(CUSTOM_RESET_TIME_MS);
#endif
TRX_RESET_HIGH();
/* disable IRQ and clear any pending IRQs */
trx_reg_write(RG_IRQ_MASK, 0);
trx_reg_read(RG_IRQ_STATUS);
#if RADIO_TYPE == RADIO_AT86RF212
trx_reg_write(RG_TRX_CTRL_0, 0x19);
#ifdef CHINABAND
trx_reg_write(RG_CC_CTRL_1, CCBAND );
trx_reg_write(RG_CC_CTRL_0, CCNUMBER);//channel 0
trx_reg_write(RG_TRX_CTRL_2, TRX_OQPSK250);
/*trx_bit_write(SR_OQPSK_SUB1_RC_EN,1);
trx_bit_write(SR_BPSK_OQPSK,1);
trx_bit_write(SR_SUB_MODE,1);
trx_bit_write(SR_OQPSK_DATA_RATE,0);
trx_bit_write(SR_CC_BAND,CCBAND);
*/
DELAY_US(510);
#endif
trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
DELAY_US(510);
#else
trx_bit_write(SR_TRX_CMD, CMD_TRX_OFF);
DELAY_US(510);
#endif
do
{
status = trx_bit_read(SR_TRX_STATUS);
}
while (status != TRX_OFF);
trx_bit_write(SR_TX_AUTO_CRC_ON, 1);
trx_reg_write(RG_IRQ_MASK, TRX_IRQ_RX_START | TRX_IRQ_TRX_END);
radiostatus.state = STATE_OFF;
radiostatus.idle_state = STATE_OFF;
}
int main(void)
{
trx_regval_t rval;
/* This will stop the application before initializing the radio transceiver
* (ISP issue with MISO pin, see FAQ)
*/
trap_if_key_pressed();
/* Step 0: init MCU peripherals */
LED_INIT();
trx_io_init(SPI_RATE_1_2);
LED_SET_VALUE(LED_MAX_VALUE);
LED_SET_VALUE(0);
/* Step 1: initialize the transceiver */
TRX_RESET_LOW();
TRX_SLPTR_LOW();
DELAY_US(TRX_RESET_TIME_US);
TRX_RESET_HIGH();
trx_reg_write(RG_TRX_STATE,CMD_TRX_OFF);
DELAY_US(TRX_INIT_TIME_US);
rval = trx_bit_read(SR_TRX_STATUS);
ERR_CHECK(TRX_OFF!=rval);
LED_SET_VALUE(1);
/* Step 2: setup transmitter
* - configure radio channel
* - go into RX state,
* - enable "receive end" IRQ
*/
trx_bit_write(SR_CHANNEL,CHANNEL);
trx_reg_write(RG_TRX_STATE,CMD_RX_ON);
#if defined(TRX_IRQ_TRX_END)
trx_reg_write(RG_IRQ_MASK,TRX_IRQ_TRX_END);
#elif defined(TRX_IRQ_RX_END)
trx_reg_write(RG_IRQ_MASK,TRX_IRQ_RX_END);
#else
# error "Unknown IRQ bits"
#endif
sei();
LED_SET_VALUE(2);
/* Step 3: Going to receive frames */
rxcnt = 0;
LED_SET_VALUE(0);
while(1);
}
void wibo_init(uint8_t channel, uint16_t pan_id, uint16_t short_addr, uint64_t ieee_addr)
{
#if defined(WIBO_FLAVOUR_KEYPRESS) || defined(WIBO_FLAVOUR_MAILBOX)
uint8_t run_bootloader = 0;
#endif
/* only stay in bootloader if key is pressed */
#if defined(WIBO_FLAVOUR_KEYPRESS)
#if defined(NO_KEYS)
#error "No Keys defined for WIBO_FLAVOUR_KEYPRESS"
#endif
KEY_INIT();
if(KEY_GET() != 0)
{
run_bootloader = 1;
}
#endif /* defined(WIBO_FLAVOUR_KEYPRESS) */
#if defined(WIBO_FLAVOUR_MAILBOX)
#if !defined(WIBO_FLAVOUR_MAILBOX_REGISTER) || !defined(WIBO_FLAVOUR_MAILBOX_CODE)
#error "WIBO_FLAVOUR_MAILBOX not defined correctly"
#endif
if(WIBO_FLAVOUR_MAILBOX_REGISTER == WIBO_FLAVOUR_MAILBOX_CODE)
{
run_bootloader = 1;
}
//WIBO_MAILBOX_CLR();
#endif /* defined(WIBO_FLAVOUR_MAILBOX) */
#if defined(WIBO_FLAVOUR_KEYPRESS) || defined(WIBO_FLAVOUR_MAILBOX)
if(run_bootloader == 0)
{
app();
}
#endif
#if !defined(NO_LEDS)
LED_INIT();
LED_SET(PROGLED);
#endif
nodeconfig.channel=channel;
nodeconfig.pan_id=pan_id;
nodeconfig.short_addr=short_addr;
nodeconfig.ieee_addr = ieee_addr;
trx_io_init(DEFAULT_SPI_RATE);
TRX_RESET_LOW();
TRX_SLPTR_LOW();
TRX_RESET_HIGH();
#if defined(DI_TRX_IRQ)
DI_TRX_IRQ();
#endif
trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
#if (RADIO_TYPE == RADIO_AT86RF230A) || (RADIO_TYPE == RADIO_AT86RF230B)
trx_reg_write(RG_PHY_TX_PWR, 0x80); /* set TX_AUTO_CRC bit, and TX_PWR = max */
#else
trx_reg_write(RG_TRX_CTRL_1, 0x20); /* set TX_AUTO_CRC bit */
#endif
/* setup network addresses for auto modes */
pingrep.hdr.pan = nodeconfig.pan_id;
pingrep.hdr.src = nodeconfig.short_addr;
trx_set_panid(nodeconfig.pan_id);
trx_set_shortaddr(nodeconfig.short_addr);
/* use register write to save code space, overwrites Bits CCA_REQUEST CCA_MODE[1] CCA_MODE[0]
* which is accepted
*/
trx_reg_write(RG_PHY_CC_CCA, nodeconfig.channel);
#if RADIO_TYPE == RADIO_AT86RF212
/* reset value, BPSK-40 */
/* trx_reg_write(RG_TRX_CTRL_2, 0x24); */
/* +5dBm acc. to datasheet AT86RF212 table 7-15 */
trx_reg_write(RG_PHY_TX_PWR, 0x84);
#endif /* RADIO_TYPE == RADIO_AT86RF212 */
trx_reg_write(RG_CSMA_SEED_0, nodeconfig.short_addr); /* some seeding */
trx_reg_write(RG_TRX_STATE, CMD_RX_AACK_ON);
trx_reg_write(RG_IRQ_STATUS, TRX_IRQ_RX_END); /* clear the flag */
#if defined(_DEBUG_SERIAL_)
void sendchar(char c);
static FILE usart_stdio = FDEV_SETUP_STREAM(sendchar, NULL, _FDEV_SETUP_WRITE);
stdout = stderr = &usart_stdio;
printf("WIBO Bootlapp Serial Debug"EOL);
printf("PANID=%04X SHORTADDR=%04X CHANNEL=%d"EOL,
nodeconfig.pan_id, nodeconfig.short_addr, nodeconfig.channel);
#endif
}
int main(void)
{
trx_regval_t rval;
/* This will stop the application before initializing the radio transceiver
* (ISP issue with MISO pin, see FAQ)
*/
trap_if_key_pressed();
/* Step 0: init MCU peripherals */
LED_INIT();
trx_io_init(SPI_RATE_1_2);
LED_SET_VALUE(LED_MAX_VALUE);
LED_SET_VALUE(0);
/* Step 1: initialize the transceiver */
TRX_RESET_LOW();
TRX_SLPTR_LOW();
DELAY_US(TRX_RESET_TIME_US);
TRX_RESET_HIGH();
trx_reg_write(RG_TRX_STATE,CMD_TRX_OFF);
DELAY_MS(TRX_INIT_TIME_US);
rval = trx_bit_read(SR_TRX_STATUS);
ERR_CHECK(TRX_OFF!=rval);
LED_SET_VALUE(1);
/* Step 2: setup transmitter
* - configure radio channel
* - enable transmitters automatic crc16 generation
* - go into RX AACK state,
* - configure address filter
* - enable "receive end" IRQ
*/
trx_bit_write(SR_CHANNEL,CHANNEL);
trx_bit_write(SR_TX_AUTO_CRC_ON,1);
trx_reg_write(RG_PAN_ID_0,(PANID&0xff));
trx_reg_write(RG_PAN_ID_1,(PANID>>8));
trx_reg_write(RG_SHORT_ADDR_0,(SHORT_ADDR&0xff));
trx_reg_write(RG_SHORT_ADDR_1,(SHORT_ADDR>>8));
trx_reg_write(RG_TRX_STATE,CMD_RX_AACK_ON);
#if defined(TRX_IRQ_TRX_END)
trx_reg_write(RG_IRQ_MASK,TRX_IRQ_TRX_END);
#elif defined(TRX_IRQ_RX_END)
trx_reg_write(RG_IRQ_MASK,TRX_IRQ_RX_END);
#else
# error "Unknown IRQ bits"
#endif
sei();
LED_SET_VALUE(2);
/* Step 3: send a frame each 500ms */
tx_cnt = 0;
tx_in_progress = false;
LED_SET_VALUE(0);
while(1);
}
