/****************************************************************************** * UART-0 Configuration VCP (Virtual Com Port) * ---------------------------------------------------------------------------- * UART 0 -> Port A -> Pins PA0(Tx) & PA1(Rx) * 9600-8N1 * ******************************************************************************/ void PSO_UART0Config() { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); /* Enable UART Module 0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); /* Enable GPIO Port A for UART-0 use */ GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); /* UART-0 interrupt configuration */ UARTDisable(UART0_BASE); UARTFIFOEnable(UART0_BASE); IntEnable(INT_UART0); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX7_8); UARTIntEnable(UART0_BASE, UART_INT_RX); // | UART_INT_RT UARTEnable(UART0_BASE); UARTFIFOEnable(UART0_BASE); }
void commUartInit ( void ) { /*********** UART 0 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART0 ); // // Set GPIO A0 and A1 as UART pins. // GPIOPinConfigure ( GPIO_PA0_U0RX ); GPIOPinConfigure ( GPIO_PA1_U0TX ); GPIOPinTypeUART ( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); UARTConfigSetExpClk ( UART0_BASE, SysCtlClockGet(), SPEED_UART_STD, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ) ); UARTFIFOEnable ( UART0_BASE ); UARTFIFOLevelSet ( UART0_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART0_BASE, UART_INT_RX | UART_INT_RT ); /*********** UART 1 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART1 ); // // Set GPIO D2 and D3 as UART pins. // GPIOPinConfigure ( GPIO_PD2_U1RX ); GPIOPinConfigure ( GPIO_PD3_U1TX ); GPIOPinTypeUART ( GPIO_PORTD_BASE, GPIO_PIN_2 | GPIO_PIN_3 ); UARTConfigSetExpClk ( UART1_BASE, SysCtlClockGet(), SPEED_UART_STD, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE) ); UARTFIFOEnable ( UART1_BASE ); UARTFIFOLevelSet ( UART1_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART1_BASE, UART_INT_RX | UART_INT_RT ); /*********** UART 2 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART2 ); // // Set GPIO G0 and G1 as UART pins. // GPIOPinConfigure ( GPIO_PG0_U2RX ); GPIOPinConfigure ( GPIO_PG1_U2TX ); GPIOPinTypeUART ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); UARTConfigSetExpClk ( UART2_BASE, SysCtlClockGet(), SPEED_UART_RS485, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ) ); UARTFIFOEnable ( UART2_BASE ); UARTFIFOLevelSet ( UART2_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART2_BASE, UART_INT_RX | UART_INT_RT ); }
void uartInitRs485(void) { unsigned long cfg = 0; SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART2 ); // // Set GPIO A0 and A1 as UART pins. // GPIOPinConfigure ( GPIO_PG0_U2RX ); GPIOPinConfigure ( GPIO_PG1_U2TX ); GPIOPinTypeUART ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); //GPIOPadConfigSet ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU ); cfg = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ; if (SysParam[SP_CHECKBIT] == 0x02) { cfg &= ~ UART_CONFIG_PAR_MASK; cfg |= UART_CONFIG_PAR_EVEN; } UARTConfigSetExpClk ( UART2_BASE, SysCtlClockGet(), BaudRateTable[SysParam[SP_BAUDRATE]], cfg); UARTFIFOEnable ( UART2_BASE ); UARTFIFOLevelSet ( UART2_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX1_8 ); UARTIntEnable ( UART2_BASE, UART_INT_RX | UART_INT_RT ); }
int main(void) { char cThisChar; SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL |SYSCTL_XTAL_16MHZ| SYSCTL_OSC_MAIN ); //Para el SW1 /*SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); GPIODirModeSet(GPIO_PORTF_BASE, 0xFF, GPIO_DIR_MODE_IN); GPIOPinIntEnable(GPIO_PORTB_BASE, 0xFF); IntEnable(INT_GPIOF);*/ SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); UARTIntClear(UART1_BASE, UART_INT_TX | UART_INT_RX); UARTIntEnable(UART1_BASE, UART_INT_RX); UARTFIFOEnable(UART1_BASE); IntMasterEnable(); UARTEnable(UART1_BASE); IntEnable(INT_UART1); for(n=0; n<sizeof(buferA); n++){ UARTCharPut(UART1_BASE, buferA[n]);} for(m=0; m<sizeof(buferC); m++){ UARTCharPut(UART1_BASE, buferC[m]);} while(1){;} }
void uartStart(void) { unsigned int intFlags = 0; unsigned int config = 0; /* Enabling the PSC for UART2.*/ /* roger, crash PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_UART2, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE); */ /* Setup PINMUX */ UARTPinMuxSetup(2, FALSE); /* Enabling the transmitter and receiver*/ UARTEnable(SOC_UART_2_REGS); /* 1 stopbit, 8-bit character, no parity */ config = UART_WORDL_8BITS; /* Configuring the UART parameters*/ UARTConfigSetExpClk(SOC_UART_2_REGS, SOC_UART_2_MODULE_FREQ, BAUD_115200, config, UART_OVER_SAMP_RATE_16); /* Enabling the FIFO and flushing the Tx and Rx FIFOs.*/ UARTFIFOEnable(SOC_UART_2_REGS); /* Setting the UART Receiver Trigger Level*/ UARTFIFOLevelSet(SOC_UART_2_REGS, UART_RX_TRIG_LEVEL_1); /* ** Enable AINTC to handle interrupts. Also enable IRQ interrupt in ARM ** processor. */ /* Do int from config, not by starterware SetupInt(); */ /* Configure AINTC to receive and handle UART interrupts. */ /* Do int from config, not by starterware ConfigureIntUART(); */ /* Preparing the 'intFlags' variable to be passed as an argument.*/ /* intFlags |= (UART_INT_LINE_STAT | \ UART_INT_TX_EMPTY | \ UART_INT_RXDATA_CTI); */ intFlags |= (UART_INT_LINE_STAT | \ UART_INT_RXDATA_CTI); /* Enable the Interrupts in UART.*/ UARTIntEnable(SOC_UART_2_REGS, intFlags); }
void SerialInit() { GPIOPinTypeUART (GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk (UART0_BASE, SysCtlClockGet(), 115200ul, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOEnable (UART0_BASE); UARTEnable (UART0_BASE); }
int main(void) { //FRESULT rc; SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_PLL |SYSCTL_XTAL_16MHZ| SYSCTL_OSC_MAIN ); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); //rc = f_mount(0, &Fatfs); //rc = f_open(&Fil, "HELLO.TXT", FA_WRITE | FA_CREATE_ALWAYS); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); //fijo los umbrales para la ocurrencia de la interrupcion //UARTTxIntModeSet(UART1_BASE, UART_TXINT_MODE_FIFO); // Habilito la interrupcion //IntRegister(UART1_BASE, UARTinterrupcion); //UARTIntRegister(UART1_BASE, UARTinterrupcion); //registra un manejador de interrupciones para la interrupcion de la UART UARTIntClear(UART1_BASE, UART_INT_TX | UART_INT_RX); //limpia los flags de interrupcion UARTIntEnable(UART1_BASE, UART_INT_RX); UARTFIFOEnable(UART1_BASE); IntMasterEnable(); UARTEnable(UART1_BASE); //habilita transmision y recepcion IntEnable(INT_UART1); //habilita las fuentes de interrupcion de la UART while(1){;} }
void UART_init(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOEnable(UART0_BASE); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8); UARTIntClear(UART0_BASE, 0xFFFFFFFF); IntEnable(INT_UART0); UARTIntEnable(UART0_BASE, UART_INT_RX); uart_transmit("AmpTraXX2!\n", 11); }
void InitUart0(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART0_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART0_BASE); IntEnable(INT_UART0); UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
void UART1IntInit(){ //configure Uart MAP_UARTConfigSetExpClk(UARTA1_BASE, MAP_PRCMPeripheralClockGet(PRCM_UARTA1), UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTEnable(UARTA1_BASE); // Disable FIFO so RX interrupt triggers on any character MAP_UARTFIFODisable(UARTA1_BASE); // Set interrupt handlers MAP_UARTIntRegister(UARTA1_BASE,receiveMessage); // Clear any interrupts that may have been present MAP_UARTIntClear(UARTA1_BASE, UART_INT_RX); // Enable interrupt MAP_UARTIntEnable(UARTA1_BASE, UART_INT_RX|UART_INT_RT); UARTFIFOEnable(UARTA1_BASE); }
void InitUart2(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA6_U2RX); GPIOPinConfigure(GPIO_PA7_U2TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_6 | GPIO_PIN_7); UARTFIFOLevelSet(UART2_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART2_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART2_BASE); IntEnable(INT_UART2); UARTIntEnable(UART2_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
void InitUart4(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA2_U4RX); GPIOPinConfigure(GPIO_PA3_U4TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3); UARTFIFOLevelSet(UART4_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART4_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART4_BASE); IntEnable(INT_UART4); UARTIntEnable(UART4_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
//********************************************************************** // Initialise UART0 - 8 bits, 1 stop bit, no parity //********************************************************************** initConsole (void) { // // Enable GPIO port A which is used for UART0 pins. // SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); // // Select the alternate (UART) function for these pins. // GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOEnable(UART0_BASE); UARTEnable(UART0_BASE); }
zcm_trans_t* __zcm_trans_tiva_uart_create(uint32_t uart_base, uint32_t sysctl_uart_base, uint32_t rx_port_base, uint32_t sysctl_rx_port_base, uint32_t pinmap_rx, uint32_t pinnum_rx, uint32_t tx_port_base, uint32_t sysctl_tx_port_base, uint32_t pinmap_tx, uint32_t pinnum_tx, uint32_t baud, uint64_t (*timestamp_now)(void*), void* usr) { SysCtlPeripheralEnable(sysctl_rx_port_base); SysCtlPeripheralEnable(sysctl_tx_port_base); SysCtlPeripheralEnable(sysctl_uart_base); GPIOPinConfigure(pinmap_rx); GPIOPinConfigure(pinmap_tx); GPIOPinTypeUART(rx_port_base, pinnum_rx); GPIOPinTypeUART(tx_port_base, pinnum_tx); GPIOPadConfigSet(rx_port_base, pinnum_rx, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); UARTConfigSetExpClk(uart_base, SysCtlClockGet(), uart_validate_baud(baud), (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOEnable(uart_base); UARTEnable(uart_base); while (UARTCharsAvail(uart_base)) UARTCharGetNonBlocking(uart_base); // This is sort of a gross hack to not have to allocate memory for the put and get usr pointer assert(sizeof(void*) >= sizeof(uint32_t)); return zcm_trans_generic_serial_create(uartGet, uartPut, (void*)uart_base, timestamp_now, usr, ZCM_GENERIC_SERIAL_MTU, ZCM_GENERIC_SERIAL_BUFFER_SIZE); }
void uartb_init(unsigned long speed){ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0|GPIO_PIN_1); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); SysCtlPeripheralDisable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(UART_BUFFERIZED_PERIF); // Initialize the UART. Set the baud rate, number of data bits, turn off // parity, number of stop bits, and stick mode. UARTConfigSetExpClk(UART_BUFFERIZED_BASE, SysCtlClockGet(), speed, UART_BUFFERIZED_FLAGS); // Enable the UART. UARTEnable(UART_BUFFERIZED_BASE); // Use hardware FIFO to reduce the amount of interruptions UARTFIFOEnable(UART_BUFFERIZED_BASE); // Set fifo limit for interruption triggering at 7/8 th of the fifo size UARTFIFOLevelSet(UART_BUFFERIZED_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); // Flush characters. Spin here until bus is empty // while(UARTCharGetNonBlocking(UART_BUFFERIZED_BASE)>=0); // Register UART interrupt UARTIntRegister(UART_BUFFERIZED_BASE,uartb_intHandler); // Enable UART interruptions IntEnable(INT_UART1); UARTIntDisable(UART_BUFFERIZED_BASE,UART_INT_TX); UARTIntEnable(UART_BUFFERIZED_BASE,UART_INT_RT|UART_INT_RX); // IntMasterEnable(); }
/** * \brief This function initializes the specified UART instance for use. * This does the following: * 1> Sets the baud rate of communication. \n * 2> Configures the line characteristics. Specifically, this: * a> sets the Word Length in each character frame as 8 bits. * b> selects No parity option. * c> selects one stop bit in each frame. * * 3> Enables the FIFO mode for transmitter and receiver. * 4> Sets the Receiver FIFO Trigger Level. * * \param baudRate The baud rate to be used for communication. * \param rxTrigLevel The receiver trigger level. This can take one of the * following four values: * 1> UART_RX_TRIG_LEVEL_1 * 2> UART_RX_TRIG_LEVEL_4 * 3> UART_RX_TRIG_LEVEL_8 * 4> UART_RX_TRIG_LEVEL_14 * * * \return None. */ static void UARTStdioInitExpClk(unsigned int baudRate, unsigned int rxTrigLevel) { /* Enables the transmitter and receiver*/ UARTEnable(UART_CONSOLE_BASE); /* Configuring the UART parameters*/ /* 8-bit work length, no parity, 1 stop bit. */ /* The UART module input frequency shall be 150MHz.*/ UARTConfigSetExpClk(UART_CONSOLE_BASE, SOC_UART_2_MODULE_FREQ, baudRate, UART_WORDL_8BITS, UART_OVER_SAMP_RATE_16); /* Enables FIFO mode for transmitter and receiver.*/ UARTFIFOEnable(UART_CONSOLE_BASE); /* Sets the receiver FIFO Trigger level.*/ UARTFIFOLevelSet(UART_CONSOLE_BASE, rxTrigLevel); }
void SAPIUARTInit(int channel) { UARTFIFOEnable(uart_ports[channel]); UARTFIFOLevelSet(uart_ports[channel], UART_FIFO_TX4_8, UART_FIFO_RX1_8); UARTIntEnable(uart_ports[channel], UART_INT_RT|UART_INT_RX|UART_INT_OE); }
/************************************************************************************************* * @fn HalUARTOpenIsr() * * @brief Open a port based on the configuration * * @param port - UART port * config - contains configuration information * cBack - Call back function where events will be reported back * * @return Status of the function call *************************************************************************************************/ uint8 HalUARTOpenIsr(uint8 port, halUARTCfg_t *config) { if (uartRecord.configured) { HalUARTClose(port); } if (config->baudRate > HAL_UART_BR_115200) { return HAL_UART_BAUDRATE_ERROR; } if (((uartRecord.rx.pBuffer = osal_mem_alloc(config->rx.maxBufSize)) == NULL) || ((uartRecord.tx.pBuffer = osal_mem_alloc(config->tx.maxBufSize)) == NULL)) { if (uartRecord.rx.pBuffer != NULL) { osal_mem_free(uartRecord.rx.pBuffer); uartRecord.rx.pBuffer = NULL; } return HAL_UART_MEM_FAIL; } if(config->flowControl) { IOCPinConfigPeriphOutput(GPIO_D_BASE, GPIO_PIN_3, IOC_MUX_OUT_SEL_UART1_RTS); GPIOPinTypeUARTOutput(GPIO_D_BASE, GPIO_PIN_3); IOCPinConfigPeriphInput(GPIO_B_BASE, GPIO_PIN_0, IOC_UARTCTS_UART1); GPIOPinTypeUARTInput(GPIO_B_BASE, GPIO_PIN_0); } IntEnable(HAL_UART_INT_CTRL); uartRecord.configured = TRUE; uartRecord.baudRate = config->baudRate; uartRecord.flowControl = config->flowControl; uartRecord.flowControlThreshold = (config->flowControlThreshold > config->rx.maxBufSize) ? 0 : config->flowControlThreshold; uartRecord.idleTimeout = config->idleTimeout; uartRecord.rx.maxBufSize = config->rx.maxBufSize; uartRecord.tx.maxBufSize = config->tx.maxBufSize; uartRecord.intEnable = config->intEnable; uartRecord.callBackFunc = config->callBackFunc; UARTConfigSetExpClk(HAL_UART_PORT, SysCtrlClockGet(), UBRRTable[uartRecord.baudRate], (UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE)); /* FIFO level set to 1/8th for both RX and TX which is 2 bytes */ UARTFIFOLevelSet(HAL_UART_PORT, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTFIFOEnable(HAL_UART_PORT); /* Clear and enable UART TX, RX, CTS and Recieve Timeout interrupt */ UARTIntClear(HAL_UART_PORT, (UART_INT_RX | UART_INT_TX | UART_INT_CTS | UART_INT_RT )); UARTIntEnable(HAL_UART_PORT, (UART_INT_RX | UART_INT_TX | UART_INT_CTS | UART_INT_RT )); if(config->flowControl) { /* Enable hardware flow control by enabling CTS and RTS */ HWREG(HAL_UART_PORT + UART_O_CTL) |= (UART_CTL_CTSEN | UART_CTL_RTSEN ); } UARTEnable(HAL_UART_PORT); return HAL_UART_SUCCESS; }