/* * See the serial2.h header file. */ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) { xComPortHandle xReturn; /* Create the queues used to hold Rx and Tx characters. */ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) ); xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) ); /* If the queues were created correctly then setup the serial port hardware. */ if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) ) { portENTER_CRITICAL(); { /* Setup the UART port pins. */ GPIO_Config( GPIO0, UART0_Tx_Pin, GPIO_AF_PP ); GPIO_Config( GPIO0, UART0_Rx_Pin, GPIO_IN_TRI_CMOS ); /* Configure the UART. */ UART_OnOffConfig( UART0, ENABLE ); UART_FifoConfig( UART0, DISABLE ); UART_FifoReset( UART0, UART_RxFIFO ); UART_FifoReset( UART0, UART_TxFIFO ); UART_LoopBackConfig(UART0, DISABLE ); UART_Config( UART0, ulWantedBaud, UART_NO_PARITY, UART_1_StopBits, UARTM_8D ); UART_RxConfig( UART0, ENABLE ); /* Configure the IEC for the UART interrupts. */ EIC_IRQChannelPriorityConfig( UART0_IRQChannel, 1 ); EIC_IRQChannelConfig( UART0_IRQChannel, ENABLE ); EIC_IRQConfig( ENABLE ); UART_ItConfig( UART0, UART_RxBufFull, ENABLE ); } portEXIT_CRITICAL(); } else { xReturn = ( xComPortHandle ) 0; } /* This demo file only supports a single port but we have to return something to comply with the standard demo header file. */ return xReturn; }
/* * See the serial2.h header file. */ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) { xComPortHandle xReturn; UART_InitTypeDef xUART1_Init; GPIO_InitTypeDef GPIO_InitStructure; /* Create the queues used to hold Rx characters. */ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) ); /* Create the semaphore used to wake a task waiting for space to become available in the FIFO. */ vSemaphoreCreateBinary( xTxFIFOSemaphore ); /* If the queue/semaphore was created correctly then setup the serial port hardware. */ if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) ) { /* Pre take the semaphore so a task will block if it tries to access it. */ xSemaphoreTake( xTxFIFOSemaphore, 0 ); /* Configure the UART. */ xUART1_Init.UART_WordLength = UART_WordLength_8D; xUART1_Init.UART_StopBits = UART_StopBits_1; xUART1_Init.UART_Parity = UART_Parity_No; xUART1_Init.UART_BaudRate = ulWantedBaud; xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None; xUART1_Init.UART_Mode = UART_Mode_Tx_Rx; xUART1_Init.UART_FIFO = UART_FIFO_Enable; /* Enable the UART1 Clock */ SCU_APBPeriphClockConfig( __UART1, ENABLE ); /* Enable the GPIO3 Clock */ SCU_APBPeriphClockConfig( __GPIO3, ENABLE ); /* Configure UART1_Rx pin GPIO3.2 */ GPIO_InitStructure.GPIO_Direction = GPIO_PinInput; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ; GPIO_Init( GPIO3, &GPIO_InitStructure ); /* Configure UART1_Tx pin GPIO3.3 */ GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ; GPIO_Init( GPIO3, &GPIO_InitStructure ); portENTER_CRITICAL(); { /* Configure the UART itself. */ UART_DeInit( UART1 ); UART_Init( UART1, &xUART1_Init ); UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE ); UART1->ICR = serCLEAR_ALL_INTERRUPTS; UART_LoopBackConfig( UART1, DISABLE ); UART_IrDACmd( IrDA1, DISABLE ); /* Configure the VIC for the UART interrupts. */ VIC_Config( UART1_ITLine, VIC_IRQ, 9 ); VIC_ITCmd( UART1_ITLine, ENABLE ); UART_Cmd( UART1, ENABLE ); lTaskWaiting = pdFALSE; } portEXIT_CRITICAL(); } else { xReturn = ( xComPortHandle ) 0; } /* This demo file only supports a single port but we have to return something to comply with the standard demo header file. */ return xReturn; }
BOOL xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity ) { BOOL xResult = TRUE; UARTParity_TypeDef eUARTParity; UARTMode_TypeDef eUARTMode; (void)ucPort; switch ( eParity ) { case MB_PAR_EVEN: eUARTParity = UART_EVEN_PARITY; break; case MB_PAR_ODD: eUARTParity = UART_ODD_PARITY; break; case MB_PAR_NONE: eUARTParity = UART_NO_PARITY; break; } switch ( ucDataBits ) { case 7: if( eParity == MB_PAR_NONE ) { /* not supported by our hardware. */ xResult = FALSE; } else { eUARTMode = UARTM_7D_P; } break; case 8: if( eParity == MB_PAR_NONE ) { eUARTMode = UARTM_8D; } else { eUARTMode = UARTM_8D_P; } break; default: xResult = FALSE; } if( xResult != FALSE ) { /* Setup the UART port pins. */ GPIO_Config( MB_UART_TX_PORT, 1 << MB_UART_TX_PIN, GPIO_AF_PP ); GPIO_Config( MB_UART_RX_PORT, 1 << MB_UART_RX_PIN, GPIO_IN_TRI_CMOS ); /* Configure the UART. */ UART_OnOffConfig( MB_UART_DEV, ENABLE ); UART_FifoConfig( MB_UART_DEV, DISABLE ); UART_FifoReset( MB_UART_DEV, UART_RxFIFO ); UART_FifoReset( MB_UART_DEV, UART_TxFIFO ); UART_LoopBackConfig( MB_UART_DEV, DISABLE ); UART_Config( MB_UART_DEV, ulBaudRate, eUARTParity, UART_1_StopBits, eUARTMode ); UART_RxConfig( UART0, ENABLE ); vMBPortSerialEnable( FALSE, FALSE ); /* Configure the IEC for the UART interrupts. */ EIC_IRQChannelPriorityConfig( MB_UART_IRQ_CH, MB_IRQ_PRIORITY ); EIC_IRQChannelConfig( MB_UART_IRQ_CH, ENABLE ); } return xResult; }
sio_fd_t sio_open_new( u8_t devnr, u32_t baudrate, u8_t databits, sio_stop_t stopbits, sio_parity_t parity ) { int i; err_t error = ERR_OK; serdev_t *dev; UARTParity_TypeDef eUARTParity = UART_NO_PARITY; UARTMode_TypeDef eUARTMode = UARTM_8D; UARTStopBits_TypeDef eUARTStopBits; if( !initialized ) { for( i = 0; i < UART_DEVICES_MAX; i++ ) { SIO_RESET_STATE( &devices[i] ); } initialized = 1; } /* Check if devicename is valid and not in use. */ if( ( devnr < UART_DEVICES_MAX ) && ( devices[devnr].ready == 0 ) ) { dev = ( serdev_t * ) & devices[devnr]; switch ( parity ) { case SIO_PAR_EVEN: eUARTParity = UART_EVEN_PARITY; break; case SIO_PAR_ODD: eUARTParity = UART_ODD_PARITY; break; case SIO_PAR_NONE: eUARTParity = UART_NO_PARITY; break; default: error = ERR_VAL; } switch ( databits ) { case 7: if( parity != SIO_PAR_NONE ) { eUARTMode = UARTM_7D_P; } break; case 8: eUARTMode = parity == SIO_PAR_NONE ? UARTM_8D : UARTM_8D_P; break; default: error = ERR_VAL; } switch ( stopbits ) { case SIO_STOP_0_5: eUARTStopBits = UART_0_5_StopBits; break; case SIO_STOP_1: eUARTStopBits = UART_1_StopBits; break; case SIO_STOP_1_5: eUARTStopBits = UART_1_5_StopBits; break; case SIO_STOP_2: eUARTStopBits = UART_2_StopBits; break; default: error = ERR_VAL; } if( error == ERR_OK ) { SIO_RESET_STATE( dev ); vSemaphoreCreateBinary( dev->rx_sem ); vSemaphoreCreateBinary( dev->tx_sem ); vPortEnterCritical( ); if( ( error = sio_open_low_level( devnr, dev ) ) != ERR_OK ) { /* Hardware interface does not exist. */ } else if( dev->tx_sem == ( xSemaphoreHandle ) 0 ) { error = ERR_MEM; } else if( dev->rx_sem == ( xSemaphoreHandle ) 0 ) { error = ERR_MEM; } else { /* UART parameter correct and hardware device available. */ UART_OnOffConfig( dev->UARTx, ENABLE ); UART_FifoConfig( dev->UARTx, ENABLE ); UART_FifoReset( dev->UARTx, UART_RxFIFO ); UART_FifoReset( dev->UARTx, UART_TxFIFO ); UART_LoopBackConfig( dev->UARTx, DISABLE ); UART_Config( dev->UARTx, baudrate, eUARTParity, eUARTStopBits, eUARTMode ); UART_TimeOutPeriodConfig( dev->UARTx, 0xFF ); UART_ItConfig( dev->UARTx, UART_RxBufFull, ENABLE ); UART_RxConfig( dev->UARTx, ENABLE ); /* Device is now ready for use. */ dev->ready = 1; } if( error != ERR_OK ) { sio_close( dev ); } vPortExitCritical( ); } } else { error = ERR_VAL; } return error == ERR_OK ? ( void * )dev : SIO_FD_NULL; }