/* UniN device */ static void unin_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value); if (addr == 0x0) { *(int*)opaque = value; } }
static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size) { uint32_t value; value = 0; UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); return value; }
static void pci_unin_main_config_writel (void *opaque, target_phys_addr_t addr, uint32_t val) { UNINState *s = opaque; UNIN_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr, val); #ifdef TARGET_WORDS_BIGENDIAN val = bswap32(val); #endif s->config_reg = val; }
static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size) { uint32_t value; value = 0; switch (addr) { case 0: value = *(int*)opaque; } UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); return value; }
static uint32_t pci_unin_main_config_readl (void *opaque, target_phys_addr_t addr) { UNINState *s = opaque; uint32_t val; val = s->config_reg; #ifdef TARGET_WORDS_BIGENDIAN val = bswap32(val); #endif UNIN_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr, val); return val; }
/* UniN device */ static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value); }
/* UniN device */ static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value); }