static inline void etna_emit_load_state(struct etna_cmd_stream *stream, const uint16_t offset, const uint16_t count) { uint32_t v; v = (VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE | VIV_FE_LOAD_STATE_HEADER_OFFSET(offset) | (VIV_FE_LOAD_STATE_HEADER_COUNT(count) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK)); etna_cmd_stream_emit(stream, v); }
static void etna_coalesce_end(struct etna_cmd_stream *stream, struct etna_coalesce *coalesce) { uint32_t end = etna_cmd_stream_offset(stream); uint32_t size = end - coalesce->start; if (size) { uint32_t offset = coalesce->start - 1; uint32_t value = etna_cmd_stream_get(stream, offset); value |= VIV_FE_LOAD_STATE_HEADER_COUNT(size); etna_cmd_stream_set(stream, offset, value); } /* append needed padding */ if (end % 2 == 1) etna_cmd_stream_emit(stream, 0xdeadbeef); }
BUG_ON(buffer->user_size >= buffer->size); vaddr[buffer->user_size / 4] = data; buffer->user_size += 4; } static inline void CMD_LOAD_STATE(struct etnaviv_cmdbuf *buffer, u32 reg, u32 value) { u32 index = reg >> VIV_FE_LOAD_STATE_HEADER_OFFSET__SHR; buffer->user_size = ALIGN(buffer->user_size, 8); /* write a register via cmd stream */ OUT(buffer, VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE | VIV_FE_LOAD_STATE_HEADER_COUNT(1) | VIV_FE_LOAD_STATE_HEADER_OFFSET(index)); OUT(buffer, value); } static inline void CMD_END(struct etnaviv_cmdbuf *buffer) { buffer->user_size = ALIGN(buffer->user_size, 8); OUT(buffer, VIV_FE_END_HEADER_OP_END); } static inline void CMD_WAIT(struct etnaviv_cmdbuf *buffer) { buffer->user_size = ALIGN(buffer->user_size, 8);