int VSYNCOSD_WR_MPEG_REG_BITS(unsigned long addr, unsigned long val, unsigned long start, unsigned long len)
{
unsigned long read_val;
unsigned long write_val;
if(rdma_enable){
read_val=VSYNCOSD_RD_MPEG_REG(addr);
write_val = (read_val & ~(((1L<<(len))-1)<<(start)))|((unsigned int)(val) << (start));
update_table_item(addr,write_val);
}else{
Wr_reg_bits(addr,val,start,len);
}
return 0;
}
int VSYNCOSD_CLR_MPEG_REG_MASK(unsigned long addr, unsigned long _mask)
{
unsigned long read_val;
unsigned long write_val;
if(rdma_enable){
read_val=VSYNCOSD_RD_MPEG_REG(addr);
write_val = read_val&(~_mask) ;
update_table_item(addr,write_val);
}else{
Wr_clr_reg_bits_mask(addr,_mask);
}
return 0;
}
static int init_fb1_first(const struct vinfo_s *vinfo)
{
struct osd_ctl_s osd_ctl;
const struct color_bit_define_s *color;
u32 reg = 0, data32 = 0;
osd_ctl.index = 1;
color = &default_color_format_array[31];
osd_ctl.addr = get_fb_rmem_paddr(osd_ctl.index);
osd_ctl.xres = vinfo->width;
osd_ctl.yres = vinfo->height;
osd_ctl.xres_virtual = osd_ctl.xres;
osd_ctl.yres_virtual = osd_ctl.yres;
osd_ctl.disp_start_x = 0;
osd_ctl.disp_end_x = osd_ctl.xres - 1;
osd_ctl.disp_start_y = 0;
osd_ctl.disp_end_y = osd_ctl.yres - 1;
reg = osd_ctl.index == 0 ? VIU_OSD1_BLK0_CFG_W0 : VIU_OSD2_BLK0_CFG_W0;
data32 = VSYNCOSD_RD_MPEG_REG(reg) & (~(0xf<<8));
data32 |= color->hw_blkmode << 8; /* osd_blk_mode */
VSYNCOSD_WR_MPEG_REG(reg, data32);
pr_debug("addr is 0x%08x, xres is %d, yres is %d\n",
osd_ctl.addr, osd_ctl.xres, osd_ctl.yres);
osd_setup_hw(osd_ctl.index,
&osd_ctl,
0,
0,
osd_ctl.xres,
osd_ctl.yres,
osd_ctl.xres_virtual,
osd_ctl.yres_virtual,
osd_ctl.disp_start_x,
osd_ctl.disp_start_y,
osd_ctl.disp_end_x,
osd_ctl.disp_end_y,
osd_ctl.addr,
color);
return 0;
}
