SC_LibForEachWireLoadSel( p, pWLS, i ) { Vec_StrPutS( vOut, pWLS->pName ); Vec_StrPutI( vOut, Vec_FltSize(pWLS->vAreaFrom) ); for ( j = 0; j < Vec_FltSize(pWLS->vAreaFrom); j++) { Vec_StrPutF( vOut, Vec_FltEntry(pWLS->vAreaFrom, j) ); Vec_StrPutF( vOut, Vec_FltEntry(pWLS->vAreaTo, j) ); Vec_StrPutS( vOut, (char *)Vec_PtrEntry(pWLS->vWireLoadModel, j) ); } }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [Returns the wireload model for the given area.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ SC_WireLoad * Abc_SclFindWireLoadModel( SC_Lib * p, float Area ) { SC_WireLoad * pWL = NULL; char * pWLoadUsed = NULL; int i; if ( p->default_wire_load_sel && strlen(p->default_wire_load_sel) ) { SC_WireLoadSel * pWLS = NULL; SC_LibForEachWireLoadSel( p, pWLS, i ) if ( !strcmp(pWLS->pName, p->default_wire_load_sel) ) break; if ( i == Vec_PtrSize(p->vWireLoadSels) ) { Abc_Print( -1, "Cannot find wire load selection model \"%s\".\n", p->default_wire_load_sel ); exit(1); } for ( i = 0; i < Vec_FltSize(pWLS->vAreaFrom); i++) if ( Area >= Vec_FltEntry(pWLS->vAreaFrom, i) && Area < Vec_FltEntry(pWLS->vAreaTo, i) ) { pWLoadUsed = (char *)Vec_PtrEntry(pWLS->vWireLoadModel, i); break; } if ( i == Vec_FltSize(pWLS->vAreaFrom) ) pWLoadUsed = (char *)Vec_PtrEntryLast(pWLS->vWireLoadModel); }
static void Abc_SclWriteLibrary( Vec_Str_t * vOut, SC_Lib * p ) { SC_WireLoad * pWL; SC_WireLoadSel * pWLS; SC_Cell * pCell; SC_Pin * pPin; int n_valid_cells; int i, j, k; Vec_StrPutI( vOut, ABC_SCL_CUR_VERSION ); // Write non-composite fields: Vec_StrPutS( vOut, p->pName ); Vec_StrPutS( vOut, p->default_wire_load ); Vec_StrPutS( vOut, p->default_wire_load_sel ); Vec_StrPutF( vOut, p->default_max_out_slew ); assert( p->unit_time >= 0 ); assert( p->unit_cap_snd >= 0 ); Vec_StrPutI( vOut, p->unit_time ); Vec_StrPutF( vOut, p->unit_cap_fst ); Vec_StrPutI( vOut, p->unit_cap_snd ); // Write 'wire_load' vector: Vec_StrPutI( vOut, Vec_PtrSize(p->vWireLoads) ); SC_LibForEachWireLoad( p, pWL, i ) { Vec_StrPutS( vOut, pWL->pName ); Vec_StrPutF( vOut, pWL->res ); Vec_StrPutF( vOut, pWL->cap ); Vec_StrPutI( vOut, Vec_IntSize(pWL->vFanout) ); for ( j = 0; j < Vec_IntSize(pWL->vFanout); j++ ) { Vec_StrPutI( vOut, Vec_IntEntry(pWL->vFanout, j) ); Vec_StrPutF( vOut, Vec_FltEntry(pWL->vLen, j) ); } }
static inline float Kf_ObjRefs( Kf_Man_t * p, int i ) { return Vec_FltEntry(&p->vRefs, i); }
static inline float Kf_ObjArea( Kf_Man_t * p, int i ) { return Vec_FltEntry(&p->vArea, i); }
static inline float Bus_SclObjDept( Abc_Obj_t * p ) { return Vec_FltEntry( Bus_SclObjMan(p)->vDepts, Abc_ObjId(p) ); }
static inline float Bus_SclObjLoad( Abc_Obj_t * p ) { return Vec_FltEntry( Bus_SclObjMan(p)->vLoads, Abc_ObjId(p) ); }
static inline float Bus_SclObjETime( Abc_Obj_t * p ) { return Vec_FltEntry( Bus_SclObjMan(p)->vETimes, Abc_ObjId(p) ); }
static inline float Bus_SclObjCin( Abc_Obj_t * p ) { return Vec_FltEntry( Bus_SclObjMan(p)->vCins, Abc_ObjId(p) ); }