// outputs
If_ManForEachCo( pIfMan, pIfObj, i )
{
int iLit0 = Abc_LitNotCond( Vec_IntEntry(vCopy, If_ObjFanin0(pIfObj)->Id), If_ObjFaninC0(pIfObj) );
Vec_IntPush( vCopy, Gia_ManAppendCo(pNew, iLit0) );
}
static inline int Sfm_ObjIsTravIdPrevious( Sfm_Ntk_t * p, int Id ) { return (Vec_IntEntry(&p->vTravIds, Id) == p->nTravIds-1); }
static inline int Sfm_ObjIsTravIdCurrent2( Sfm_Ntk_t * p, int Id ) { return (Vec_IntEntry(&p->vTravIds2, Id) == p->nTravIds2); }
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Gia_Iso3ComputeEdge( Gia_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pFanin, int fCompl, Vec_Int_t * vSign )
{
pObj->Value += Vec_IntEntry(vSign, Gia_ObjId(p, pFanin)) + Iso_Compl[fCompl] + Iso_Fanio[0];
pFanin->Value += Vec_IntEntry(vSign, Gia_ObjId(p, pObj)) + Iso_Compl[fCompl] + Iso_Fanio[1];
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
/*
Vec_Int_t * Gia_WriteDotAigMarks( Gia_Man_t * p, Vec_Int_t * vFadds, Vec_Int_t * vHadds )
{
int i;
Vec_Int_t * vMarks = Vec_IntStart( Gia_ManObjNum(p) );
for ( i = 0; i < Vec_IntSize(vHadds)/2; i++ )
{
Vec_IntWriteEntry( vMarks, Vec_IntEntry(vHadds, 2*i+0), Abc_Var2Lit(i+1, 0) );
Vec_IntWriteEntry( vMarks, Vec_IntEntry(vHadds, 2*i+1), Abc_Var2Lit(i+1, 0) );
}
for ( i = 0; i < Vec_IntSize(vFadds)/5; i++ )
{
Vec_IntWriteEntry( vMarks, Vec_IntEntry(vFadds, 5*i+3), Abc_Var2Lit(i+1, 1) );
Vec_IntWriteEntry( vMarks, Vec_IntEntry(vFadds, 5*i+4), Abc_Var2Lit(i+1, 1) );
}
return vMarks;
}
int Gia_WriteDotAigLevel_rec( Gia_Man_t * p, Vec_Int_t * vMarks, Vec_Int_t * vFadds, Vec_Int_t * vHadds, int Id, Vec_Int_t * vLevel )
{
int Level = Vec_IntEntry(vLevel, Id), Mark = Vec_IntEntry(vMarks, Id);
if ( Level || Mark == -1 )
return Level;
if ( Mark == 0 )
{
Gia_Obj_t * pObj = Gia_ManObj( p, Id );
int Level0 = Gia_WriteDotAigLevel_rec( p, vMarks, vFadds, vHadds, Gia_ObjFaninId0(pObj, Id), vLevel );
int Level1 = Gia_WriteDotAigLevel_rec( p, vMarks, vFadds, vHadds, Gia_ObjFaninId1(pObj, Id), vLevel );
Level = Abc_MaxInt(Level0, Level1) + 1;
Vec_IntWriteEntry( vLevel, Id, Level );
Vec_IntWriteEntry( vMarks, Id, -1 );
}
else if ( Abc_LitIsCompl(Mark) ) // FA
{
int i, * pFanins = Vec_IntEntryP( vFadds, 5*(Abc_Lit2Var(Mark)-1) );
assert( pFanins[3] == Id || pFanins[4] == Id );
for ( i = 0; i < 3; i++ )
Level = Abc_MaxInt( Level, Gia_WriteDotAigLevel_rec( p, vMarks, vFadds, vHadds, pFanins[i], vLevel ) );
Vec_IntWriteEntry( vLevel, pFanins[3], Level+1 );
Vec_IntWriteEntry( vLevel, pFanins[4], Level+1 );
}
else // HA
{
int * pFanins = Vec_IntEntryP( vHadds, 2*(Abc_Lit2Var(Mark)-1) );
Gia_Obj_t * pObj = Gia_ManObj( p, pFanins[1] );
int Level0 = Gia_WriteDotAigLevel_rec( p, vMarks, vFadds, vHadds, Gia_ObjFaninId0(pObj, Id), vLevel );
int Level1 = Gia_WriteDotAigLevel_rec( p, vMarks, vFadds, vHadds, Gia_ObjFaninId1(pObj, Id), vLevel );
assert( pFanins[0] == Id || pFanins[1] == Id );
Level = Abc_MaxInt(Level0, Level1) + 1;
Vec_IntWriteEntry( vLevel, pFanins[0], Level );
Vec_IntWriteEntry( vLevel, pFanins[1], Level );
}
return Level;
}
int Gia_WriteDotAigLevel( Gia_Man_t * p, Vec_Int_t * vFadds, Vec_Int_t * vHadds, Vec_Int_t ** pvMarks, Vec_Int_t ** pvLevel )
{
Vec_Int_t * vMarks = Gia_WriteDotAigMarks( p, vFadds, vHadds );
Vec_Int_t * vLevel = Vec_IntStart( Gia_ManObjNum(p) );
int i, Id, Level = 0;
Vec_IntWriteEntry( vMarks, 0, -1 );
Gia_ManForEachCiId( p, Id, i )
Vec_IntWriteEntry( vMarks, Id, -1 );
Gia_ManForEachCoDriverId( p, Id, i )
Level = Abc_MaxInt( Level, Gia_WriteDotAigLevel_rec(p, vMarks, vFadds, vHadds, Id, vLevel) );
Gia_ManForEachCoId( p, Id, i )
Vec_IntWriteEntry( vMarks, Id, -1 );
*pvMarks = vMarks;
*pvLevel = vLevel;
return Level;
}
*/
int Gia_WriteDotAigLevel( Gia_Man_t * p, Vec_Int_t * vFadds, Vec_Int_t * vHadds, Vec_Int_t * vRecord, Vec_Int_t ** pvLevel, Vec_Int_t ** pvMarks, Vec_Int_t ** pvRemap )
{
Vec_Int_t * vLevel = Vec_IntStart( Gia_ManObjNum(p) );
Vec_Int_t * vMarks = Vec_IntStart( Gia_ManObjNum(p) );
Vec_Int_t * vRemap = Vec_IntStartNatural( Gia_ManObjNum(p) );
int i, k, Id, Entry, LevelMax = 0;
Vec_IntWriteEntry( vMarks, 0, -1 );
Gia_ManForEachCiId( p, Id, i )
Vec_IntWriteEntry( vMarks, Id, -1 );
Gia_ManForEachCoId( p, Id, i )
Vec_IntWriteEntry( vMarks, Id, -1 );
Vec_IntForEachEntry( vRecord, Entry, i )
{
int Level = 0;
int Node = Abc_Lit2Var2(Entry);
int Attr = Abc_Lit2Att2(Entry);
if ( Attr == 2 )
{
int * pFanins = Vec_IntEntryP( vFadds, 5*Node );
for ( k = 0; k < 3; k++ )
Level = Abc_MaxInt( Level, Vec_IntEntry(vLevel, pFanins[k]) );
Vec_IntWriteEntry( vLevel, pFanins[3], Level+1 );
Vec_IntWriteEntry( vLevel, pFanins[4], Level+1 );
Vec_IntWriteEntry( vMarks, pFanins[4], Entry );
Vec_IntWriteEntry( vRemap, pFanins[3], pFanins[4] );
//printf( "Making FA output %d.\n", pFanins[4] );
}
else if ( Attr == 1 )
{
int * pFanins = Vec_IntEntryP( vHadds, 2*Node );
Gia_Obj_t * pObj = Gia_ManObj( p, pFanins[1] );
int pFaninsIn[2] = { Gia_ObjFaninId0(pObj, pFanins[1]), Gia_ObjFaninId1(pObj, pFanins[1]) };
for ( k = 0; k < 2; k++ )
Level = Abc_MaxInt( Level, Vec_IntEntry(vLevel, pFaninsIn[k]) );
Vec_IntWriteEntry( vLevel, pFanins[0], Level+1 );
Vec_IntWriteEntry( vLevel, pFanins[1], Level+1 );
Vec_IntWriteEntry( vMarks, pFanins[1], Entry );
Vec_IntWriteEntry( vRemap, pFanins[0], pFanins[1] );
//printf( "Making HA output %d.\n", pFanins[1] );
}
else // if ( Attr == 3 || Attr == 0 )
{
Gia_Obj_t * pObj = Gia_ManObj( p, Node );
int pFaninsIn[2] = { Gia_ObjFaninId0(pObj, Node), Gia_ObjFaninId1(pObj, Node) };
for ( k = 0; k < 2; k++ )
Level = Abc_MaxInt( Level, Vec_IntEntry(vLevel, pFaninsIn[k]) );
Vec_IntWriteEntry( vLevel, Node, Level+1 );
Vec_IntWriteEntry( vMarks, Node, -1 );
//printf( "Making node %d.\n", Node );
}
LevelMax = Abc_MaxInt( LevelMax, Level+1 );
}
Vec_IntForEachEntry( vSigs, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) != -1 );
Vec_IntWriteEntry( vSigs, i++, Vec_IntEntry(vMap, NameId) );
}
static inline int Saig_ManGetMap1( Aig_Man_t * p, Aig_Obj_t * pOld, int f1 )
{
Vec_Int_t * vMap = (Vec_Int_t *)p->pData;
int nOffset = f1 * Aig_ManObjNumMax(p) + pOld->Id;
return Vec_IntEntry( vMap, nOffset );
}
static inline int Tas_VarDecLevel( Tas_Man_t * p, Tas_Var_t * pVar ) { assert( pVar->Value != ~0 ); return Vec_IntEntry(p->vLevReas, 3*pVar->Value); }
static inline Tas_Var_t * Tas_VarReason1( Tas_Man_t * p, Tas_Var_t * pVar ) { assert( pVar->Value != ~0 ); return pVar + Vec_IntEntry(p->vLevReas, 3*pVar->Value+2); }
/**Function*************************************************************
Synopsis [Performs induction by unrolling timeframes backward.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique, int fUniqueAll, int fGetCex, int fVerbose, int fVeryVerbose )
{
sat_solver * pSat;
Aig_Man_t * pAigPart;
Cnf_Dat_t * pCnfPart;
Vec_Int_t * vTopVarNums, * vState, * vTopVarIds = NULL;
Vec_Ptr_t * vTop, * vBot;
Aig_Obj_t * pObjPi, * pObjPiCopy, * pObjPo;
int i, k, f, Lits[2], status = -1, RetValue, nSatVarNum, nConfPrev;
int nOldSize, iReg, iLast, fAdded, nConstrs = 0, nClauses = 0;
abctime clk;
assert( fUnique == 0 || fUniqueAll == 0 );
assert( Saig_ManPoNum(p) == 1 );
Aig_ManSetCioIds( p );
// start the top by including the PO
vBot = Vec_PtrAlloc( 100 );
vTop = Vec_PtrAlloc( 100 );
vState = Vec_IntAlloc( 1000 );
Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
// start the array of CNF variables
vTopVarNums = Vec_IntAlloc( 100 );
// start the solver
pSat = sat_solver_new();
sat_solver_setnvars( pSat, 1000 );
// iterate backward unrolling
RetValue = -1;
nSatVarNum = 0;
if ( fVerbose )
printf( "Induction parameters: FramesMax = %5d. ConflictMax = %6d.\n", nFramesMax, nConfMax );
for ( f = 0; ; f++ )
{
if ( f > 0 )
{
Aig_ManStop( pAigPart );
Cnf_DataFree( pCnfPart );
}
clk = Abc_Clock();
// get the bottom
Aig_SupportNodes( p, (Aig_Obj_t **)Vec_PtrArray(vTop), Vec_PtrSize(vTop), vBot );
// derive AIG for the part between top and bottom
pAigPart = Aig_ManDupSimpleDfsPart( p, vBot, vTop );
// convert it into CNF
pCnfPart = Cnf_Derive( pAigPart, Aig_ManCoNum(pAigPart) );
Cnf_DataLift( pCnfPart, nSatVarNum );
nSatVarNum += pCnfPart->nVars;
nClauses += pCnfPart->nClauses;
// remember top frame var IDs
if ( fGetCex && vTopVarIds == NULL )
{
vTopVarIds = Vec_IntStartFull( Aig_ManCiNum(p) );
Aig_ManForEachCi( p, pObjPi, i )
{
if ( pObjPi->pData == NULL )
continue;
pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
assert( Aig_ObjIsCi(pObjPiCopy) );
if ( Saig_ObjIsPi(p, pObjPi) )
Vec_IntWriteEntry( vTopVarIds, Aig_ObjCioId(pObjPi) + Saig_ManRegNum(p), pCnfPart->pVarNums[Aig_ObjId(pObjPiCopy)] );
else if ( Saig_ObjIsLo(p, pObjPi) )
Vec_IntWriteEntry( vTopVarIds, Aig_ObjCioId(pObjPi) - Saig_ManPiNum(p), pCnfPart->pVarNums[Aig_ObjId(pObjPiCopy)] );
else assert( 0 );
}
}
// stitch variables of top and bot
assert( Aig_ManCoNum(pAigPart)-1 == Vec_IntSize(vTopVarNums) );
Aig_ManForEachCo( pAigPart, pObjPo, i )
{
if ( i == 0 )
{
// do not perform inductive strengthening
// if ( f > 0 )
// continue;
// add topmost literal
Lits[0] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], f>0 );
if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
assert( 0 );
nClauses++;
continue;
}
Lits[0] = toLitCond( Vec_IntEntry(vTopVarNums, i-1), 0 );
Lits[1] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], 1 );
if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
assert( 0 );
Lits[0] = toLitCond( Vec_IntEntry(vTopVarNums, i-1), 1 );
Lits[1] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], 0 );
if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
assert( 0 );
nClauses += 2;
}
// add CNF to the SAT solver
for ( i = 0; i < pCnfPart->nClauses; i++ )
if ( !sat_solver_addclause( pSat, pCnfPart->pClauses[i], pCnfPart->pClauses[i+1] ) )
break;
if ( i < pCnfPart->nClauses )
{
// printf( "SAT solver became UNSAT after adding clauses.\n" );
RetValue = 1;
break;
}
// create new set of POs to derive new top
Vec_PtrClear( vTop );
Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
Vec_IntClear( vTopVarNums );
nOldSize = Vec_IntSize(vState);
Vec_IntFillExtra( vState, nOldSize + Aig_ManRegNum(p), -1 );
Vec_PtrForEachEntry( Aig_Obj_t *, vBot, pObjPi, i )
{
assert( Aig_ObjIsCi(pObjPi) );
if ( Saig_ObjIsLo(p, pObjPi) )
{
pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
assert( pObjPiCopy != NULL );
Vec_PtrPush( vTop, Saig_ObjLoToLi(p, pObjPi) );
Vec_IntPush( vTopVarNums, pCnfPart->pVarNums[pObjPiCopy->Id] );
iReg = pObjPi->CioId - Saig_ManPiNum(p);
assert( iReg >= 0 && iReg < Aig_ManRegNum(p) );
Vec_IntWriteEntry( vState, nOldSize+iReg, pCnfPart->pVarNums[pObjPiCopy->Id] );
}
}
static inline int Bal_ObjCost( Bal_Man_t * p, int i ) { return Vec_IntEntry(p->vCosts, i); }
static inline int Swp_ManLit2Lit( Swp_Man_t * p, int Lit ) { assert( Vec_IntEntry(p->vId2Lit, Abc_Lit2Var(Lit)) ); return Abc_Lit2LitL( Vec_IntArray(p->vId2Lit), Lit ); }
// returns literal associated with the probe
int Gia_SweeperProbeLit( Gia_Man_t * p, int ProbeId )
{
Swp_Man_t * pSwp = (Swp_Man_t *)p->pData;
return Vec_IntEntry( pSwp->vProbes, ProbeId );
}
{
Vec_IntPush( vValues, pObj->Value );
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
}
Gia_ManHashStop( pNew );
// create outputs
Vec_IntForEachEntry( vProbeIds, ProbeId, i )
{
pObj = Gia_Lit2Obj( p, Gia_SweeperProbeLit(p, ProbeId) );
Gia_ManAppendCo( pNew, Gia_Regular(pObj)->Value ^ Gia_IsComplement(pObj) );
}
// return the values back
Gia_ManForEachPi( p, pObj, i )
pObj->Value = 0;
Gia_ManForEachObjVec( vObjIds, p, pObj, i )
pObj->Value = Vec_IntEntry( vValues, i );
Vec_IntFree( vObjIds );
Vec_IntFree( vValues );
// duplicated if needed
if ( Gia_ManHasDangling(pNew) )
{
pNew = Gia_ManCleanup( pTemp = pNew );
Gia_ManStop( pTemp );
}
// copy names if present
if ( vInNames )
pNew->vNamesIn = Vec_PtrDupStr( vInNames );
if ( vOutNames )
pNew->vNamesOut = Vec_PtrDupStr( vOutNames );
return pNew;
}
/**Function*************************************************************
Synopsis [Performs resubstitution for the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Sfm_NodeResubSolve( Sfm_Ntk_t * p, int iNode, int f, int fRemoveOnly )
{
int fSkipUpdate = 0;
int fVeryVerbose = 0;//p->pPars->fVeryVerbose && Vec_IntSize(p->vDivs) < 200;// || pNode->Id == 556;
int i, iFanin, iVar = -1;
word uTruth, uSign, uMask;
abctime clk;
assert( Sfm_ObjIsNode(p, iNode) );
assert( f >= 0 && f < Sfm_ObjFaninNum(p, iNode) );
p->nTryRemoves++;
// report init stats
if ( p->pPars->fVeryVerbose )
printf( "%5d : Lev =%3d. Leaf =%3d. Node =%3d. Div=%3d. Fanin =%4d (%d/%d). MFFC = %d\n",
iNode, Sfm_ObjLevel(p, iNode), 0, Vec_IntSize(p->vNodes), Vec_IntSize(p->vDivs),
Sfm_ObjFanin(p, iNode, f), f, Sfm_ObjFaninNum(p, iNode), Sfm_ObjMffcSize(p, Sfm_ObjFanin(p, iNode, f)) );
// clean simulation info
p->nCexes = 0;
Vec_WrdFill( p->vDivCexes, Vec_IntSize(p->vDivs), 0 );
// try removing the critical fanin
Vec_IntClear( p->vDivIds );
Sfm_ObjForEachFanin( p, iNode, iFanin, i )
if ( i != f )
Vec_IntPush( p->vDivIds, Sfm_ObjSatVar(p, iFanin) );
clk = Abc_Clock();
uTruth = Sfm_ComputeInterpolant( p );
p->timeSat += Abc_Clock() - clk;
// analyze outcomes
if ( uTruth == SFM_SAT_UNDEC )
{
p->nTimeOuts++;
return 0;
}
if ( uTruth != SFM_SAT_SAT )
goto finish;
if ( fRemoveOnly || p->pPars->fRrOnly || Vec_IntSize(p->vDivs) == 0 )
return 0;
p->nTryResubs++;
if ( fVeryVerbose )
{
for ( i = 0; i < 9; i++ )
printf( " " );
for ( i = 0; i < Vec_IntSize(p->vDivs); i++ )
printf( "%d", i % 10 );
printf( "\n" );
}
while ( 1 )
{
if ( fVeryVerbose )
{
printf( "%3d: %3d ", p->nCexes, iVar );
Vec_WrdForEachEntry( p->vDivCexes, uSign, i )
printf( "%d", Abc_InfoHasBit((unsigned *)&uSign, p->nCexes-1) );
printf( "\n" );
}
// find the next divisor to try
uMask = (~(word)0) >> (64 - p->nCexes);
Vec_WrdForEachEntry( p->vDivCexes, uSign, iVar )
if ( uSign == uMask )
break;
if ( iVar == Vec_IntSize(p->vDivs) )
return 0;
// try replacing the critical fanin
Vec_IntPush( p->vDivIds, Sfm_ObjSatVar(p, Vec_IntEntry(p->vDivs, iVar)) );
clk = Abc_Clock();
uTruth = Sfm_ComputeInterpolant( p );
p->timeSat += Abc_Clock() - clk;
// analyze outcomes
if ( uTruth == SFM_SAT_UNDEC )
{
p->nTimeOuts++;
return 0;
}
if ( uTruth != SFM_SAT_SAT )
goto finish;
if ( p->nCexes == 64 )
return 0;
// remove the last variable
Vec_IntPop( p->vDivIds );
}
finish:
if ( p->pPars->fVeryVerbose )
{
if ( iVar == -1 )
printf( "Node %d: Fanin %d (%d) can be removed. ", iNode, f, Sfm_ObjFanin(p, iNode, f) );
else
printf( "Node %d: Fanin %d (%d) can be replaced by divisor %d (%d). ",
iNode, f, Sfm_ObjFanin(p, iNode, f), iVar, Vec_IntEntry(p->vDivs, iVar) );
Kit_DsdPrintFromTruth( (unsigned *)&uTruth, Vec_IntSize(p->vDivIds) ); printf( "\n" );
}
if ( iVar == -1 )
p->nRemoves++;
else
p->nResubs++;
if ( fSkipUpdate )
return 0;
// update the network
Sfm_NtkUpdate( p, iNode, f, (iVar == -1 ? iVar : Vec_IntEntry(p->vDivs, iVar)), uTruth );
return 1;
}
// vFlopsNew contains PI numbers that should be kept in pAbs
if ( fVerbose )
printf( "Adding %d registers to the abstraction (total = %d).\n\n", Vec_IntSize(vFlopsNew), Aig_ManRegNum(pAbs)+Vec_IntSize(vFlopsNew) );
// add to the abstraction
Vec_IntForEachEntry( vFlopsNew, Entry, i )
{
Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
assert( Entry >= Saig_ManPiNum(p) );
assert( Entry < Aig_ManCiNum(p) );
Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
}
Vec_IntFree( vFlopsNew );
Vec_IntSort( vFlops, 0 );
Vec_IntForEachEntryStart( vFlops, Entry, i, 1 )
assert( Vec_IntEntry(vFlops, i-1) != Entry );
return Saig_ManDupAbstraction( p, vFlops );
}
/**Function*************************************************************
Synopsis [Refines abstraction using one step.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Psr_NtkForEachPo( pNtkBox, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) == -1 );
Vec_IntWriteEntry( vMap, NameId, Psr_NtkPiNum(pNtkBox) + i + 1 ); // +1 to keep 1st form input non-zero
}
/**Function*************************************************************
Synopsis [Refines abstraction using one step.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManCexRefine( Aig_Man_t * p, Aig_Man_t * pAbs, Vec_Int_t * vFlops, int nFrames, int nConfMaxOne, int fUseBdds, int fUseDprove, int fVerbose, int * pnUseStart, int * piRetValue, int * pnFrames )
{
Vec_Int_t * vFlopsNew;
int i, Entry, RetValue;
*piRetValue = -1;
if ( fUseDprove && Aig_ManRegNum(pAbs) > 0 )
{
/*
Fra_Sec_t SecPar, * pSecPar = &SecPar;
Fra_SecSetDefaultParams( pSecPar );
pSecPar->fVerbose = fVerbose;
RetValue = Fra_FraigSec( pAbs, pSecPar, NULL );
*/
Aig_Man_t * pAbsOrpos = Saig_ManDupOrpos( pAbs );
Pdr_Par_t Pars, * pPars = &Pars;
Pdr_ManSetDefaultParams( pPars );
pPars->nTimeOut = 10;
pPars->fVerbose = fVerbose;
if ( pPars->fVerbose )
printf( "Running property directed reachability...\n" );
RetValue = Pdr_ManSolve( pAbsOrpos, pPars );
if ( pAbsOrpos->pSeqModel )
pAbsOrpos->pSeqModel->iPo = Saig_ManFindFailedPoCex( pAbs, pAbsOrpos->pSeqModel );
pAbs->pSeqModel = pAbsOrpos->pSeqModel;
pAbsOrpos->pSeqModel = NULL;
Aig_ManStop( pAbsOrpos );
if ( RetValue )
*piRetValue = 1;
}
else if ( fUseBdds && (Aig_ManRegNum(pAbs) > 0 && Aig_ManRegNum(pAbs) <= 80) )
{
Saig_ParBbr_t Pars, * pPars = &Pars;
Bbr_ManSetDefaultParams( pPars );
pPars->TimeLimit = 0;
pPars->nBddMax = 1000000;
pPars->nIterMax = nFrames;
pPars->fPartition = 1;
pPars->fReorder = 1;
pPars->fReorderImage = 1;
pPars->fVerbose = fVerbose;
pPars->fSilent = 0;
RetValue = Aig_ManVerifyUsingBdds( pAbs, pPars );
if ( RetValue )
*piRetValue = 1;
}
else
{
Saig_BmcPerform( pAbs, pnUseStart? *pnUseStart: 0, nFrames, 2000, 0, nConfMaxOne, 0, fVerbose, 0, pnFrames, 0 );
}
if ( pAbs->pSeqModel == NULL )
return NULL;
if ( pnUseStart )
*pnUseStart = pAbs->pSeqModel->iFrame;
// vFlopsNew = Saig_ManExtendCounterExampleTest( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pAbs->pSeqModel, 1, fVerbose );
vFlopsNew = Saig_ManExtendCounterExampleTest3( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pAbs->pSeqModel, fVerbose );
if ( vFlopsNew == NULL )
return NULL;
if ( Vec_IntSize(vFlopsNew) == 0 )
{
printf( "Discovered a true counter-example!\n" );
p->pSeqModel = Saig_ManCexRemap( p, pAbs, pAbs->pSeqModel );
Vec_IntFree( vFlopsNew );
*piRetValue = 0;
return NULL;
}
// vFlopsNew contains PI numbers that should be kept in pAbs
if ( fVerbose )
printf( "Adding %d registers to the abstraction (total = %d).\n\n", Vec_IntSize(vFlopsNew), Aig_ManRegNum(pAbs)+Vec_IntSize(vFlopsNew) );
// add to the abstraction
Vec_IntForEachEntry( vFlopsNew, Entry, i )
{
Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
assert( Entry >= Saig_ManPiNum(p) );
assert( Entry < Aig_ManCiNum(p) );
Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
}
static inline int Kf_ObjTime( Kf_Man_t * p, int i ) { return Vec_IntEntry(&p->vTime, i); }
Abc_Obj_t * Abc_NodeFanin1Copy( Abc_Ntk_t * pNtk, Vec_Int_t * vCopies, Mini_Aig_t * p, int Id )
{
int Lit = Mini_AigNodeFanin1( p, Id );
int AbcLit = Abc_LitNotCond( Vec_IntEntry(vCopies, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) );
return Abc_ObjFromLit( pNtk, AbcLit );
}
