/**Function*************************************************************
Synopsis [Collects used internal nodes in a topological order.]
Description [Additionally considers objects in groups as a single object
and collects them in a topological order together as single entity.]
SideEffects []
SeeAlso []
***********************************************************************/
void Sfm_NtkDfs_rec( Sfm_Ntk_t * p, int iNode, Vec_Int_t * vNodes, Vec_Wec_t * vGroups, Vec_Int_t * vGroupMap, Vec_Int_t * vBoxesLeft )
{
int i, iFanin;
if ( Sfm_ObjIsPi(p, iNode) )
return;
if ( Sfm_ObjIsTravIdCurrent(p, iNode) )
return;
if ( Vec_IntEntry(vGroupMap, iNode) >= 0 )
{
int k, iGroup = Abc_Lit2Var( Vec_IntEntry(vGroupMap, iNode) );
Vec_Int_t * vGroup = Vec_WecEntry( vGroups, iGroup );
Vec_IntForEachEntry( vGroup, iNode, i )
assert( Sfm_ObjIsNode(p, iNode) );
Vec_IntForEachEntry( vGroup, iNode, i )
Sfm_ObjSetTravIdCurrent( p, iNode );
Vec_IntForEachEntry( vGroup, iNode, i )
Sfm_ObjForEachFanin( p, iNode, iFanin, k )
Sfm_NtkDfs_rec( p, iFanin, vNodes, vGroups, vGroupMap, vBoxesLeft );
Vec_IntForEachEntry( vGroup, iNode, i )
Vec_IntPush( vNodes, iNode );
Vec_IntPush( vBoxesLeft, iGroup );
}
else
{
Sfm_ObjSetTravIdCurrent(p, iNode);
Sfm_ObjForEachFanin( p, iNode, iFanin, i )
Sfm_NtkDfs_rec( p, iFanin, vNodes, vGroups, vGroupMap, vBoxesLeft );
Vec_IntPush( vNodes, iNode );
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Sat_ProofResolve( Vec_Vec_t * vClauses, int Result, int Clause1, int Clause2 )
{
Vec_Int_t * vResult = Vec_VecEntry( vClauses, Result );
Vec_Int_t * vClause1 = Vec_VecEntry( vClauses, Clause1 );
Vec_Int_t * vClause2 = Vec_VecEntry( vClauses, Clause2 );
int Entry1, Entry2, ResVar;
int i, j, Counter = 0;
Vec_IntForEachEntry( vClause1, Entry1, i )
Vec_IntForEachEntry( vClause2, Entry2, j )
if ( Entry1 == -Entry2 )
{
ResVar = Entry1;
Counter++;
}
if ( Counter != 1 )
{
printf( "Error: Clause %d = Resolve(%d, %d): The number of pivot vars is %d.\n",
Result, Clause1, Clause2, Counter );
Sat_PrintClause( vClauses, Clause1 );
Sat_PrintClause( vClauses, Clause2 );
return 0;
}
// create new clause
assert( Vec_IntSize(vResult) == 0 );
Vec_IntForEachEntry( vClause1, Entry1, i )
if ( Entry1 != ResVar && Entry1 != -ResVar )
Vec_IntPushUnique( vResult, Entry1 );
assert( Vec_IntSize(vResult) + 1 == Vec_IntSize(vClause1) );
Vec_IntForEachEntry( vClause2, Entry2, i )
if ( Entry2 != ResVar && Entry2 != -ResVar )
Vec_IntPushUnique( vResult, Entry2 );
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManDetectSeqSignals( Gia_Man_t * p, int fSetReset, int fVerbose )
{
Vec_Int_t * vSuper;
Gia_Obj_t * pFlop, * pObjC, * pObj0, * pObj1, * pNode, * pTemp;
int i, k, Ent, * pSets, * pResets, * pEnables;
int nHaveSetReset = 0, nHaveEnable = 0;
assert( Gia_ManRegNum(p) > 0 );
pSets = ABC_CALLOC( int, Gia_ManObjNum(p) );
pResets = ABC_CALLOC( int, Gia_ManObjNum(p) );
pEnables = ABC_CALLOC( int, Gia_ManObjNum(p) );
vSuper = Vec_IntAlloc( 100 );
Gia_ManForEachRi( p, pFlop, i )
{
pNode = Gia_ObjFanin0(pFlop);
if ( !Gia_ObjIsAnd(pNode) )
continue;
// detect sets/resets
Gia_CollectSuper( p, pNode, vSuper );
if ( Gia_ObjFaninC0(pFlop) )
Vec_IntForEachEntry( vSuper, Ent, k )
pSets[Ent]++;
else
Vec_IntForEachEntry( vSuper, Ent, k )
pResets[Ent]++;
// detect enables
if ( !Gia_ObjIsMuxType(pNode) )
continue;
pObjC = Gia_ObjRecognizeMux( pNode, &pObj0, &pObj1 );
pTemp = Gia_ObjRiToRo( p, pFlop );
if ( Gia_Regular(pObj0) != pTemp && Gia_Regular(pObj1) != pTemp )
continue;
if ( !Gia_ObjFaninC0(pFlop) )
{
pObj0 = Gia_Not(pObj0);
pObj1 = Gia_Not(pObj1);
}
if ( Gia_IsComplement(pObjC) )
{
pObjC = Gia_Not(pObjC);
pTemp = pObj0;
pObj0 = pObj1;
pObj1 = pTemp;
}
// detect controls
// Gia_CollectSuper( p, pObjC, vSuper );
// Vec_IntForEachEntry( vSuper, Ent, k )
// pEnables[Ent]++;
pEnables[Gia_ObjId(p, pObjC)]++;
nHaveEnable++;
}
static inline int Gia_ObjCheckMffc( Gia_Man_t * p, Gia_Obj_t * pRoot, int Limit, Vec_Int_t * vNodes, Vec_Int_t * vLeaves, Vec_Int_t * vInners )
{
int RetValue, iObj, i;
Vec_IntClear( vNodes );
RetValue = Gia_ObjCheckMffc_rec( p, pRoot, Limit, vNodes );
if ( RetValue )
{
Vec_IntClear( vLeaves );
Vec_IntClear( vInners );
Vec_IntSort( vNodes, 0 );
Vec_IntForEachEntry( vNodes, iObj, i )
if ( Gia_ObjRefNumId(p, iObj) > 0 || Gia_ObjIsCi(Gia_ManObj(p, iObj)) )
{
if ( !Vec_IntSize(vLeaves) || Vec_IntEntryLast(vLeaves) != iObj )
Vec_IntPush( vLeaves, iObj );
}
else
{
if ( !Vec_IntSize(vInners) || Vec_IntEntryLast(vInners) != iObj )
Vec_IntPush( vInners, iObj );
}
Vec_IntPush( vInners, Gia_ObjId(p, pRoot) );
}
Vec_IntForEachEntry( vNodes, iObj, i )
Gia_ObjRefIncId( p, iObj );
return RetValue;
}
/**Function*************************************************************
Synopsis [Computes supports of the partitions.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Llb_ImgSupports( Aig_Man_t * p, Vec_Ptr_t * vDdMans, Vec_Int_t * vStart, Vec_Int_t * vStop, int fAddPis, int fVerbose )
{
Vec_Ptr_t * vSupps;
Vec_Int_t * vOne;
Aig_Obj_t * pObj;
DdManager * dd;
DdNode * bSupp, * bTemp;
int i, Entry, nSize;
nSize = Cudd_ReadSize( (DdManager *)Vec_PtrEntry( vDdMans, 0 ) );
vSupps = Vec_PtrAlloc( 100 );
// create initial
vOne = Vec_IntStart( nSize );
Vec_IntForEachEntry( vStart, Entry, i )
Vec_IntWriteEntry( vOne, Entry, 1 );
Vec_PtrPush( vSupps, vOne );
// create intermediate
Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
{
vOne = Vec_IntStart( nSize );
bSupp = Cudd_Support( dd, dd->bFunc ); Cudd_Ref( bSupp );
for ( bTemp = bSupp; bTemp != Cudd_ReadOne(dd); bTemp = cuddT(bTemp) )
Vec_IntWriteEntry( vOne, bTemp->index, 1 );
Cudd_RecursiveDeref( dd, bSupp );
Vec_PtrPush( vSupps, vOne );
}
/**Function*************************************************************
Synopsis [Adds the new entry to the hash table.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Bdc_TableClear( Bdc_Man_t * p )
{
int Spot, i;
Vec_IntForEachEntry( p->vSpots, Spot, i )
p->pTable[Spot] = NULL;
Vec_IntClear( p->vSpots );
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns the array of constraint candidates.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Llb_ManCountEntries( Vec_Int_t * vCands )
{
int i, Entry, Counter = 0;
Vec_IntForEachEntry( vCands, Entry, i )
Counter += ((Entry == 0) || (Entry == 1));
return Counter;
}
/**Function*************************************************************
Synopsis [Performs ternary simulation for one design.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo, Vec_Int_t * vRes )
{
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f, Entry, iBit = 0;
Saig_ManForEachLo( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
for ( f = 0; f <= pCex->iFrame; f++ )
{
Saig_ManSimInfoSet( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE );
Saig_ManForEachPi( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
if ( vRes )
Vec_IntForEachEntry( vRes, Entry, i )
Saig_ManSimInfoSet( vSimInfo, Aig_ManCi(p, Entry), f, SAIG_UND );
Aig_ManForEachNode( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
Aig_ManForEachCo( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
if ( f == pCex->iFrame )
break;
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
Saig_ManSimInfoSet( vSimInfo, pObjLo, f+1, Saig_ManSimInfoGet(vSimInfo, pObjLi, f) );
}
// make sure the output of the property failed
pObj = Aig_ManCo( p, pCex->iPo );
return Saig_ManSimInfoGet( vSimInfo, pObj, pCex->iFrame );
}
/**Function*************************************************************
Synopsis [Convert TT to GIA via DSD.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Dsm_ManTruthToGia( void * p, word * pTruth, Vec_Int_t * vLeaves, Vec_Int_t * vCover )
{
int fUseMuxes = 0;
int fDelayBalance = 1;
Gia_Man_t * pGia = (Gia_Man_t *)p;
int nSizeNonDec;
char pDsd[1000];
m_Calls++;
assert( Vec_IntSize(vLeaves) <= DAU_DSD_MAX_VAR );
// collect delay information
if ( fDelayBalance && fUseMuxes )
{
int i, iLit, pVarLevels[DAU_DSD_MAX_VAR];
Vec_IntForEachEntry( vLeaves, iLit, i )
pVarLevels[i] = Gia_ObjLevelId( pGia, Abc_Lit2Var(iLit) );
nSizeNonDec = Dau_DsdDecomposeLevel( pTruth, Vec_IntSize(vLeaves), fUseMuxes, 1, pDsd, pVarLevels );
}
else
nSizeNonDec = Dau_DsdDecompose( pTruth, Vec_IntSize(vLeaves), fUseMuxes, 1, pDsd );
if ( nSizeNonDec )
m_NonDsd++;
// printf( "%s\n", pDsd );
if ( fDelayBalance )
return Dau_DsdToGia( pGia, pDsd, Vec_IntArray(vLeaves), vCover );
else
return Dau_DsdToGia2( pGia, pDsd, Vec_IntArray(vLeaves), vCover );
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Sat_PrintClause( Vec_Vec_t * vClauses, int Clause )
{
Vec_Int_t * vClause;
int i, Entry;
printf( "Clause %d: {", Clause );
vClause = Vec_VecEntry( vClauses, Clause );
Vec_IntForEachEntry( vClause, Entry, i )
printf( " %d", Entry );
printf( " }\n" );
}
/**Function*************************************************************
Synopsis [Computes partitioning of registers.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManRegCreatePart( Gia_Man_t * p, Vec_Int_t * vPart, int * pnCountPis, int * pnCountRegs, int ** ppMapBack )
{
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
Vec_Int_t * vNodes, * vRoots;
int i, iOut, nCountPis, nCountRegs;
int * pMapBack;
// collect/mark nodes/PIs in the DFS order from the roots
Gia_ManIncrementTravId( p );
vRoots = Vec_IntAlloc( Vec_IntSize(vPart) );
Vec_IntForEachEntry( vPart, iOut, i )
Vec_IntPush( vRoots, Gia_ObjId(p, Gia_ManCo(p, Gia_ManPoNum(p)+iOut)) );
vNodes = Gia_ManCollectNodesCis( p, Vec_IntArray(vRoots), Vec_IntSize(vRoots) );
Vec_IntFree( vRoots );
// unmark register outputs
Vec_IntForEachEntry( vPart, iOut, i )
Gia_ObjSetTravIdPrevious( p, Gia_ManCi(p, Gia_ManPiNum(p)+iOut) );
// count pure PIs
nCountPis = nCountRegs = 0;
Gia_ManForEachPi( p, pObj, i )
nCountPis += Gia_ObjIsTravIdCurrent(p, pObj);
// count outputs of other registers
Gia_ManForEachRo( p, pObj, i )
nCountRegs += Gia_ObjIsTravIdCurrent(p, pObj); // should be !Gia_... ???
if ( pnCountPis )
*pnCountPis = nCountPis;
if ( pnCountRegs )
*pnCountRegs = nCountRegs;
// clean old manager
Gia_ManFillValue(p);
Gia_ManConst0(p)->Value = 0;
// create the new manager
pNew = Gia_ManStart( Vec_IntSize(vNodes) );
// create the PIs
Gia_ManForEachCi( p, pObj, i )
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
pObj->Value = Gia_ManAppendCi(pNew);
// add variables for the register outputs
// create fake POs to hold the register outputs
Vec_IntForEachEntry( vPart, iOut, i )
{
pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
pObj->Value = Gia_ManAppendCi(pNew);
Gia_ManAppendCo( pNew, pObj->Value );
Gia_ObjSetTravIdCurrent( p, pObj ); // added
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTempor( Aig_Man_t * pAig, int nFrames, int TimeOut, int nConfLimit, int fUseBmc, int fUseTransSigs, int fVerbose, int fVeryVerbose )
{
extern int Saig_ManPhasePrefixLength( Aig_Man_t * p, int fVerbose, int fVeryVerbose, Vec_Int_t ** pvTrans );
Vec_Int_t * vTransSigs = NULL;
int RetValue, nFramesFinished = -1;
assert( nFrames >= 0 );
if ( nFrames == 0 )
{
nFrames = Saig_ManPhasePrefixLength( pAig, fVerbose, fVeryVerbose, &vTransSigs );
if ( nFrames == 1 )
{
Vec_IntFreeP( &vTransSigs );
printf( "The leading sequence has length 1. Temporal decomposition is not performed.\n" );
return NULL;
}
if ( fUseTransSigs )
{
int Entry, i, iLast = -1;
Vec_IntForEachEntry( vTransSigs, Entry, i )
iLast = Entry ? i :iLast;
if ( iLast > 0 && iLast < nFrames )
{
Abc_Print( 1, "Reducing frame count from %d to %d to fit the last transient.\n", nFrames, iLast );
nFrames = iLast;
}
}
Abc_Print( 1, "Using computed frame number (%d).\n", nFrames );
}
else
Abc_Print( 1, "Using user-given frame number (%d).\n", nFrames );
// run BMC2
if ( fUseBmc )
{
RetValue = Saig_BmcPerform( pAig, 0, nFrames, 2000, TimeOut, nConfLimit, 0, fVerbose, 0, &nFramesFinished );
if ( RetValue == 0 )
{
Vec_IntFreeP( &vTransSigs );
printf( "A cex found in the first %d frames.\n", nFrames );
return NULL;
}
if ( nFramesFinished < nFrames )
{
int iLastBefore = Vec_IntLastNonZeroBeforeLimit( vTransSigs, nFramesFinished );
if ( iLastBefore < 1 || !fUseTransSigs )
{
Vec_IntFreeP( &vTransSigs );
printf( "BMC for %d frames could not be completed. A cex may exist!\n", nFrames );
return NULL;
}
assert( iLastBefore < nFramesFinished );
printf( "BMC succeeded to frame %d. Adjusting frame count to be (%d) based on the last transient signal.\n", nFramesFinished, iLastBefore );
}
}
Vec_IntFreeP( &vTransSigs );
return Saig_ManTemporDecompose( pAig, nFrames );
}
/**Function*************************************************************
Synopsis [Saves variables corresponding to latch outputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int * Fra_ClauCreateMapping( Vec_Int_t * vSatVarsFrom, Vec_Int_t * vSatVarsTo, int nVarsMax )
{
int * pMapping, Var, i;
assert( Vec_IntSize(vSatVarsFrom) == Vec_IntSize(vSatVarsTo) );
pMapping = ABC_ALLOC( int, nVarsMax );
for ( i = 0; i < nVarsMax; i++ )
pMapping[i] = -1;
Vec_IntForEachEntry( vSatVarsFrom, Var, i )
pMapping[Var] = Vec_IntEntry(vSatVarsTo,i);
return pMapping;
}
/**Function*************************************************************
Synopsis [Solve the enumeration problem.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Bmc_EcoSolve( sat_solver * pSat, int Root, Vec_Int_t * vVars )
{
int nBTLimit = 1000000;
Vec_Int_t * vLits = Vec_IntAlloc( Vec_IntSize(vVars) );
int status, i, Div, iVar, nFinal, * pFinal, nIter = 0, RetValue = 0;
int pLits[2], nVars = sat_solver_nvars( pSat );
sat_solver_setnvars( pSat, nVars + 1 );
pLits[0] = Abc_Var2Lit( Root, 0 ); // F = 1
pLits[1] = Abc_Var2Lit( nVars, 0 ); // iNewLit
while ( 1 )
{
// find onset minterm
status = sat_solver_solve( pSat, pLits, pLits + 2, nBTLimit, 0, 0, 0 );
if ( status == l_Undef )
{ RetValue = -1; break; }
if ( status == l_False )
{ RetValue = 1; break; }
assert( status == l_True );
// collect divisor literals
Vec_IntClear( vLits );
Vec_IntPush( vLits, Abc_LitNot(pLits[0]) ); // F = 0
Vec_IntForEachEntry( vVars, Div, i )
Vec_IntPush( vLits, sat_solver_var_literal(pSat, Div) );
// check against offset
status = sat_solver_solve( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits), nBTLimit, 0, 0, 0 );
if ( status == l_Undef )
{ RetValue = -1; break; }
if ( status == l_True )
break;
assert( status == l_False );
// compute cube and add clause
nFinal = sat_solver_final( pSat, &pFinal );
Vec_IntClear( vLits );
Vec_IntPush( vLits, Abc_LitNot(pLits[1]) ); // NOT(iNewLit)
printf( "Cube %d : ", nIter );
for ( i = 0; i < nFinal; i++ )
{
if ( pFinal[i] == pLits[0] )
continue;
Vec_IntPush( vLits, pFinal[i] );
iVar = Vec_IntFind( vVars, Abc_Lit2Var(pFinal[i]) ); assert( iVar >= 0 );
printf( "%s%d ", Abc_LitIsCompl(pFinal[i]) ? "+":"-", iVar );
}
printf( "\n" );
status = sat_solver_addclause( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits) );
assert( status );
nIter++;
}
// assert( status == l_True );
Vec_IntFree( vLits );
return RetValue;
}
Abc_NtkForEachObj( pNtk, pObj, i )
{
// skip constants, PIs, and latches
if ( Abc_ObjFaninNum(pObj) == 0 || Abc_ObjIsLatch(pObj) )
continue;
// process the first fanin
Vec_IntClear( vInitValues );
pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 0, vInitValues );
Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
// store the initial values
Vec_IntForEachEntry( vInitValues, Init, k )
Seq_NodeInsertFirst( pObj->pCopy, 0, Init );
// skip single-input nodes
if ( Abc_ObjFaninNum(pObj) == 1 )
continue;
// process the second fanin
Vec_IntClear( vInitValues );
pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 1, vInitValues );
Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
// store the initial values
Vec_IntForEachEntry( vInitValues, Init, k )
Seq_NodeInsertFirst( pObj->pCopy, 1, Init );
}
/**Function*************************************************************
Synopsis [Prints information about node equivalences.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkDressPrintEquivs( Vec_Ptr_t * vRes )
{
Vec_Int_t * vClass;
int i, k, Entry;
Vec_PtrForEachEntry( Vec_Int_t *, vRes, vClass, i )
{
printf( "Class %5d : ", i );
printf( "Num =%5d ", Vec_IntSize(vClass) );
Vec_IntForEachEntry( vClass, Entry, k )
printf( "%5d%c%d ",
Abc_ObjEquivId2ObjId(Entry),
Abc_ObjEquivId2Polar(Entry)? '-':'+',
Abc_ObjEquivId2NtkId(Entry) );
printf( "\n" );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Sfm_CreateFanout( Vec_Wec_t * vFanins, Vec_Wec_t * vFanouts )
{
Vec_Int_t * vArray;
int i, k, Fanin;
// count fanouts
Vec_WecInit( vFanouts, Vec_WecSize(vFanins) );
Vec_WecForEachLevel( vFanins, vArray, i )
Vec_IntForEachEntry( vArray, Fanin, k )
Vec_WecEntry( vFanouts, Fanin )->nSize++;
// allocate fanins
Vec_WecForEachLevel( vFanouts, vArray, i )
{
k = vArray->nSize; vArray->nSize = 0;
Vec_IntGrow( vArray, k );
}
static inline int Gia_NodeMffcSizeSupp( Gia_Man_t * p, Gia_Obj_t * pNode, Vec_Int_t * vSupp, Vec_Int_t * vSuppRefs )
{
int ConeSize1, ConeSize2, i, iObj;
assert( !Gia_IsComplement(pNode) );
assert( Gia_ObjIsAnd(pNode) );
Vec_IntClear( vSupp );
Vec_IntClear( vSuppRefs );
Gia_ManIncrementTravId( p );
ConeSize1 = Gia_NodeDeref_rec( p, pNode );
Gia_NodeCollect_rec( p, Gia_ObjFanin0(pNode), vSupp, vSuppRefs );
Gia_NodeCollect_rec( p, Gia_ObjFanin1(pNode), vSupp, vSuppRefs );
ConeSize2 = Gia_NodeRef_rec( p, pNode );
assert( ConeSize1 == ConeSize2 );
assert( ConeSize1 >= 0 );
// record supp refs
Vec_IntForEachEntry( vSupp, iObj, i )
Vec_IntAddToEntry( vSuppRefs, i, -Gia_ObjRefNumId(p, iObj) );
return ConeSize1;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Sfm_CheckConsistency( Vec_Wec_t * vFanins, int nPis, int nPos, Vec_Str_t * vFixed )
{
Vec_Int_t * vArray;
int i, k, Fanin;
// check entries
Vec_WecForEachLevel( vFanins, vArray, i )
{
// PIs have no fanins
if ( i < nPis )
assert( Vec_IntSize(vArray) == 0 && Vec_StrEntry(vFixed, i) == (char)0 );
// nodes are in a topo order; POs cannot be fanins
Vec_IntForEachEntry( vArray, Fanin, k )
// assert( Fanin < i && Fanin + nPos < Vec_WecSize(vFanins) );
assert( Fanin + nPos < Vec_WecSize(vFanins) );
// POs have one fanout
if ( i + nPos >= Vec_WecSize(vFanins) )
assert( Vec_IntSize(vArray) == 1 && Vec_StrEntry(vFixed, i) == (char)0 );
}
}
/**Function*************************************************************
Synopsis [Checks if the property holds. Returns counter-example if not.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Fra_ClauCheckProperty( Cla_Man_t * p, Vec_Int_t * vCex )
{
int nBTLimit = 0;
int RetValue, iVar, i;
sat_solver_act_var_clear( p->pSatMain );
RetValue = sat_solver_solve( p->pSatMain, NULL, NULL, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
Vec_IntClear( vCex );
if ( RetValue == l_False )
return 1;
assert( RetValue == l_True );
Vec_IntForEachEntry( p->vSatVarsMainCs, iVar, i )
Vec_IntPush( vCex, sat_solver_var_literal(p->pSatMain, iVar) );
/*
{
int i;
for (i = 0; i < p->pSatMain->size; i++)
printf( "%d=%d ", i, p->pSatMain->model.ptr[i] == l_True );
printf( "\n" );
}
*/
return 0;
}
/**Function*************************************************************
Synopsis [Add constraint that no more than 1 variable is 1.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Cnf_AddCardinConstr( sat_solver * p, Vec_Int_t * vVars )
{
int i, k, pLits[2], iVar, nVars = sat_solver_nvars(p);
Vec_IntForEachEntry( vVars, iVar, i )
assert( iVar >= 0 && iVar < nVars );
iVar = nVars;
sat_solver_setnvars( p, nVars + Vec_IntSize(vVars) - 1 );
while ( Vec_IntSize(vVars) > 1 )
{
for ( k = i = 0; i < Vec_IntSize(vVars)/2; i++ )
{
pLits[0] = Abc_Var2Lit( Vec_IntEntry(vVars, 2*i), 1 );
pLits[1] = Abc_Var2Lit( Vec_IntEntry(vVars, 2*i+1), 1 );
sat_solver_addclause( p, pLits, pLits + 2 );
sat_solver_add_and( p, iVar, Vec_IntEntry(vVars, 2*i), Vec_IntEntry(vVars, 2*i+1), 1, 1, 1 );
Vec_IntWriteEntry( vVars, k++, iVar++ );
}
if ( Vec_IntSize(vVars) & 1 )
Vec_IntWriteEntry( vVars, k++, Vec_IntEntryLast(vVars) );
Vec_IntShrink( vVars, k );
}
return iVar;
}
Aig_ManForEachCo( p, pObj, i )
{
vSup = Vec_VecEntryInt( vSupps, i );
Vec_IntForEachEntry( vSup, Entry, k )
Vec_VecPush( vSuppsIn, Entry, (void *)(ABC_PTRUINT_T)i );
}
