int32 mba_wrbufW (uint32 mb, int32 bc, uint16 *buf)
{
int32 i, j, ba, mbc, pbc;
uint32 pa, dat;
if (mb >= MBA_NUM) /* valid MBA? */
return 0;
ba = mba_va[mb]; /* get virt addr */
mbc = (MBABC_WR + 1) - mba_bc[mb]; /* get Mbus bc */
if (bc > mbc) /* use smaller */
bc = mbc;
for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
if (!mba_map_addr (ba + i, &pa, mb)) /* page inv? */
break;
if (!ADDR_IS_MEM (pa)) { /* NXM? */
mba_upd_sr (MBASR_RTMO, 0, mb);
break;
}
pbc = VA_PAGSIZE - VA_GETOFF (pa); /* left in page */
if (pbc > (bc - i)) /* limit to rem xfr */
pbc = bc - i;
if (DEBUG_PRI (mba_dev[mb], MBA_DEB_XFR))
fprintf (sim_deb, ">>MBA%d: write, pa = %X, bc = %X\n", mb, pa, pbc);
if ((pa | pbc) & 1) { /* aligned word? */
for (j = 0; j < pbc; pa++, j++) { /* no, bytes */
if ((i + j) & 1) {
WriteB (pa, (*buf >> 8) & BMASK);
buf++;
}
else WriteB (pa, *buf & BMASK);
}
}
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
t_stat r;
int32 val;
uint32 origin, limit;
if (flag) /* dump? */
return SCPE_ARG;
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */
if (sim_switches & SWMASK ('R')) { /* ROM0? */
return SCPE_NXM;
}
else if (sim_switches & SWMASK ('S')) { /* ROM1? */
return SCPE_NXM;
}
else {
if (origin >= limit) /* NXM? */
return SCPE_NXM;
WriteB (origin, val); /* memory */
}
origin = origin + 1;
}
return SCPE_OK;
}
int main(){
void WriteX(unsigned,ofstream&);
void WriteMX1(unsigned,ofstream&);
void WriteR(unsigned,ofstream&);
void WriteRO(ofstream&);
void WriteP(unsigned,ofstream&);
void WriteA(unsigned,ofstream&);
void WriteL(unsigned,ofstream&);
void WriteN(ofstream&);
void WriteB(unsigned,ofstream&);
unsigned dimension;
string file;
ofstream sfile;
cout<<"This file is used to write the connections of the nodes in the .mx file"<<endl;
cout<<"Give one of the dimensions of the MX1 matrix"<<endl;
cin>>dimension;
cout<<"Cool thanks"<<endl;
cout<<"Please give a file name "<<endl;
cin>>file;
file = file + ".mx";
sfile.open(file,ios::app);
if(sfile.fail()){
cerr<<"this file '"<<file<<"' does not exist in the form of .mx"<<endl;
return false;
}
else{
cout<<"file "<<file<<" is k"<<endl;
cout<<"On to the processing!!!"<<endl;
//sfile<<"END CONNECTIONS"<<endl;
WriteX(dimension,sfile);
WriteMX1(dimension,sfile);
WriteR(dimension,sfile);
WriteRO(sfile);
WriteP(dimension,sfile);
WriteA(dimension,sfile);
WriteL(dimension,sfile);
WriteN(sfile);
WriteB(dimension,sfile);
sfile<<"END CONNECTIONS"<<endl;
sfile.close();
}
cout<<"File closed. TERMINATING....."<<endl;
return 0;
}
t_stat sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
{
t_stat r;
int32 i;
uint32 origin, limit;
extern int32 ssc_cnf;
#define SSCCNF_BLO 0x80000000
if (flag) /* dump? */
return sim_messagef (SCPE_NOFNC, "Command Not Implemented\n");
if (sim_switches & SWMASK ('R')) { /* ROM? */
origin = ROMBASE;
limit = ROMBASE + ROMSIZE;
}
else if (sim_switches & SWMASK ('N')) { /* NVR? */
origin = NVRBASE;
limit = NVRBASE + NVRSIZE;
ssc_cnf = ssc_cnf & ~SSCCNF_BLO;
}
else {
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
}
while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */
rom_wr_B (origin, i); /* not writeable */
else WriteB (origin, i); /* store byte */
origin = origin + 1;
}
return SCPE_OK;
}
t_stat sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
{
t_stat r;
int32 i;
uint32 origin, limit;
if (flag) /* dump? */
return sim_messagef (SCPE_NOFNC, "Command Not Implemented\n");
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
else WriteB (origin, i); /* store byte */
origin = origin + 1;
}
return SCPE_OK;
}
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
t_stat r;
int32 val;
uint32 origin, limit;
if (flag) /* dump? */
return sim_messagef (SCPE_NOFNC, "Command Not Implemented\n");
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */
if (sim_switches & SWMASK ('R')) { /* ROM0? */
if (origin >= ROMSIZE)
return SCPE_NXM;
rom_wr_B (ROM0BASE + origin, val);
}
else if (sim_switches & SWMASK ('S')) { /* ROM1? */
if (origin >= ROMSIZE)
return SCPE_NXM;
rom_wr_B (ROM1BASE + origin, val);
}
else {
if (origin >= limit) /* NXM? */
return SCPE_NXM;
WriteB (origin, val); /* memory */
}
origin = origin + 1;
}
return SCPE_OK;
}
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
t_stat r;
int32 i;
uint32 origin, limit, step = 1;
if (flag) /* dump? */
return SCPE_ARG;
if (sim_switches & SWMASK ('R')) { /* ROM? */
origin = ROMBASE;
limit = ROMBASE + ROMSIZE;
}
else if (sim_switches & SWMASK ('N')) { /* NVR? */
origin = NVRBASE;
limit = NVRBASE + NVRASIZE;
step = 2;
}
else {
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
}
while ((i = getc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */
rom_wr_B (origin, i); /* not writeable */
else WriteB (origin, i); /* store byte */
origin = origin + step;
}
return SCPE_OK;
}