u32 adi_pdd_Write( ADI_DEV_PDD_HANDLE PDDHandle,
ADI_DEV_BUFFER_TYPE BufferType,
ADI_DEV_BUFFER *pBuffer)
{
ADI_DEV_1D_BUFFER *pBuff1D; // buffer pointer
short *psValue; // stores the value to be written to flash
unsigned long *pulAbsoluteAddr; // the absolute address to write
unsigned long ulFlashStartAddr; // flash start address
u32 Result; // error code returned
// cast our buffer to a 1D buffer
pBuff1D = (ADI_DEV_1D_BUFFER*)pBuffer;
// cast our data buffer
psValue = (short *)pBuff1D->Data;
// cast our offset
pulAbsoluteAddr = (unsigned long *)pBuff1D->pAdditionalInfo;
// get flash start address from absolute address
ulFlashStartAddr = GetFlashStartAddress(*pulAbsoluteAddr);
// unlock flash
WriteFlash( ulFlashStartAddr + 0x0AAA, 0xaa );
WriteFlash( ulFlashStartAddr + 0x0554, 0x55 );
WriteFlash( ulFlashStartAddr + 0x0AAA, 0xa0 );
// program our actual value now
Result = WriteFlash( *pulAbsoluteAddr, *psValue );
// make sure the write was successful
Result = PollToggleBit(*pulAbsoluteAddr);
return(Result);
}
u32
EraseNintendoFlashBlocks (u32 StartAddr, u32 BlockCount)
{
int i = 0;
int j, k;
time_t starttime = time (NULL);
for (k = 0; k < (int) BlockCount; k++)
{
i = StartAddr + (k * 32768 * _MEM_INC);
do
{
READ_NTURBO_SR (i, j);
}
while ((j & 0x80) == 0);
WriteFlash (i, SHARP28F_BLOCKERASE); // Erase a 64k byte block
WriteFlash (i, SHARP28F_CONFIRM); // Comfirm block erase
ucon64_gauge (starttime, (k + 1) * 64 * 1024, BlockCount * 64 * 1024);
}
do
{
READ_NTURBO_SR (i, j);
}
while ((j & 0x80) == 0);
WriteFlash (i, SHARP28F_READARRAY); // Set normal read mode
return 1;
}
ERROR_CODE SetRCR ( u16 uwRCR )
{
WriteFlash( uwRCR << 1, 0x60 ); /* RCR setup */
WriteFlash( uwRCR << 1, 0x03 );
ResetFlash();
return NO_ERR;
}
u8
CartTypeDetect (void)
{
u8 type = 0xff;
u16 Manuf, Device;
WriteFlash (_CART_START, INTEL28F_RIC); // Read Identifier codes from flash.
// Works for intel 28F640J3A & Sharp LH28F320BJE.
Manuf = ReadFlash (_CART_START);
Device = ReadFlash (_CART_START + _MEM_INC);
switch (Manuf)
{
case 0: // Hudson Cart
type = 0xdc;
break;
case 0x2e: // Standard ROM
type = (u8) Manuf;
break;
case 0x89: // Intel chips
switch (Device)
{
case 0x16: // i28F320J3A
case 0x17: // i28F640J3A
case 0x18: // i28F128J3A
type = (u8) Device;
break;
default:
// Check to see if this is a Visoly "Turbo" cart
Device = ReadFlash (_CART_START + _MEM_INC + _MEM_INC);
switch (Device)
{
case 0x16: // 2 x i28F320J3A
case 0x17: // 2 x i28F640J3A
case 0x18: // 2 x i28F128J3A
type = Device + 0x80;
break;
}
}
break;
case 0xb0: // Sharp chips
switch (Device)
{
case 0xe2:
type = (u8) Device;
break;
}
break;
}
WriteFlash (_CART_START, INTEL28F_READARRAY); // Set flash to normal read mode
return type;
}
void
WriteRepeat (int addr, int data, int count)
{
int i;
for (i = 0; i < count; i++)
WriteFlash (addr, data);
}
void WriteFlashBytesCommand(void) {
u8 buf[16];
int addr;
int len;
ParseWriteParameters("Flash write", &addr, FlashSize(), buf, &len);
if (len) {WriteFlash(addr, buf, len);}
}
UINT_T FinalizeMRD(void)
{
UINT_T Retval = NoError;
// no valid MRD, fatal error
if (pMRD_valid == NULL)
{
serial_outstr("No valid MRD\n");
zimi_force_minisys(NOVALIDMRD);
FatalError(NOVALIDMRD);
}
// both of the MRDs are OK, no problem
if (pMRD_invalid == NULL)
{
serial_outstr("Primary/Backup MRD are both OK\n");
// reload valid MRD
Retval = ReadFlash(pMRD_valid->FlashEntryAddr, pMRD_valid->LoadAddr, pMRD_valid->ImageSize, BOOT_FLASH);
if (Retval != NoError)
{
zimi_force_minisys(Retval);
FatalError(Retval);
}
return NoError;
}
serial_outstr("Start to write valid MRD to corrupted MRD\n");
// one MRD is OK, the other MRD has problem
// we don't know which one is valid, so, we need to reload valid MRD
Retval = ReadFlash(pMRD_valid->FlashEntryAddr, pMRD_valid->LoadAddr, pMRD_valid->ImageSize, BOOT_FLASH);
if (Retval != NoError)
{
zimi_force_minisys(Retval);
FatalError(Retval);
}
// and then erase invalid MRD
Retval = EraseFlash(pMRD_invalid->FlashEntryAddr, pMRD_invalid->ImageSize, BOOT_FLASH);
if (Retval != NoError)
{
zimi_force_minisys(Retval);
FatalError(Retval);
}
// and then write valid MRD to flash
Retval = WriteFlash(pMRD_invalid->FlashEntryAddr, pMRD_valid->LoadAddr, pMRD_invalid->ImageSize, BOOT_FLASH);
if (Retval != NoError)
{
zimi_force_minisys(Retval);
FatalError(Retval);
}
serial_outstr("Write valid MRD to corrupted MRD Done\n");
return NoError;
}
ERROR_CODE ResetFlash(unsigned long ulAddr)
{
// send the reset command to the flash
WriteFlash( ulAddr + 0x0554, 0xf0 );
// reset should be complete
return NO_ERR;
}
ERROR_CODE GetRCR ( u16* uwRCR )
{
WriteFlash( 0x0000, 0x90 ); /* send the auto select command to the flash */
ReadFlash ( 0x000A, uwRCR ); /* now we can read the RCR */
ResetFlash();
return NO_ERR;
}
/************************************************************************
* DelayedSaveFlash - Save power state and RGB dutycycle 10 seconds after
* last button event
*
* Parameters: none
* Returns: none
************************************************************************/
void DelayedSaveFlash (void)
{
if((!SaveFlashTimer) && WriteFlashFlag) // If counter expires and flash flag set
{
WriteFlashFlag = 0;
PWM8_Stop();
WriteFlash(); // store to Flash
PWM8_Start();
}
}
ERROR_CODE GetCodes(void)
{
WriteFlash ( 0x0000, 0x90 ); /* send the auto select command to the flash */
ReadFlash ( 0x0000, &uwManufactureCode ); /* now we can read the codes */
uwManufactureCode &= 0x00FF;
ReadFlash ( 0x0002, &uwDeviceCode );
uwDeviceCode &= 0xFFFF;
uwRCR_Default = 0xBFCF; /* hardwired to facilitate the test , it may be GetRCR( &RCR_Default ); */
ResetFlash(); /* we need to issue another command to get the part out of auto select mode so issue a reset which just puts the device back in read mode */
return NO_ERR;
}
/************************************************************************
* SetFlashDefaults
*
* Parameters: none
* Returns: none
************************************************************************/
void SetFlashDefaults(void)
{
RamFlashBlock.Dummy = 0x55;
RamFlashBlock.ledChangeRate = 1;
RamFlashBlock.the_state = FIRST_STATE;
RamFlashBlock.ColourCount = 0;
RamFlashBlock.PowerState = 1;
RamFlashBlock.RedDuty = LED_MAX;
RamFlashBlock.BlueDuty = LED_MAX;
RamFlashBlock.GreenDuty = LED_MAX;
WriteFlash();
}
ERROR_CODE EraseFlash(unsigned long ulAddr)
{
ERROR_CODE ErrorCode = NO_ERR; // tells us if there was an error erasing flash
int nBlock = 0; // index for each block to erase
#ifdef LOCK_MAC_ADDR_SECTOR
// do an erase block here because the MAC address is contained
// at address 0x201F8000(0x203F0000 in a memory window) in FLASH
for( nBlock = 0; ( nBlock < (gNumSectors - 1) ) && ( ErrorCode == NO_ERR ); nBlock++ )
ErrorCode = EraseBlock( nBlock, ulAddr );
#else
// erase contents of Flash
WriteFlash( ulAddr + 0x0AAA, 0xaa );
WriteFlash( ulAddr + 0x0554, 0x55 );
WriteFlash( ulAddr + 0x0AAA, 0x80 );
WriteFlash( ulAddr + 0x0AAA, 0xaa );
WriteFlash( ulAddr + 0x0554, 0x55 );
WriteFlash( ulAddr + 0x0AAA, 0x10 );
// poll until the command has completed
ErrorCode = PollToggleBit(ulAddr + 0x0000);
#endif
// erase should be complete
return ErrorCode;
}
ERROR_CODE GetCodes(int *pnManCode, int *pnDevCode, unsigned long ulAddr)
{
unsigned long ulFlashStartAddr; //flash start address
// get flash start address from absolute address
// The ulAddr should ideally be pointing to the flash start
// address. However we just verify it here again.
ulFlashStartAddr = GetFlashStartAddress(ulAddr);
// send the auto select command to the flash
WriteFlash( ulFlashStartAddr + 0x0aaa, 0xaa );
WriteFlash( ulFlashStartAddr + 0x0554, 0x55 );
WriteFlash( ulFlashStartAddr + 0x0aaa, 0x90 );
// now we can read the codes
ReadFlash( ulFlashStartAddr + 0x0000,(unsigned short *)pnManCode );
*pnManCode &= 0x00FF;
ReadFlash( ulFlashStartAddr + 0x0002, (unsigned short *)pnDevCode );
*pnDevCode &= 0x00FF;
if( *pnDevCode == 0x5B )
{
gNumSectors = 19;
pFlashDesc = "S29AL008D(512 x 16)";
}
else
{
gNumSectors = 11;
pFlashDesc = "S29AL004D(256 x 16)";
}
// we need to issue another command to get the part out
// of auto select mode so issue a reset which just puts
// the device back in read mode
ResetFlash(ulAddr);
// ok
return NO_ERR;
}
ERROR_CODE EraseFlash(unsigned long ulAddr)
{
ERROR_CODE ErrorCode = NO_ERR; // tells us if there was an error erasing flash
int nBlock = 0; // index for each block to erase
unsigned long ulFlashStartAddr; // flash start address
// get flash start address from absolute address
// The ulAddr should ideally be pointing to the flash start
// address. However we just verify it here again.
ulFlashStartAddr = GetFlashStartAddress(ulAddr);
// erase contents of Flash
WriteFlash( ulFlashStartAddr + 0x0AAA, 0xaa );
WriteFlash( ulFlashStartAddr + 0x0554, 0x55 );
WriteFlash( ulFlashStartAddr + 0x0AAA, 0x80 );
WriteFlash( ulFlashStartAddr + 0x0AAA, 0xaa );
WriteFlash( ulFlashStartAddr + 0x0554, 0x55 );
WriteFlash( ulFlashStartAddr + 0x0AAA, 0x10 );
// poll until the command has completed
ErrorCode = PollToggleBit(ulFlashStartAddr + 0x0000);
// erase should be complete
return ErrorCode;
}
ERROR_CODE EraseBlock( int nBlock, unsigned long ulAddr )
{
ERROR_CODE ErrorCode = NO_ERR; //tells us if there was an error erasing flash
unsigned long ulSectStart = 0x0; //stores the sector start offset
unsigned long ulSectEnd = 0x0; //stores the sector end offset(however we do not use it here)
unsigned long ulFlashStartAddr; //flash start address
// get flash start address from absolute address
// The ulAddr should ideally be pointing to the flash start
// address. However we just verify it here again.
ulFlashStartAddr = GetFlashStartAddress(ulAddr);
// Get the sector start offset
// we get the end offset too however we do not actually use it for Erase sector
GetSectorStartEnd( &ulSectStart, &ulSectEnd, nBlock );
// send the erase block command to the flash
WriteFlash( (ulFlashStartAddr + 0x0AAA), 0xaa );
WriteFlash( (ulFlashStartAddr + 0x0554), 0x55 );
WriteFlash( (ulFlashStartAddr + 0x0AAA), 0x80 );
WriteFlash( (ulFlashStartAddr + 0x0AAA), 0xaa );
WriteFlash( (ulFlashStartAddr + 0x0554), 0x55 );
// the last write has to be at an address in the block
WriteFlash( (ulFlashStartAddr + ulSectStart), 0x30 );
// poll until the command has completed
ErrorCode = PollToggleBit(ulFlashStartAddr + ulSectStart);
// block erase should be complete
return ErrorCode;
}
u32
WriteNintendoFlashCart (u32 SrcAddr, u32 FlashAddr, u32 Length)
{
int j;
int LoopCount = 0;
u16 *SrcAddr2 = (u16 *)
#ifdef __LP64__
(u64)
#endif
SrcAddr;
while (LoopCount < (int) Length)
{
do
{
READ_NTURBO_SR (FlashAddr, j);
}
while ((j & 0x80) == 0);
WriteFlash (FlashAddr, SHARP28F_WORDWRITE);
WriteFlash (FlashAddr, *SrcAddr2);
SrcAddr2 += 2;
FlashAddr += _MEM_INC;
LoopCount++;
}
do
{
READ_NTURBO_SR (FlashAddr, j);
}
while ((j & 0x80) == 0);
WriteFlash (_CART_START, SHARP28F_READARRAY);
// CTRL_PORT_0;
return 1;
}
ERROR_CODE GetCodes(int *pnManCode, int *pnDevCode, unsigned long ulAddr)
{
// send the auto select command to the flash
WriteFlash( ulAddr + 0x0AAA, 0xaa );
WriteFlash( ulAddr + 0x0554, 0x55 );
WriteFlash( ulAddr + 0x0AAA, 0x90 );
// now we can read the codes
ReadFlash( ulAddr + 0x0400,(unsigned short *)pnManCode );
*pnManCode &= 0x00FF;
ReadFlash( ulAddr + 0x0402, (unsigned short *)pnDevCode );
*pnDevCode &= 0xFFFF;
// if it is the M29W320DB
if( *pnDevCode == 0x22CB )
{
gNumSectors = 67;
pFlashDesc = "STMicro. M29W320DB";
}
else if( *pnDevCode == 0x2257 )
{
gNumSectors = 71;
pFlashDesc = "STMicro. M29W320EB";
}
else
return PROCESS_COMMAND_ERR;
// we need to issue another command to get the part out
// of auto select mode so issue a reset which just puts
// the device back in read mode
ResetFlash(ulAddr);
// ok
return NO_ERR;
}
ERROR_CODE ResetFlash(unsigned long ulAddr)
{
unsigned long ulFlashStartAddr; //flash start address
// get flash start address from absolute address
// The ulAddr should ideally be pointing to the flash start
// address. However we just verify it here again.
ulFlashStartAddr = GetFlashStartAddress(ulAddr);
// send the reset command to the flash
WriteFlash( ulFlashStartAddr + 0x0554, 0xf0 );
// reset should be complete
return NO_ERR;
}
//This cgi uses the routines above to connect to a specific access point with the
//given ESSID using the given password.
int ICACHE_FLASH_ATTR cgiWiFiConnect(HttpdConnData *connData) {
char essid[128];
char passwd[128];
char mqtt_host_ip[64];
static ETSTimer reassTimer;
if (connData->conn==NULL) {
//Connection aborted. Clean up.
return HTTPD_CGI_DONE;
}
httpdFindArg(connData->postBuff, "essid", essid, sizeof(essid));
httpdFindArg(connData->postBuff, "passwd", passwd, sizeof(passwd));
httpdFindArg(connData->postBuff, "mqtthost", mqtt_host_ip, sizeof(mqtt_host_ip));
os_sprintf(ModuleSettings.ssid, "%s", essid);
os_sprintf(ModuleSettings.sta_pwd, "%s", passwd);
//os_sprintf(ModuleSettings.mqtt_host, "%s", mqtt_host_ip);
os_sprintf(ModuleSettings.configured, "%s", "NO");
WriteFlash();
system_restart();
os_strncpy((char*)stconf.ssid, essid, 32);
os_strncpy((char*)stconf.password, passwd, 64);
os_printf("Try to connect to AP %s pw %s\n", essid, passwd);
//Schedule disconnect/connect
os_timer_disarm(&reassTimer);
os_timer_setfn(&reassTimer, reassTimerCb, NULL);
//Set to 0 if you want to disable the actual reconnecting bit
#ifdef DEMO_MODE
httpdRedirect(connData, "/wifi");
#else
os_timer_arm(&reassTimer, 1000, 0);
httpdRedirect(connData, "connecting.html");
#endif
return HTTPD_CGI_DONE;
}
ERROR_CODE EraseBlock( int nBlock, unsigned long ulAddr )
{
ERROR_CODE ErrorCode = NO_ERR; //tells us if there was an error erasing flash
unsigned long ulSectStart = 0x0; //stores the sector start offset
unsigned long ulSectEnd = 0x0; //stores the sector end offset(however we do not use it here)
#ifdef LOCK_MAC_ADDR_SECTOR
if ( (nBlock < 0) || (nBlock > gNumSectors) )
return INVALID_BLOCK;
// we do not allow an erase of the last sector because the
// MAC address is stored at this location
if ( nBlock == (gNumSectors - 1) )
return NO_ACCESS_SECTOR;
#else
if ( (nBlock < 0) || (nBlock > gNumSectors) )
return INVALID_BLOCK;
#endif
// Get the sector start offset
// we get the end offset too however we do not actually use it for Erase sector
GetSectorStartEnd( &ulSectStart, &ulSectEnd, nBlock );
// send the erase block command to the flash
WriteFlash( (ulAddr + 0x0AAA), 0xaa );
WriteFlash( (ulAddr + 0x0554), 0x55 );
WriteFlash( (ulAddr + 0x0AAA), 0x80 );
WriteFlash( (ulAddr + 0x0AAA), 0xaa );
WriteFlash( (ulAddr + 0x0554), 0x55 );
// the last write has to be at an address in the block
WriteFlash( (ulAddr + ulSectStart), 0x30 );
// poll until the command has completed
ErrorCode = PollToggleBit(ulAddr + ulSectStart);
// block erase should be complete
return ErrorCode;
}
void DYNACALL WriteMem_area0(u32 addr,T data)
{
addr &= 0x01FFFFFF;//to get rid of non needed bits
const u32 base=(addr>>16);
//map 0x0000 to 0x001F
if ((base <=0x001F) /*&& (addr<=0x001FFFFF)*/)// :MPX System/Boot ROM
{
//EMUERROR4("Write to [MPX System/Boot ROM] is not possible, addr=%x,data=%x,size=%d",addr,data,sz);
WriteBios(addr,data,sz);
}
//map 0x0020 to 0x0021
else if ((base >=0x0020) && (base <=0x0021) /*&& (addr>= 0x00200000) && (addr<= 0x0021FFFF)*/) // Flash Memory
{
//EMUERROR4("Write to [Flash Memory] , sz?!, addr=%x,data=%x,size=%d",addr,data,sz);
WriteFlash(addr,data,sz);
}
//map 0x0040 to 0x005F -> actually, I'll only map 0x005F to 0x005F, b/c the rest of it is unspammed (left to default handler)
//map 0x005F to 0x005F
else if ( likely(base==0x005F) )
{
if (/*&& (addr>= 0x00400000) */ (addr<= 0x005F67FF)) // Unassigned
{
EMUERROR4("Write to area0_32 not implemented [Unassigned], addr=%x,data=%x,size=%d",addr,data,sz);
}
else if ((addr>= 0x005F7000) && (addr<= 0x005F70FF)) // GD-ROM
{
//EMUERROR4("Write to area0_32 not implemented [GD-ROM], addr=%x,data=%x,size=%d",addr,data,sz);
#if DC_PLATFORM == DC_PLATFORM_NAOMI || DC_PLATFORM == DC_PLATFORM_ATOMISWAVE
WriteMem_naomi(addr,data,sz);
#else
WriteMem_gdrom(addr,data,sz);
#endif
}
else if ( likely((addr>= 0x005F6800) && (addr<=0x005F7CFF)) ) // /*:PVR i/f Control Reg.*/ -> ALL SB registers
{
//EMUERROR4("Write to area0_32 not implemented [PVR i/f Control Reg], addr=%x,data=%x,size=%d",addr,data,sz);
sb_WriteMem(addr,data,sz);
}
else if ( likely((addr>= 0x005F8000) && (addr<=0x005F9FFF)) ) // TA / PVR Core Reg.
{
//EMUERROR4("Write to area0_32 not implemented [TA / PVR Core Reg], addr=%x,data=%x,size=%d",addr,data,sz);
verify(sz==4);
pvr_WriteReg(addr,data);
}
}
//map 0x0060 to 0x0060
else if ((base ==0x0060) /*&& (addr>= 0x00600000)*/ && (addr<= 0x006007FF)) // MODEM
{
//EMUERROR4("Write to area0_32 not implemented [MODEM], addr=%x,data=%x,size=%d",addr,data,sz);
libExtDevice_WriteMem_A0_006(addr,data,sz);
}
//map 0x0060 to 0x006F
else if ((base >=0x0060) && (base <=0x006F) && (addr>= 0x00600800) && (addr<= 0x006FFFFF)) // G2 (Reserved)
{
EMUERROR4("Write to area0_32 not implemented [G2 (Reserved)], addr=%x,data=%x,size=%d",addr,data,sz);
}
//map 0x0070 to 0x0070
else if ((base >=0x0070) && (base <=0x0070) /*&& (addr>= 0x00700000)*/ && (addr<=0x00707FFF)) // AICA- Sound Cntr. Reg.
{
//EMUERROR4("Write to area0_32 not implemented [AICA- Sound Cntr. Reg], addr=%x,data=%x,size=%d",addr,data,sz);
WriteMem_aica_reg(addr,data,sz);
return;
}
//map 0x0071 to 0x0071
else if ((base >=0x0071) && (base <=0x0071) /*&& (addr>= 0x00710000)*/ && (addr<= 0x0071000B)) // AICA- RTC Cntr. Reg.
{
//EMUERROR4("Write to area0_32 not implemented [AICA- RTC Cntr. Reg], addr=%x,data=%x,size=%d",addr,data,sz);
WriteMem_aica_rtc(addr,data,sz);
return;
}
//map 0x0080 to 0x00FF
else if ((base >=0x0080) && (base <=0x00FF) /*&& (addr>= 0x00800000) && (addr<=0x00FFFFFF)*/) // AICA- Wave Memory
{
//EMUERROR4("Write to area0_32 not implemented [AICA- Wave Memory], addr=%x,data=%x,size=%d",addr,data,sz);
//aica_writeram(addr,data,sz);
WriteMemArrRet(aica_ram.data,addr&ARAM_MASK,data,sz);
return;
}
//map 0x0100 to 0x01FF
else if ((base >=0x0100) && (base <=0x01FF) /*&& (addr>= 0x01000000) && (addr<= 0x01FFFFFF)*/) // Ext. Device
{
//EMUERROR4("Write to area0_32 not implemented [Ext. Device], addr=%x,data=%x,size=%d",addr,data,sz);
libExtDevice_WriteMem_A0_010(addr,data,sz);
}
return;
}
ERROR_CODE GetCodes(int *pnManCode, int *pnDevCode, unsigned long ulAddr)
{
unsigned long ulFlashStartAddr; //flash start address
// get flash start address from absolute address
// The ulAddr should ideally be pointing to the flash start
// address. However we just verify it here again.
ulFlashStartAddr = GetFlashStartAddress(ulAddr);
// send the auto select command to the flash
// WriteFlash( ulFlashStartAddr + 0x0AAA, 0xaa );
// WriteFlash( ulFlashStartAddr + 0x0554, 0x55 );
// WriteFlash( ulFlashStartAddr + 0x0AAA, 0x90 );
WriteFlash( ulFlashStartAddr + 2*0x0555, 0xaa );
WriteFlash( ulFlashStartAddr + 2*0x02aa, 0x55 );
WriteFlash( ulFlashStartAddr + 2*0x0555, 0x90 );
// now we can read the codes
// ReadFlash( ulFlashStartAddr + 0x0402, (unsigned short *)pnManCode );
ReadFlash( ulFlashStartAddr + 2*0x0000, (unsigned short *)pnManCode );
*pnManCode &= 0x00FF;
// ReadFlash( ulFlashStartAddr + 0x0400, (unsigned short *)pnDevCode );
ReadFlash( ulFlashStartAddr + 2*0x0001, (unsigned short *)pnDevCode );
*pnDevCode &= 0xFFFF;
// ReadFlash( 0x1ffffffc, (unsigned short *)pnDevCode );
// *pnDevCode &= 0xFFFF;
// we need to issue another command to get the part out
// of auto select mode so issue a reset which just puts
// the device back in read mode
ResetFlash(ulAddr);
ResetFlash(ulAddr);
return NO_ERR;
WriteFlash( ulFlashStartAddr + 2*0x0055, 0x98 );
unsigned long int a=0, b=0, c=0, d=0;
// ReadFlash( ulFlashStartAddr + 2*0x10, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x11, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x12, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x13, (unsigned short *) &d );
// ReadFlash( ulFlashStartAddr + 2*0x40, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x41, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x42, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x43, (unsigned short *) &d );
// ReadFlash( ulFlashStartAddr + 2*0x27, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x28, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x29, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x4e, (unsigned short *) &d );
// ReadFlash( ulFlashStartAddr + 2*0x61, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x62, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x63, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x64, (unsigned short *) &d );
// ReadFlash( ulFlashStartAddr + 2*0x2d, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x2e, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x2f, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x30, (unsigned short *) &d );
ReadFlash( ulFlashStartAddr + 2*0x31, (unsigned short *) &a );
// ReadFlash( ulFlashStartAddr + 2*0x32, (unsigned short *) &b );
// ReadFlash( ulFlashStartAddr + 2*0x33, (unsigned short *) &c );
// ReadFlash( ulFlashStartAddr + 2*0x34, (unsigned short *) &d );
a &= 0xFFFF; b &= 0xFFFF; c &= 0xFFFF; d &= 0xFFFF;
// a &= 0xFF; b &= 0xFF; c &= 0xFF; d &= 0xFF;
// *pnDevCode = a<<24 + b<<26 + c<<8 + d;
// *pnDevCode = a*16777216 + b*65536 + c*256 + d;
// *pnDevCode = a*65536 + b;
// *pnDevCode = c*65536 + d;
// *pnDevCode = d;
*pnDevCode = a;
// *pnDevCode &= 0xFFFF;
/* while(1) {
WriteFlash( ulFlashStartAddr + 2*0x0055, 0x98 );
ReadFlash( ulFlashStartAddr + 2*0x34, (unsigned short *) &a );
a &= 0xFFFF;
ResetFlash(ulAddr);
WriteFlash( ulFlashStartAddr + 2*0x34, a );
ResetFlash(ulAddr);
}
*/
ResetFlash(ulAddr);
ResetFlash(ulAddr);
// ok
return NO_ERR;
}
u32
WriteTurboFACart (u32 SrcAddr, u32 FlashAddr, u32 Length)
{
int i, k;
int done1, done2;
int Timeout;
int Ready = 0;
int LoopCount = 0;
u16 *SrcAddr2 = (u16 *)
#ifdef __LP64__
(u64)
#endif
SrcAddr;
while (LoopCount < (int) Length)
{
done1 = 0;
done2 = 0;
Ready = 0;
Timeout = 0x4000;
while ((!Ready) && (Timeout != 0))
{
if (done1 == 0)
WriteFlash (FlashAddr, INTEL28F_WRTOBUF);
if (done2 == 0)
WriteFlash (FlashAddr + _MEM_INC, INTEL28F_WRTOBUF);
SET_CART_ADDR (FlashAddr);
READ_TURBO_S2 (FlashAddr, done1, done2);
Ready = ((done1 + done2) == 0x100);
Timeout--;
}
if (Ready)
{
WriteFlash (FlashAddr, 15); // Write 15+1 16bit words
WRITE_FLASH_NEXT (FlashAddr + _MEM_INC, 15); // Write 15+1 16bit words
SET_CART_ADDR (FlashAddr);
for (i = 0; i < 32; i++)
{
WRITE_FLASH_NEXT (FlashAddr, *SrcAddr2);
SrcAddr2 += 2;
FlashAddr += _MEM_INC;
}
WRITE_FLASH_NEXT (FlashAddr, INTEL28F_CONFIRM);
WRITE_FLASH_NEXT (FlashAddr + _MEM_INC, INTEL28F_CONFIRM);
Ready = 0;
Timeout = 0x4000;
k = 0;
while (((k & 0x8080) != 0x8080) && (Timeout != 0))
{
READ_TURBO_S (k);
Ready = (k == 0x8080);
Timeout--;
}
if (!Ready)
break;
}
else
break;
LoopCount++;
}
WriteFlash (_CART_START, INTEL28F_READARRAY);
CTRL_PORT_0;
WriteFlash (_CART_START + _MEM_INC, INTEL28F_READARRAY);
CTRL_PORT_0;
if (!Ready)
{
WriteFlash (_CART_START, INTEL28F_CLEARSR);
WriteFlash (_CART_START + _MEM_INC, INTEL28F_CLEARSR);
}
return Ready != 0;
}
u32
WriteNonTurboFACart (u32 SrcAddr, u32 FlashAddr, u32 Length)
{
int Ready = 0;
int Timeout = 0;
int LoopCount = 0;
u16 *SrcAddr2 = (u16 *)
#ifdef __LP64__
(u64)
#endif
SrcAddr;
while (LoopCount < (int) Length)
{
Ready = 0;
Timeout = FP_TIMEOUT1;
while ((Ready == 0) && (Timeout != 0))
{
WriteFlash (FlashAddr, INTEL28F_WRTOBUF);
READ_NTURBO_S (Ready);
Ready &= 0x80;
Timeout--;
}
if (Ready)
{
int i;
WriteFlash (FlashAddr, 15); // Write 15+1 16bit words
SET_CART_ADDR (FlashAddr);
for (i = 0; i < 16; i++)
{
WRITE_FLASH_NEXT (FlashAddr, *SrcAddr2);
SrcAddr2 += 2;
FlashAddr += _MEM_INC;
}
WRITE_FLASH_NEXT (FlashAddr, INTEL28F_CONFIRM);
Ready = 0;
Timeout = FP_TIMEOUT1;
while ((Ready == 0) && (Timeout != 0))
{
READ_NTURBO_SR (_CART_START, i);
Ready = i & 0x80;
Timeout--;
}
if (Ready)
{
if (i & 0x7f)
{
// One or more status register error bits are set
CTRL_PORT_1;
WriteFlash (0, INTEL28F_CLEARSR);
Ready = 0;
break;
}
}
else
{
CTRL_PORT_1;
WriteFlash (0, INTEL28F_CLEARSR);
break;
}
}
else
{
break;
}
LoopCount++;
}
WriteFlash (_CART_START, INTEL28F_READARRAY); // Set flash to normal read mode
WriteFlash (_CART_START, INTEL28F_READARRAY); // Set flash to normal read mode
return Ready != 0;
}
u32
EraseTurboFABlocks (u32 StartAddr, u32 BlockCount)
{
u16 j, k;
u16 done1, done2;
u16 Ready = 1;
u32 i = 0;
u32 Timeout;
time_t starttime = time (NULL);
for (k = 0; k < BlockCount; k++)
{
i = StartAddr + (k * 131072 * _MEM_INC);
Ready = 0;
Timeout = FP_TIMEOUT2;
while ((!Ready) && (Timeout != 0))
{
READ_TURBO_SR (j);
Ready = (j == 0x8080);
Timeout--;
}
if (Ready)
{
done1 = 0;
done2 = 0;
Ready = 0;
Timeout = FP_TIMEOUT3;
while ((!Ready) && (Timeout != 0))
{
if (done1 == 0)
WriteFlash (i, INTEL28F_BLOCKERASE); // Erase a 128k byte block in flash #1
if (done2 == 0)
WriteFlash (i + _MEM_INC, INTEL28F_BLOCKERASE); // Erase a 128k byte block in flash #2
READ_TURBO_S2 (_CART_START, done1, done2);
Ready = ((done1 + done2) == 0x100);
Timeout--;
}
if (Ready)
{
WriteFlash (i, INTEL28F_CONFIRM); // Comfirm block erase in flash #1
WriteFlash (i + _MEM_INC, INTEL28F_CONFIRM); // Comfirm block erase in flash #2
Ready = 0;
Timeout = FP_TIMEOUT3;
j = 0;
while (((j & 0x8080) != 0x8080) && (Timeout != 0))
{
READ_TURBO_S (j);
Ready = (j == 0x8080);
Timeout--;
}
if (!Ready)
break;
}
else
break;
}
else
break;
ucon64_gauge (starttime, (k + 1) * 256 * 1024,
BlockCount * 256 * 1024);
}
if (!Ready)
{
WriteFlash (i, INTEL28F_CLEARSR);
WriteFlash (i + _MEM_INC, INTEL28F_CLEARSR);
}
WriteFlash (_CART_START, INTEL28F_READARRAY);
WriteFlash (_CART_START + _MEM_INC, INTEL28F_READARRAY);
WriteFlash (_CART_START, INTEL28F_READARRAY);
WriteFlash (_CART_START + _MEM_INC, INTEL28F_READARRAY);
return Ready != 0;
}
u32
EraseNonTurboFABlocks (u32 StartAddr, u32 BlockCount)
{
u16 k;
u16 Ready = 1;
u32 i = 0;
u32 Timeout;
time_t starttime = time (NULL);
for (k = 0; k < BlockCount; k++)
{
i = StartAddr + (k * 65536 * _MEM_INC);
Ready = 0;
Timeout = FP_TIMEOUT2;
while ((Ready == 0) && (Timeout != 0))
{
READ_NTURBO_SR (_CART_START, Ready);
Ready &= 0x80;
Timeout--;
}
if (Ready)
{
WriteFlash (i, INTEL28F_BLOCKERASE); // Erase a 128k byte block
Ready = 0;
Timeout = FP_TIMEOUT3;
while ((!Ready) && (Timeout != 0))
{
READ_NTURBO_S (Ready);
Ready = (Ready == 0x80);
Timeout--;
}
if (Ready)
{
WriteFlash (i, INTEL28F_CONFIRM); // Comfirm block erase
Ready = 0;
Timeout = FP_TIMEOUT3;
while ((!Ready) && (Timeout != 0))
{
READ_NTURBO_S (Ready);
Ready = (Ready == 0x80);
Timeout--;
}
if (Ready)
{
READ_NTURBO_SR (_CART_START, Ready);
Ready = (Ready == 0x80);
if (!Ready)
break;
}
else
break;
}
else
break;
}
else
break;
ucon64_gauge (starttime, (k + 1) * 128 * 1024,
BlockCount * 128 * 1024);
}
if (!Ready)
{
WriteFlash (i, INTEL28F_CLEARSR); // Clear flash status register
}
WriteFlash (i, INTEL28F_READARRAY); // Set flash to normal read mode
WriteFlash (i, INTEL28F_READARRAY); // Set flash to normal read mode
return Ready != 0;
}
int main(void)
{
int nCounter = 0; //給Beep Loop用的Counter
//初始化參數
u8gLCD_BOOT = 1;
u32NeedWriteFlash = 0;
u32ADC = POWER_LOWEST_ADC + 100; //檢查電源用的參數，電不夠時把馬達動作變小。
u8MotorSuspended = 0; //看看馬達是不是在暫停狀態
//正式程式碼，開始初始化動作。
SysCLK_config_clock_select(0); // 配置時鐘
EL_Init();
ADC_Init();
//讀取CPU ID
u32IAP_ReadUID(uid);
sn = uid[0] + uid[1] +uid[2] +uid[3];
//讀取記憶的速度
memset(BufferFlash, 0x0, IAP_FLASH_PAGE_SIZE_BYTES);
u32IAP_ReadUserDataFlash(BufferFlash, IAP_FLASH_PAGE_SIZE_BYTES);
memcpy(BackupBuffer, BufferFlash,IAP_FLASH_PAGE_SIZE_BYTES);
BeeperInit();
HallInit();
KeyInit();
PWMInit(); // For motor control voltage.
WDT_Enable(); //Enable the watch dog.
InitialTimeTick(TIME_TICK_NUMBER);
while(u8gLCD_BOOT != 0);
//time tic 開始後就會叫callback, 此時LCD及Beeper，KeyBounce要初始完成。
u32ADC = ADC_Read();
if(u32ADC > POWER_LOWEST_ADC && u32ADC != 0)
{
LCD_Init(); // LCD update
for(nCounter = 0 ; nCounter < 2; nCounter++)
{
BeepMillisecondsAndWait(500);
WDTFeed();
}
}
else
{
//如果一開始就電量不足，在閃一下後，就離開，等下次初始化。
EL_OnOff();
delay_us(1000);
EL_OnOff();
delay_us(1000);
return 0;
}
StatusInit();
nCounter = 0;
while(sn % 1000 != UID)
{
#ifndef PROGRAMING
BeepMillisecondsAndWait(500);
#endif
WDTFeed();
}
if( !(GPIO2->DATA & (1 << 1)) && !(GPIO0->DATA & (1 << 5)))
{
while(1)
{
WDTFeed();// Feed Dog.
}
}
while(1)
{
WDTFeed();// Feed Dog.
u32ADC = ADC_Read();
PWM_CheckSuspend(u32ADC);
WDTFeed();// Feed Dog.
ProcessHall();
Status_ProcessKey(GetKey());
WriteFlash();
}
}
int BootLoaderProcessCommand( BootLoaderGlobals_t *globals, I2C_Data_t *packet )
{
uint8_t cmd = packet->m_data[ 0 ];
BOOT_LOG2( "ProcessCommand: 0x%02x, len:%d\n", cmd, packet->m_len );
// Using explicit if tests instead of a switch statement saves us 28 bytes.
// Note: For write requests, the length will include the CRC. m_crc
// will be equal to zero if the CRC passed.
if ( cmd == BL_REG_GET_INFO )
{
BootLoaderInfo_t *info = (BootLoaderInfo_t *)&packet->m_data[ 1 ];
BOOT_LOG0( "BL_REG_GET_INFO\n" );
memcpy_EP( info, addr32( info_P ), sizeof( *info ));
info->devAddr = gEeprom.i2cAddr;
packet->m_data[ 0 ] = sizeof( *info );
// We've received a command. Set the StayInBootLoader flag since the
// master now has control
gStayInBootloader = 1;
return sizeof( *info ) + 1; // + 1 for len
}
if ( cmd == BL_REG_READ_DATA )
{
// The Read command is implemented using Process-Call-Block, so the CRC is
// sent by us in the response we send back to the master
BootLoaderRead_t *req;
BL_Addr_t addr;
uint8_t numBytes;
uint8_t memType;
uint8_t *replyData;
// Read request
req = (BootLoaderRead_t *)&packet->m_data[ 2 ] ; // +1 for cmd, +1 for len
addr.byte[ 0 ] = req->addr.byte[ 0 ];
addr.byte[ 1 ] = req->addr.byte[ 1 ];
addr.byte[ 2 ] = req->addr.byte[ 2 ];
addr.byte[ 3 ] = 0;
memType = req->addr.byte[ 3 ] & BL_MEM_TYPE_MASK;
numBytes = req->len;
if ( numBytes > BL_MAX_DATA_BYTES )
{
numBytes = BL_MAX_DATA_BYTES;
}
BOOT_LOG1( "BL_REG_READ_DATA: Reading %d bytes\n", numBytes );
BOOT_LOG2( "BL_REG_READ_DATA: memAddr of 0x%02x%02x\n", addr.byte[ 1 ], addr.byte[ 0 ]);
packet->m_data[ 0 ] = numBytes;
replyData = &packet->m_data[ 1 ]; // +1 for len
if ( memType == BL_MEM_TYPE_FLASH )
{
memcpy_EP( replyData, addr.val32, numBytes );
}
else
if ( memType == BL_MEM_TYPE_EEPROM )
{
eeprom_read_block( replyData, (void *)addr.val16, numBytes );
}
else
if ( memType == BL_MEM_TYPE_SRAM )
{
memcpy( replyData, (void *)addr.val16, numBytes );
}
else
{
return 0;
}
return packet->m_data[ 0 ] + 1 ; // +1 for len
}
if ( cmd == BL_REG_WRITE_DATA )
{
I2C_CRC( if ( packet->m_crc == 0 ) )
{
// Write request
BootLoaderWrite_t *req;
BL_Addr_t addr;
uint8_t numBytes;
uint8_t memType;
req = (BootLoaderWrite_t *)&packet->m_data[ 2 ]; // +1 for cmd, +1 for len
addr.byte[ 0 ] = req->addr.byte[ 0 ];
addr.byte[ 1 ] = req->addr.byte[ 1 ];
addr.byte[ 2 ] = req->addr.byte[ 2 ];
addr.byte[ 3 ] = 0;
memType = req->addr.byte[ 3 ] & BL_MEM_TYPE_MASK;
numBytes = packet->m_data[ 1 ] - offsetof( BootLoaderWrite_t, data[0] );
if ( numBytes > BL_MAX_DATA_BYTES )
{
numBytes = BL_MAX_DATA_BYTES;
}
BOOT_LOG1( "BL_REG_WRITE_DATA: Writing %d bytes\n", numBytes );
BOOT_LOG2( "BL_REG_WRITE_DATA: memAddr of 0x%02x%02x\n", addr.byte[ 1 ], addr.byte[ 0 ]);
if ( memType == BL_MEM_TYPE_FLASH )
{
#if STANDALONE
BOOT_LOG0( "Flash write faked out\n" );
#else
WriteFlash( globals, &req->data[0], addr.val32, numBytes );
#endif
}
else
if ( memType == BL_MEM_TYPE_EEPROM )
{
eeprom_write_block( &req->data[0], (void *)addr.val16, numBytes );
}
else
if ( memType == BL_MEM_TYPE_SRAM )
{
memcpy( (void *)addr.val16, &req->data[0], numBytes );
}
return 0;
}
}
ERROR_CODE ResetFlash(void)
{
WriteFlash ( 0x0000, 0xFF ); /* send the reset command to the flash */
return NO_ERR;
}
