/**
* \brief Initializes the UartDma structure and the corresponding UART & DMA hardware.
* select value.
* The driver will uses DMA channel 0 for RX and DMA channel 1 for TX.
* The DMA channels are freed automatically when no UART command processing.
*
* \param pUartd Pointer to a UartDma instance.
* \param pUartHw Associated UART peripheral.
* \param uartId UART peripheral identifier.
* \param uartMode UART peripheral identifier.*
* \param baud UART baud rate
* \param clk UART ref clock
* \param pXdmad Pointer to a Dmad instance.
*/
uint32_t UARTD_Configure( UartDma *pUartd ,
Uart *pUartHw ,
uint8_t uartId,
uint32_t uartMode,
uint32_t baud,
uint32_t clk,
sXdmad *pXdmad )
{
/* Initialize the UART structure */
pUartd->pUartHw = pUartHw;
pUartd->uartId = uartId;
pUartd->pXdmad = pXdmad;
/* Enable the UART Peripheral ,Execute a software reset of the UART, Configure UART in Master Mode*/
UART_Configure ( pUartHw, uartMode, baud, clk);
/* Enables the USART to transfer data. */
UART_SetTransmitterEnabled ( pUartHw , 1);
/* Enables the USART to receive data. */
UART_SetReceiverEnabled ( pUartHw , 1);
/* Driver initialize */
XDMAD_Initialize( pUartd->pXdmad, 0 );
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_SetPriority( XDMAC_IRQn ,1);
return 0;
}
/**
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize(&dmad, 0);
/* IRQ configure */
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for USART */
usartDmaTxChannel = XDMAD_AllocateChannel(pDmad, XDMAD_TRANSFER_MEMORY,
ID_USART);
usartDmaRxChannel = XDMAD_AllocateChannel(pDmad, ID_USART,
XDMAD_TRANSFER_MEMORY);
/* Set RX callback */
XDMAD_SetCallback(pDmad, usartDmaRxChannel,
(XdmadTransferCallback)_UsDmaRxCallback,
0);
/* Set TX callback */
XDMAD_SetCallback(pDmad, usartDmaTxChannel,
(XdmadTransferCallback)_UsDmaTxCallback,
0);
XDMAD_PrepareChannel(pDmad, usartDmaRxChannel);
XDMAD_PrepareChannel(pDmad, usartDmaTxChannel);
}
/**
* \brief This function initialize the appropriate DMA channel for Rx/Tx channel of SPI or SMC
* \returns 0 if the transfer has been started successfully; otherwise returns
* ILI9488_ERROR_XX is the driver is in use, or ILI9488_ERROR_XX if the command is not
* valid.
*/
static uint8_t _ILI9488DmaConfigChannels(void)
{
uint32_t srcType,dstType;
/* Driver initialize */
XDMAD_Initialize( ili9488Dma.xdmaD, 0 );
XDMAD_FreeChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel);
XDMAD_FreeChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel);
#if !defined(BOARD_LCD_SMC)
srcType = XDMAD_TRANSFER_MEMORY;
dstType = ili9488Dma.spiId;
#else
srcType = XDMAD_TRANSFER_MEMORY;
dstType = XDMAD_TRANSFER_MEMORY;
#endif
/* Allocate a DMA channel for ILI9488_SPI TX. */
ili9488Dma.ili9488DmaTxChannel = XDMAD_AllocateChannel( ili9488Dma.xdmaD, srcType, dstType);
{
if ( ili9488Dma.ili9488DmaTxChannel == XDMAD_ALLOC_FAILED )
{
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
}
}
/* Allocate a DMA channel for ILI9488_SPI RX. */
ili9488Dma.ili9488DmaRxChannel = XDMAD_AllocateChannel( ili9488Dma.xdmaD, dstType, srcType);
{
if ( ili9488Dma.ili9488DmaRxChannel == XDMAD_ALLOC_FAILED )
{
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
}
}
/* Setup callbacks for ILI9488_SPI RX */
XDMAD_SetCallback(ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel, (XdmadTransferCallback)_ILI9488_Rx_CB, &ili9488Dma);
if (XDMAD_PrepareChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel ))
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
/* Setup callbacks for ILI9488_SPI TX (ignored) */
XDMAD_SetCallback(ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel, (XdmadTransferCallback)_ILI9488_Tx_CB, &ili9488Dma);
if ( XDMAD_PrepareChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel ))
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
/* Check if DMA IRQ is enable; if not Enable it */
if(!(NVIC_GetActive(XDMAC_IRQn)))
{
/* Enable interrupt */
NVIC_EnableIRQ(XDMAC_IRQn);
}
return 0;
}
/**
* \brief xDMA driver configuration
*/
static void _ConfigureDma( void )
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize( pDmad, 0 );
/* Allocate DMA channels for PWM */
pwmDmaTxChannel = XDMAD_AllocateChannel( pDmad, XDMAD_TRANSFER_MEMORY, ID_PWM0);
if (pwmDmaTxChannel == XDMAD_ALLOC_FAILED )
{
printf("xDMA channel allocation error\n\r");
while(1);
}
XDMAD_PrepareChannel(pDmad, pwmDmaTxChannel );
/* Configure interrupt for DMA transfer */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_SetPriority( XDMAC_IRQn ,1);
NVIC_EnableIRQ(XDMAC_IRQn);
}
/**
* \brief DMA driver configuration
*/
static void Dma_configure(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize( pDmad, 0 );
/* Configure TWI interrupts */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for SSC */
sscDmaTxChannel = XDMAD_AllocateChannel( pDmad, XDMAD_TRANSFER_MEMORY, ID_SSC);
sscDmaRxChannel = XDMAD_AllocateChannel( pDmad, ID_SSC, XDMAD_TRANSFER_MEMORY);
if ( sscDmaTxChannel == XDMAD_ALLOC_FAILED || sscDmaRxChannel == XDMAD_ALLOC_FAILED )
{
printf("xDMA channel allocation error\n\r");
while(1);
}
XDMAD_PrepareChannel(pDmad, sscDmaTxChannel );
XDMAD_PrepareChannel(pDmad, sscDmaRxChannel );
}
/**
* Initialize driver instances.
*/
static void _ConfigureDrivers(void)
{
uint32_t i;
/* Initialize the DMA driver */
XDMAD_Initialize(&dmaDrv,0);
NVIC_EnableIRQ( XDMAC_IRQn );
/* Initialize the HSMCI driver */
MCID_Init(&mciDrv[0], HSMCI, ID_HSMCI, BOARD_MCK, &dmaDrv, 0 ) ;
NVIC_EnableIRQ( HSMCI_IRQn );
/* Initialize SD driver */
for (i = 0; i < BOARD_NUM_MCI; i ++)
{
SDD_InitializeSdmmcMode(&sdDrv[i], &mciDrv[i], 0);
}
}
/**
* \brief Configure the DMA Channels: 0 RX.
* Channels are disabled after configure.
* \returns 0 if the dma channel configuration successfully; otherwise returns
* DAC_ERROR_XXX.
*/
static uint8_t _DacConfigureDmaChannels(DacDma *pDacd)
{
/* Driver initialize */
XDMAD_Initialize(pDacd->pXdmad, 0);
XDMAD_FreeChannel(pDacd->pXdmad, dacDmaTxChannel);
/* Allocate a DMA channel for DAC0/1 TX. */
dacDmaTxChannel =
XDMAD_AllocateChannel(pDacd->pXdmad, XDMAD_TRANSFER_MEMORY, ID_DACC);
if (dacDmaTxChannel == XDMAD_ALLOC_FAILED)
return DAC_ERROR;
if (XDMAD_PrepareChannel(pDacd->pXdmad, dacDmaTxChannel))
return DAC_ERROR;
return DAC_OK;
}
/**
* \brief Configure the DMA Channels: 0 RX, 1 TX.
* Channels are disabled after configure.
* \returns 0 if the dma channel configuration successfully; otherwise returns
* SPID_ERROR_XXX.
*/
static uint8_t _spid_configureDmaChannels( Spid* pSpid )
{
/* Driver initialize */
XDMAD_Initialize( pSpid->pXdmad, 0 );
XDMAD_FreeChannel( pSpid->pXdmad, spiDmaTxChannel);
XDMAD_FreeChannel( pSpid->pXdmad, spiDmaRxChannel);
/* Allocate a DMA channel for SPI0/1 TX. */
spiDmaTxChannel = XDMAD_AllocateChannel( pSpid->pXdmad, XDMAD_TRANSFER_MEMORY, pSpid->spiId);
{
if ( spiDmaTxChannel == XDMAD_ALLOC_FAILED )
{
return SPID_ERROR;
}
}
/* Allocate a DMA channel for SPI0/1 RX. */
spiDmaRxChannel = XDMAD_AllocateChannel( pSpid->pXdmad, pSpid->spiId, XDMAD_TRANSFER_MEMORY);
{
if ( spiDmaRxChannel == XDMAD_ALLOC_FAILED )
{
return SPID_ERROR;
}
}
/* Setup callbacks for SPI0/1 RX */
XDMAD_SetCallback(pSpid->pXdmad, spiDmaRxChannel, (XdmadTransferCallback)SPID_Rx_Cb, pSpid);
if (XDMAD_PrepareChannel( pSpid->pXdmad, spiDmaRxChannel ))
return SPID_ERROR;
/* Setup callbacks for SPI0/1 TX (ignored) */
XDMAD_SetCallback(pSpid->pXdmad, spiDmaTxChannel, NULL, NULL);
if ( XDMAD_PrepareChannel( pSpid->pXdmad, spiDmaTxChannel ))
return SPID_ERROR;
return 0;
}
/*
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
/* Driver initialize */
XDMAD_Initialize(&dmad, 0);
/* Allocate XDMA channels for USART */
usartDmaTxChannel = XDMAD_AllocateChannel(&dmad, XDMAD_TRANSFER_MEMORY, ID_USART);
usartDmaRxChannel = XDMAD_AllocateChannel(&dmad, ID_USART, XDMAD_TRANSFER_MEMORY);
if (usartDmaTxChannel == XDMAD_ALLOC_FAILED ||
usartDmaRxChannel == XDMAD_ALLOC_FAILED) {
printf("XDMA channel allocat failed!\n\r");
while (1);
}
/* Set RX callback */
XDMAD_SetCallback(&dmad, usartDmaRxChannel,(XdmadTransferCallback)_DmaRxCallback, 0);
/* Set TX callback */
XDMAD_SetCallback(&dmad, usartDmaTxChannel,(XdmadTransferCallback)_DmaTxCallback, 0);
XDMAD_PrepareChannel(&dmad, usartDmaRxChannel);
XDMAD_PrepareChannel(&dmad, usartDmaTxChannel);
}
/**
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize(pDmad, 0);
/* IRQ configure */
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for SSC */
sscDmaTxChannel = XDMAD_AllocateChannel(pDmad, XDMAD_TRANSFER_MEMORY, ID_SSC);
if ( sscDmaTxChannel == XDMAD_ALLOC_FAILED) {
printf("xDMA channel allocation error\n\r");
while (1);
}
/* Set TX callback */
XDMAD_SetCallback(pDmad, sscDmaTxChannel, (XdmadTransferCallback)_SscTxCallback,
0);
XDMAD_PrepareChannel(pDmad, sscDmaTxChannel);
}
/**
* \brief Initializes the UartDma structure and the corresponding UART & DMA .
* hardware select value.
* The driver will uses DMA channel 0 for RX and DMA channel 1 for TX.
* The DMA channels are freed automatically when no UART command processing.
*
* \param pUartd Pointer to a UartDma instance.
* \param pUartHw Associated UART peripheral.
* \param uartId UART peripheral identifier.
* \param uartMode UART peripheral identifier.*
* \param baud UART baud rate
* \param clk UART ref clock
* \param pXdmad Pointer to a Dmad instance.
*/
uint32_t UARTD_Configure( UartDma *pUartd ,
uint8_t uartId,
uint32_t uartMode,
uint32_t baud,
uint32_t clk)
{
/* Enable the peripheral clock in the PMC*/
PMC_EnablePeripheral( uartId );
/* Initialize the UART structure */
pUartd->uartId = uartId;
if (uartId == ID_UART0)
pUartd->pUartHw = UART0;
if (uartId == ID_UART1)
pUartd->pUartHw = UART1;
if (uartId == ID_UART2)
pUartd->pUartHw = UART2;
if (uartId == ID_UART3)
pUartd->pUartHw = UART3;
if (uartId == ID_UART4)
pUartd->pUartHw = UART4;
pUartd->pXdmad->pXdmacs = XDMAC;
/* Enable the UART Peripheral ,Execute a software reset of the UART,
Configure UART in Master Mode*/
UART_Configure ( pUartd->pUartHw, uartMode, baud, clk);
/* Driver initialize */
XDMAD_Initialize( pUartd->pXdmad, 0 );
/* Check if DMA IRQ is enable; if not clear pending IRQs in init it */
if(!(NVIC_GetActive(XDMAC_IRQn))) {
NVIC_ClearPendingIRQ(XDMAC_IRQn);
}
return 0;
}
// =============================================================================
// 功能: SPI默认硬件初始化配置，主要是时钟配置和GPIO写保护引脚配置
// 参数: RegBaseAddr,寄存器基址
// 返回: 无
// =============================================================================
static void __SPI_HardConfig(u32 BaseAddr)
{
tagSpiReg *Reg;
u32 temp,Fre;
Reg = (tagSpiReg *)BaseAddr;
XDMAD_Initialize(&dmad,0);
Reg->SPI_CR = SPI_CR_SPIDIS|SPI_CR_SWRST; //复位控制器
Reg->SPI_MR = SPI_MR_MSTR|SPI_MR_MODFDIS|QSPI_MR_NBBITS_8_BIT;
//默认使用4M波特率
Fre = 4*1000*1000;
for(temp = 0; temp < 4; temp ++)
{
Reg->SPI_CSR[temp] = SPI_CSR_CSAAT|SPI_CSR_SCBR(CN_CFG_MCLK/2/Fre);
}
//使用DMA方式
// __SPI_DmaConfig(BaseAddr);
Reg->SPI_CR = SPI_CR_SPIEN;
}
/**
* \brief Initializes the USARTDma structure and the corresponding USART & DMA hardware.
* select value.
* The driver will uses DMA channel 0 for RX and DMA channel 1 for TX.
* The DMA channels are freed automatically when no USART command processing.
*
* \param pUSARTd Pointer to a UsartDma instance.
* \param pUsartHw Associated USART peripheral.
* \param usartId USART peripheral identifier.
* \param UsartClk USART clock.
* \param pXdmad Pointer to a Dmad instance.
*/
uint32_t USARTD_Configure( UsartDma *pUsartd ,
Usart *pUsartHw ,
uint8_t usartId,
uint32_t UsartMode,
uint32_t UsartClk,
sXdmad *pXdmad )
{
/* Initialize the USART structure */
pUsartd->pUsartHw = pUsartHw;
pUsartd->usartId = usartId;
pUsartd->pRxChannel = 0;
pUsartd->pTxChannel = 0;
pUsartd->pXdmad = pXdmad;
/* Enable the USART Peripheral ,Execute a software reset of the USART, Configure USART in Master Mode*/
USART_Configure ( pUsartHw, UsartMode, UsartClk, BOARD_MCK);
/* Driver initialize */
XDMAD_Initialize( pUsartd->pXdmad, 0 );
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_SetPriority( XDMAC_IRQn ,1);
return 0;
}
