/**
*
* Perform a destructive 32-bit wide register IO test. Each location is tested
* by sequentially writing a 32-bit wide regsiter, reading the register, and
* comparing value. This function tests three kinds of register IO functions,
* normal register IO, little-endian register IO, and big-endian register IO.
* When testing little/big-endian IO, the function perform the following
* sequence, Xil_Out32LE/Xil_Out32BE, Xil_In32, Compare,
* Xil_Out32, Xil_In32LE/Xil_In32BE, Compare. Whether to swap the read-in value
* before comparing is controlled by the 5th argument.
*
* @param Addr is a pointer to the region of memory to be tested.
* @param Length is the Length of the block.
* @param Value is the constant used for writting the memory.
* @param Kind is the test kind. Acceptable values are:
* XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
* @param Swap indicates whether to byte swap the read-in value.
*
* @return
*
* - -1 is returned for a failure
* - 0 is returned for a pass
*
*****************************************************************************/
s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap)
{
u32 *TempAddr;
u32 ValueIn = 0U;
s32 Index;
TempAddr = Addr;
Xil_AssertNonvoid(TempAddr != NULL);
for (Index = 0; Index < Length; Index++) {
switch (Kind) {
case XIL_TESTIO_LE:
Xil_Out32LE((INTPTR)TempAddr, Value);
break;
case XIL_TESTIO_BE:
Xil_Out32BE((INTPTR)TempAddr, Value);
break;
default:
Xil_Out32((INTPTR)TempAddr, Value);
break;
}
ValueIn = Xil_In32((INTPTR)TempAddr);
if ((Kind != 0) && (Swap != 0)) {
ValueIn = Swap32(ValueIn);
}
if (Value != ValueIn) {
return -1;
}
/* second round */
Xil_Out32((INTPTR)TempAddr, Value);
switch (Kind) {
case XIL_TESTIO_LE:
ValueIn = Xil_In32LE((INTPTR)TempAddr);
break;
case XIL_TESTIO_BE:
ValueIn = Xil_In32BE((INTPTR)TempAddr);
break;
default:
ValueIn = Xil_In32((INTPTR)TempAddr);
break;
}
if ((Kind != 0) && (Swap != 0)) {
ValueIn = Swap32(ValueIn);
}
if (Value != ValueIn) {
return -1;
}
TempAddr += sizeof(u32);
}
return 0;
}
/**
*
* Perform a destructive 32-bit wide register IO test. Each location is tested
* by sequentially writing a 32-bit wide regsiter, reading the register, and
* comparing value. This function tests three kinds of register IO functions,
* normal register IO, little-endian register IO, and big-endian register IO.
* When testing little/big-endian IO, the function perform the following
* sequence, Xil_Out32LE/Xil_Out32BE, Xil_In32, Compare,
* Xil_Out32, Xil_In32LE/Xil_In32BE, Compare. Whether to swap the read-in value
* before comparing is controlled by the 5th argument.
*
* @param Addr is a pointer to the region of memory to be tested.
* @param Len is the length of the block.
* @param Value is the constant used for writting the memory.
* @param Kind is the test kind. Acceptable values are:
* XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
* @param Swap indicates whether to byte swap the read-in value.
*
* @return
*
* - -1 is returned for a failure
* - 0 is returned for a pass
*
*****************************************************************************/
int Xil_TestIO32(u32 *Addr, int Len, u32 Value, int Kind, int Swap)
{
u32 ValueIn;
int Index;
for (Index = 0; Index < Len; Index++) {
switch (Kind) {
case XIL_TESTIO_LE:
Xil_Out32LE((u32)Addr, Value);
break;
case XIL_TESTIO_BE:
Xil_Out32BE((u32)Addr, Value);
break;
default:
Xil_Out32((u32)Addr, Value);
break;
}
ValueIn = Xil_In32((u32)Addr);
if (Kind && Swap)
ValueIn = Swap32(ValueIn);
if (Value != ValueIn) {
return -1;
}
/* second round */
Xil_Out32((u32)Addr, Value);
switch (Kind) {
case XIL_TESTIO_LE:
ValueIn = Xil_In32LE((u32)Addr);
break;
case XIL_TESTIO_BE:
ValueIn = Xil_In32BE((u32)Addr);
break;
default:
ValueIn = Xil_In32((u32)Addr);
break;
}
if (Kind && Swap)
ValueIn = Swap32(ValueIn);
if (Value != ValueIn) {
return -1;
}
Addr++;
}
return 0;
}
/**
*
* This bit of ugliness allows us to present a structure to the user. The
* byte buffer which was read from the CompactFlash is converted into the
* XSysAce_CFParameters structure. The byte buffer is accessed by the indices
* of the fields as defined at the top of this file. We do not read from
* CompactFlash directly into the CF Parameter structure because of structure
* packing problems.
*
* Note that we also need to perform endian conversion here since the System
* ACE device gives us little endian data and we're (possibly) on a big endian
* processor.
*
* @param ParamPtr is the structure to fill
* @param BufPtr is the byte buffer containing the CF parameter data
*
* @return None.
*
* @note None.
*
******************************************************************************/
static void FillParam(XSysAce_CFParameters * ParamPtr, u8 *BufPtr)
{
u16 HiWord;
u16 LoWord;
Xil_Out16LE((u32)&ParamPtr->Signature,
*((u16 *) &BufPtr[XSA_CFPARM_SIGNATURE]));
Xil_Out16LE((u32)&ParamPtr->NumCylinders,
*((u16 *) &BufPtr[XSA_CFPARM_NUMCYLS]));
Xil_Out16LE((u32)&ParamPtr->Reserved,
*((u16 *) &BufPtr[XSA_CFPARM_RESERVED1]));
Xil_Out16LE((u32)&ParamPtr->NumHeads,
*((u16 *) &BufPtr[XSA_CFPARM_NUMHEADS]));
Xil_Out16LE((u32)&ParamPtr->NumBytesPerTrack,
*((u16 *) &BufPtr[XSA_CFPARM_BYTES_TRACK]));
Xil_Out16LE((u32)&ParamPtr->NumBytesPerSector,
*((u16 *) &BufPtr[XSA_CFPARM_BYTES_SECT]));
Xil_Out16LE((u32)&ParamPtr->NumSectorsPerTrack,
*((u16 *) &BufPtr[XSA_CFPARM_SECTS_TRK]));
/* NumSectorsPerCard is stored as two half-words, MSW first */
Xil_Out16LE((u32)&HiWord, *((u16 *) &BufPtr[XSA_CFPARM_SECTS_HI]));
Xil_Out16LE((u32)&LoWord, *((u16 *) &BufPtr[XSA_CFPARM_SECTS_LO]));
ParamPtr->NumSectorsPerCard = ((u32) HiWord << 16) | (u32) LoWord;
Xil_Out16LE((u32)&ParamPtr->VendorUnique,
*((u16 *) &BufPtr[XSA_CFPARM_VENDOR1]));
WordCopySwap(&BufPtr[XSA_CFPARM_SERIAL_NO], ParamPtr->SerialNo, 20);
Xil_Out16LE((u32)&ParamPtr->BufferType,
*((u16 *) &BufPtr[XSA_CFPARM_BUFFER_TYPE]));
Xil_Out16LE((u32)&ParamPtr->BufferSize,
*((u16 *) &BufPtr[XSA_CFPARM_BUFFER_SIZE]));
Xil_Out16LE((u32)&ParamPtr->NumEccBytes,
*((u16 *) &BufPtr[XSA_CFPARM_ECC_BYTES]));
WordCopySwap(&BufPtr[XSA_CFPARM_FW_VERSION], ParamPtr->FwVersion, 8);
WordCopySwap(&BufPtr[XSA_CFPARM_MODEL_NO], ParamPtr->ModelNo, 40);
Xil_Out16LE((u32)&ParamPtr->MaxSectors,
*((u16 *) &BufPtr[XSA_CFPARM_MAX_SECTORS]));
Xil_Out16LE((u32)&ParamPtr->DblWord,
*((u16 *) &BufPtr[XSA_CFPARM_DBL_WORD]));
Xil_Out16LE((u32)&ParamPtr->Capabilities,
*((u16 *) &BufPtr[XSA_CFPARM_CAPS]));
Xil_Out16LE((u32)&ParamPtr->Reserved2,
*((u16 *) &BufPtr[XSA_CFPARM_RESERVED2]));
Xil_Out16LE((u32)&ParamPtr->PioMode,
*((u16 *) &BufPtr[XSA_CFPARM_PIO_MODE]));
Xil_Out16LE((u32)&ParamPtr->DmaMode,
*((u16 *) &BufPtr[XSA_CFPARM_DMA_MODE]));
Xil_Out16LE((u32)&ParamPtr->TranslationValid,
*((u16 *) &BufPtr[XSA_CFPARM_TRANSLATE]));
Xil_Out16LE((u32)&ParamPtr->CurNumCylinders,
*((u16 *) &BufPtr[XSA_CFPARM_CURCYLS]));
Xil_Out16LE((u32)&ParamPtr->CurNumHeads,
*((u16 *) &BufPtr[XSA_CFPARM_CURHEADS]));
Xil_Out16LE((u32)&ParamPtr->CurSectorsPerTrack,
*((u16 *) &BufPtr[XSA_CFPARM_CURSECTS_TRK]));
Xil_Out32LE((u32)&ParamPtr->CurSectorsPerCard,
*((u32 *) &BufPtr[XSA_CFPARM_CURSECTS]));
Xil_Out16LE((u32)&ParamPtr->MultipleSectors,
*((u16 *) &BufPtr[XSA_CFPARM_MULTIPLE]));
Xil_Out32LE((u32)&ParamPtr->LbaSectors,
*((u32 *) &BufPtr[XSA_CFPARM_LBA_SECTS]));
WordCopySwap(&BufPtr[XSA_CFPARM_RESERVED3], ParamPtr->Reserved3, 132);
Xil_Out16LE((u32)&ParamPtr->SecurityStatus,
*((u16 *) &BufPtr[XSA_CFPARM_SECURITY]));
WordCopySwap(&BufPtr[XSA_CFPARM_VENDOR2], ParamPtr->VendorUniqueBytes,
62);
Xil_Out16LE((u32)&ParamPtr->PowerDesc,
*((u16 *) &BufPtr[XSA_CFPARM_POWER]));
WordCopySwap(&BufPtr[XSA_CFPARM_RESERVED4], ParamPtr->Reserved4, 190);
}
int main()
{
init_platform();
//May not work ? (AXI is mapped here but a
//value only is given
send_to_Uart((u32) 5);
int* own_a = NULL;
//int* own_v = NULL;
int* ext_a = NULL;
//int* ext_v = NULL;
#if XPAR_CPU_ID == 0
//Write to own memory
own_a = (int*) XPAR_MICROBLAZE_0_LMB_BRAM_IF_CNTRL_MICROBLAZE_0_BASEADDR;
Xil_Out32LE(own_a,20);
//*own_a = 20;
//REad From own memory to see if it worked
send_address_to_UART((u32) own_a);
//own_v = (int*) XPAR_MICROBLAZE_0_LMB_BRAM_IF_CNTRL_MICROBLAZE_0_BASEADDR + 0x00000001;
//Read from own memory
//*own_v = *own_a;
//Write to extern memory
ext_a = (int*) XPAR_AXI_BRAM_CTRL_1_S_AXI_BASEADDR + 0x000000001;
Xil_Out32LE(ext_a,30);
//ext_v = (int*) XPAR_AXI_BRAM_CTRL_1_S_AXI_BASEADDR + 0x000000002;
send_address_to_UART((u32) own_a);
#elif XPAR_CPU_ID == 1
//Write to own memory
own_a = (int*) XPAR_MICROBLAZE_1_LMB_BRAM_IF_CNTRL_MICROBLAZE_1_BASEADDR;
Xil_Out32LE(own_a,20);
//*own_a = 20;
//REad From own memory to see if it worked
send_address_to_UART((u32) own_a);
//own_v = (int*) XPAR_MICROBLAZE_0_LMB_BRAM_IF_CNTRL_MICROBLAZE_0_BASEADDR + 0x00000001;
//Read from own memory
//*own_v = *own_a;
//Write to extern memory
ext_a = (int*) XPAR_AXI_BRAM_CTRL_1_S_AXI_BASEADDR; // + 0x000000001;
Xil_Out32LE(ext_a,30);
//ext_v = (int*) XPAR_AXI_BRAM_CTRL_1_S_AXI_BASEADDR + 0x000000002;
send_address_to_UART((u32) ext_a);
#endif
print("Hello World\n\r");
cleanup_platform();
return 0;
}
//Uartlite XPAR_AXI_UARTLITE_0_BASEADDR
void send_to_Uart(u32 Value)
{
Xil_Out32LE(XPAR_AXI_UARTLITE_0_BASEADDR,Value);
}
void PIT_set_counter(int count)
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR + PIT_COUNT_REG_OFFSET, count);
}
void PIT_disable_reload()
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR, !PIT_COUNTER_ENABLE_MASK & Xil_In32LE(XPAR_PIT_0_BASEADDR));
}
void PIT_enable_reload()
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR, PIT_COUNTER_ENABLE_MASK | Xil_In32LE(XPAR_PIT_0_BASEADDR));
}
void PIT_disable_interrupts()
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR, !PIT_INTERRUPT_ENABLE_MASK & Xil_In32LE(XPAR_PIT_0_BASEADDR));
}
void PIT_disable_counter()
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR, !PIT_DECREMENT_ENABLE_MASK & Xil_In32LE(XPAR_PIT_0_BASEADDR));
}
void PIT_enable_counter()
{
Xil_Out32LE(XPAR_PIT_0_BASEADDR, PIT_DECREMENT_ENABLE_MASK | Xil_In32LE(XPAR_PIT_0_BASEADDR));
}
