uint32_t _Nios2_ISR_Set_level( uint32_t new_level, uint32_t status ) { switch ( _Nios2_ISR_Get_status_mask() ) { case NIOS2_ISR_STATUS_MASK_IIC: if ( new_level == 0 ) { status |= NIOS2_STATUS_PIE; } else { status &= ~NIOS2_STATUS_PIE; } break; case NIOS2_ISR_STATUS_MASK_EIC_IL: status &= ~NIOS2_STATUS_IL_MASK; status |= (new_level << NIOS2_STATUS_IL_OFFSET) & NIOS2_STATUS_IL_MASK; break; case NIOS2_ISR_STATUS_MASK_EIC_RSIE: if ( new_level == 0 ) { status |= NIOS2_STATUS_RSIE; } else { status &= ~NIOS2_STATUS_RSIE; } break; default: /* FIXME */ _Internal_error_Occurred( INTERNAL_ERROR_CORE, false, 0xdeadbeef ); break; } return status; }
uint32_t _CPU_ISR_Get_level( void ) { uint32_t status = _Nios2_Get_ctlreg_status(); uint32_t level = 0; switch ( _Nios2_ISR_Get_status_mask() ) { case NIOS2_ISR_STATUS_MASK_IIC: level = (status & NIOS2_STATUS_PIE) == 0; break; case NIOS2_ISR_STATUS_MASK_EIC_IL: level = (status & NIOS2_STATUS_IL_MASK) >> NIOS2_STATUS_IL_OFFSET; break; case NIOS2_ISR_STATUS_MASK_EIC_RSIE: level = (status & NIOS2_STATUS_RSIE) == 0; break; default: /* FIXME */ _Terminate( INTERNAL_ERROR_CORE, false, 0xdeadbeef ); break; } return level; }