static int AsyncDeQRegstr(struct pipe_desc *desc, int iSize) { int i; pipe_intrusion_check(desc, desc->pRead, iSize); i = MarkerAddLast(&desc->ReadMarkers, desc->pRead, iSize, true); if (i != -1) { /* adjust iNbrPendingReads */ __ASSERT_NO_MSG(0 <= desc->iNbrPendingReads); desc->iNbrPendingReads++; /* pWriteGuard changes? */ if (NULL == desc->pWriteGuard) { desc->pWriteGuard = desc->pRead; } __ASSERT_NO_MSG(desc->ReadMarkers.aMarkers [desc->ReadMarkers.iFirstMarker].pointer == desc->pWriteGuard); /* iAWAMarker changes? */ if (-1 == desc->ReadMarkers.iAWAMarker && desc->bReadWA) { desc->ReadMarkers.iAWAMarker = i; } } return i; }
static void MarkerDelete(struct marker_list *pMarkerList, int index) { int i; int iPredecessor; int iSuccessor; i = index; __ASSERT_NO_MSG(-1 != i); pMarkerList->aMarkers[i].pointer = NULL; MarkerUnlinkFromList(pMarkerList->aMarkers, i, &iPredecessor, &iSuccessor); /* update first/last info */ if (i == pMarkerList->iLastMarker) { pMarkerList->iLastMarker = iPredecessor; } if (i == pMarkerList->iFirstMarker) { pMarkerList->iFirstMarker = iSuccessor; } #ifdef STORE_NBR_MARKERS pMarkerList->iNbrMarkers--; __ASSERT_NO_MSG(0 <= pMarkerList->iNbrMarkers); if (0 == pMarkerList->iNbrMarkers) { __ASSERT_NO_MSG(-1 == pMarkerList->iFirstMarker); __ASSERT_NO_MSG(-1 == pMarkerList->iLastMarker); } #endif }
static int MarkerAddLast(struct marker_list *pMarkerList, unsigned char *pointer, int iSize, bool bXferBusy) { int i = MarkerFindFree(pMarkerList->aMarkers); if (i == -1) { return i; } pMarkerList->aMarkers[i].pointer = pointer; pMarkerList->aMarkers[i].size = iSize; pMarkerList->aMarkers[i].bXferBusy = bXferBusy; if (-1 == pMarkerList->iFirstMarker) { __ASSERT_NO_MSG(-1 == pMarkerList->iLastMarker); pMarkerList->iFirstMarker = i; /* we still need to set Prev & Next */ } else { __ASSERT_NO_MSG(-1 != pMarkerList->iLastMarker); __ASSERT_NO_MSG(-1 == pMarkerList->aMarkers[pMarkerList->iLastMarker].Next); } MarkerLinkToListAfter(pMarkerList->aMarkers, pMarkerList->iLastMarker, i); __ASSERT_NO_MSG(-1 == pMarkerList->aMarkers[i].Next); pMarkerList->iLastMarker = i; #ifdef STORE_NBR_MARKERS pMarkerList->iNbrMarkers++; __ASSERT_NO_MSG(0 < pMarkerList->iNbrMarkers); #endif return i; }
void BuffGetFreeSpaceTotal(struct pipe_desc *desc, int *piFreeSpaceTotal) { int dummy1, dummy2; *piFreeSpaceTotal = CalcFreeSpace(desc, &dummy1, &dummy2); __ASSERT_NO_MSG(dummy1 == desc->iFreeSpaceCont); __ASSERT_NO_MSG(dummy2 == desc->iFreeSpaceAWA); }
void BuffGetAvailDataTotal(struct pipe_desc *desc, int *piAvailDataTotal) { int dummy1, dummy2; *piAvailDataTotal = CalcAvailData(desc, &dummy1, &dummy2); __ASSERT_NO_MSG(dummy1 == desc->iAvailDataCont); __ASSERT_NO_MSG(dummy2 == desc->iAvailDataAWA); }
/** * @brief Configure pin or port */ static int gpio_nrf5_config(struct device *dev, int access_op, u32_t pin, int flags) { /* Note D0D1 is not supported so we switch to S0S1. */ static const u32_t drive_strength[4][4] = { {GPIO_DRIVE_S0S1, GPIO_DRIVE_S0H1, 0, GPIO_DRIVE_S0D1}, {GPIO_DRIVE_H0S1, GPIO_DRIVE_H0H1, 0, GPIO_DRIVE_H0D1}, {0, 0, 0, 0}, {GPIO_DRIVE_D0S1, GPIO_DRIVE_D0H1, 0, GPIO_DRIVE_S0S1} }; volatile struct _gpiote *gpiote = GPIOTE_STRUCT(dev); struct gpio_nrf5_data *data = DEV_GPIO_DATA(dev); volatile struct _gpio *gpio = GPIO_STRUCT(dev); if (access_op == GPIO_ACCESS_BY_PIN) { /* Check pull */ u8_t pull = GPIO_PULL_DISABLE; int ds_low = (flags & GPIO_DS_LOW_MASK) >> GPIO_DS_LOW_POS; int ds_high = (flags & GPIO_DS_HIGH_MASK) >> GPIO_DS_HIGH_POS; unsigned int sense = (flags & GPIO_PIN_CNF_SENSE_Msk); __ASSERT_NO_MSG(ds_low != 2); __ASSERT_NO_MSG(ds_high != 2); if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) { pull = GPIO_PULL_UP; } else if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_DOWN) { pull = GPIO_PULL_DOWN; } if (sense == GPIO_SENSE_INVALID) { __ASSERT_NO_MSG(sense == GPIO_SENSE_INVALID); sense = GPIO_SENSE_DISABLE; } if ((flags & GPIO_DIR_MASK) == GPIO_DIR_OUT) { /* Set initial output value */ if (pull == GPIO_PULL_UP) { gpio->OUTSET = BIT(pin); } else if (pull == GPIO_PULL_DOWN) { gpio->OUTCLR = BIT(pin); } /* Config as output */ gpio->PIN_CNF[pin] = (GPIO_SENSE_DISABLE | drive_strength[ds_low][ds_high] | pull | GPIO_INPUT_DISCONNECT | GPIO_DIR_OUTPUT); } else { /* Config as input */ gpio->PIN_CNF[pin] = (sense | drive_strength[ds_low][ds_high] | pull | GPIO_INPUT_CONNECT | GPIO_DIR_INPUT); } } else {
static int queue_init(Gmac *gmac, struct gmac_queue *queue) { int result; __ASSERT_NO_MSG(queue->rx_desc_list.len > 0); __ASSERT_NO_MSG(queue->tx_desc_list.len > 0); __ASSERT(!((u32_t)queue->rx_desc_list.buf & ~GMAC_RBQB_ADDR_Msk), "RX descriptors have to be word aligned"); __ASSERT(!((u32_t)queue->tx_desc_list.buf & ~GMAC_TBQB_ADDR_Msk), "TX descriptors have to be word aligned"); /* Setup descriptor lists */ result = rx_descriptors_init(gmac, queue); if (result < 0) { return result; } tx_descriptors_init(gmac, queue); /* Initialize TX descriptors semaphore. The semaphore is required as the * size of the TX descriptor list is limited while the number of TX data * buffers is not. */ k_sem_init(&queue->tx_desc_sem, queue->tx_desc_list.len - 1, queue->tx_desc_list.len - 1); /* Set Receive Buffer Queue Pointer Register */ gmac->GMAC_RBQB = (u32_t)queue->rx_desc_list.buf; /* Set Transmit Buffer Queue Pointer Register */ gmac->GMAC_TBQB = (u32_t)queue->tx_desc_list.buf; /* Configure GMAC DMA transfer */ gmac->GMAC_DCFGR = /* Receive Buffer Size (defined in multiples of 64 bytes) */ GMAC_DCFGR_DRBS(CONFIG_NET_BUF_DATA_SIZE >> 6) /* 4 kB Receiver Packet Buffer Memory Size */ | GMAC_DCFGR_RXBMS_FULL /* 4 kB Transmitter Packet Buffer Memory Size */ | GMAC_DCFGR_TXPBMS /* Transmitter Checksum Generation Offload Enable */ | GMAC_DCFGR_TXCOEN /* Attempt to use INCR4 AHB bursts (Default) */ | GMAC_DCFGR_FBLDO_INCR4; /* Setup RX/TX completion and error interrupts */ gmac->GMAC_IER = GMAC_INT_EN_FLAGS; queue->err_rx_frames_dropped = 0; queue->err_rx_flushed_count = 0; queue->err_tx_flushed_count = 0; SYS_LOG_INF("Queue %d activated", queue->que_idx); return 0; }
void BuffGetFreeSpace(struct pipe_desc *desc, int *piFreeSpaceTotal, int *piFreeSpaceCont, int *piFreeSpaceAWA) { int iFreeSpaceCont; int iFreeSpaceAWA; int iFreeSpaceTotal; iFreeSpaceTotal = CalcFreeSpace(desc, &iFreeSpaceCont, &iFreeSpaceAWA); __ASSERT_NO_MSG(iFreeSpaceCont == desc->iFreeSpaceCont); __ASSERT_NO_MSG(iFreeSpaceAWA == desc->iFreeSpaceAWA); *piFreeSpaceTotal = iFreeSpaceTotal; *piFreeSpaceCont = desc->iFreeSpaceCont; *piFreeSpaceAWA = desc->iFreeSpaceAWA; }
void BuffGetAvailData(struct pipe_desc *desc, int *piAvailDataTotal, int *piAvailDataCont, int *piAvailDataAWA) { int iAvailDataCont; int iAvailDataAWA; int iAvailDataTotal; iAvailDataTotal = CalcAvailData(desc, &iAvailDataCont, &iAvailDataAWA); __ASSERT_NO_MSG(iAvailDataCont == desc->iAvailDataCont); __ASSERT_NO_MSG(iAvailDataAWA == desc->iAvailDataAWA); *piAvailDataTotal = iAvailDataTotal; *piAvailDataCont = desc->iAvailDataCont; *piAvailDataAWA = desc->iAvailDataAWA; }
static int lsm6ds0_sample_fetch(struct device *dev, enum sensor_channel chan) { __ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_ACCEL_XYZ || #if defined(CONFIG_LSM6DS0_ENABLE_TEMP) chan == SENSOR_CHAN_DIE_TEMP || #endif chan == SENSOR_CHAN_GYRO_XYZ); switch (chan) { case SENSOR_CHAN_ACCEL_XYZ: lsm6ds0_sample_fetch_accel(dev); break; case SENSOR_CHAN_GYRO_XYZ: lsm6ds0_sample_fetch_gyro(dev); break; #if defined(CONFIG_LSM6DS0_ENABLE_TEMP) case SENSOR_CHAN_DIE_TEMP: lsm6ds0_sample_fetch_temp(dev); break; #endif case SENSOR_CHAN_ALL: lsm6ds0_sample_fetch_accel(dev); lsm6ds0_sample_fetch_gyro(dev); #if defined(CONFIG_LSM6DS0_ENABLE_TEMP) lsm6ds0_sample_fetch_temp(dev); #endif break; default: return -ENOTSUP; } return 0; }
static int ak8975_channel_get(struct device *dev, enum sensor_channel chan, struct sensor_value *val) { struct ak8975_data *drv_data = dev->driver_data; __ASSERT_NO_MSG(chan == SENSOR_CHAN_MAGN_XYZ || chan == SENSOR_CHAN_MAGN_X || chan == SENSOR_CHAN_MAGN_Y || chan == SENSOR_CHAN_MAGN_Z); if (chan == SENSOR_CHAN_MAGN_XYZ) { ak8975_convert(val, drv_data->x_sample, drv_data->x_adj); ak8975_convert(val + 1, drv_data->y_sample, drv_data->y_adj); ak8975_convert(val + 2, drv_data->z_sample, drv_data->z_adj); } else if (chan == SENSOR_CHAN_MAGN_X) { ak8975_convert(val, drv_data->x_sample, drv_data->x_adj); } else if (chan == SENSOR_CHAN_MAGN_Y) { ak8975_convert(val, drv_data->y_sample, drv_data->y_adj); } else { /* chan == SENSOR_CHAN_MAGN_Z */ ak8975_convert(val, drv_data->z_sample, drv_data->z_adj); } return 0; }
static int ak8975_sample_fetch(struct device *dev, enum sensor_channel chan) { struct ak8975_data *drv_data = dev->driver_data; u8_t buf[6]; __ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL); if (i2c_reg_write_byte(drv_data->i2c, CONFIG_AK8975_I2C_ADDR, AK8975_REG_CNTL, AK8975_MODE_MEASURE) < 0) { LOG_ERR("Failed to start measurement."); return -EIO; } k_busy_wait(AK8975_MEASURE_TIME_US); if (i2c_burst_read(drv_data->i2c, CONFIG_AK8975_I2C_ADDR, AK8975_REG_DATA_START, buf, 6) < 0) { LOG_ERR("Failed to read sample data."); return -EIO; } drv_data->x_sample = sys_le16_to_cpu(buf[0] | (buf[1] << 8)); drv_data->y_sample = sys_le16_to_cpu(buf[2] | (buf[3] << 8)); drv_data->z_sample = sys_le16_to_cpu(buf[4] | (buf[5] << 8)); return 0; }
static int lps25hb_sample_fetch(struct device *dev, enum sensor_channel chan) { struct lps25hb_data *data = dev->driver_data; const struct lps25hb_config *config = dev->config->config_info; u8_t out[5]; int offset; __ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL); for (offset = 0; offset < sizeof(out); ++offset) { if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LPS25HB_REG_PRESS_OUT_XL + offset, out + offset) < 0) { SYS_LOG_DBG("failed to read sample"); return -EIO; } } data->sample_press = (s32_t)((u32_t)(out[0]) | ((u32_t)(out[1]) << 8) | ((u32_t)(out[2]) << 16)); data->sample_temp = (s16_t)((u16_t)(out[3]) | ((u16_t)(out[4]) << 8)); return 0; }
static int entropy_nrf5_init(struct device *device) { /* Check if this API is called on correct driver instance. */ __ASSERT_NO_MSG(&entropy_nrf5_data == DEV_DATA(device)); /* Locking semaphore initialized to 1 (unlocked) */ k_sem_init(&entropy_nrf5_data.sem_lock, 1, 1); /* Synching semaphore */ k_sem_init(&entropy_nrf5_data.sem_sync, 0, 1); rng_pool_init((struct rng_pool *)(entropy_nrf5_data.thr), CONFIG_ENTROPY_NRF5_THR_POOL_SIZE, CONFIG_ENTROPY_NRF5_THR_THRESHOLD); rng_pool_init((struct rng_pool *)(entropy_nrf5_data.isr), CONFIG_ENTROPY_NRF5_ISR_POOL_SIZE, CONFIG_ENTROPY_NRF5_ISR_THRESHOLD); /* Enable or disable bias correction */ if (IS_ENABLED(CONFIG_ENTROPY_NRF5_BIAS_CORRECTION)) { nrf_rng_error_correction_enable(); } else { nrf_rng_error_correction_disable(); } nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK); nrf_rng_task_trigger(NRF_RNG_TASK_START); IRQ_CONNECT(RNG_IRQn, CONFIG_ENTROPY_NRF5_PRI, isr, &entropy_nrf5_data, 0); irq_enable(RNG_IRQn); return 0; }
/** * * @brief disable an individual LOAPIC interrupt (IRQ) * * This routine clears the interrupt mask bit in the LVT for the specified IRQ * * @param irq IRQ number of the interrupt * * @returns N/A */ void _loapic_irq_disable(unsigned int irq) { volatile int *pLvt; /* pointer to local vector table */ int32_t oldLevel; /* previous interrupt lock level */ /* * irq is actually an index to local APIC LVT register. * ASSERT if out of range for MVIC implementation. */ __ASSERT_NO_MSG(irq < LOAPIC_IRQ_COUNT); /* * See the comments in _LoApicLvtVecSet() regarding IRQ to LVT mappings * and ths assumption concerning LVT spacing. */ pLvt = (volatile int *)(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_TIMER + (irq * LOAPIC_LVT_REG_SPACING)); /* set the mask bit in the LVT */ oldLevel = irq_lock(); *pLvt = *pLvt | LOAPIC_LVT_MASKED; irq_unlock(oldLevel); }
static int entropy_nrf5_get_entropy(struct device *device, u8_t *buf, u16_t len) { /* Check if this API is called on correct driver instance. */ __ASSERT_NO_MSG(&entropy_nrf5_data == DEV_DATA(device)); while (len) { u16_t bytes; k_sem_take(&entropy_nrf5_data.sem_lock, K_FOREVER); bytes = rng_pool_get((struct rng_pool *)(entropy_nrf5_data.thr), buf, len); k_sem_give(&entropy_nrf5_data.sem_lock); if (bytes == 0) { /* Pool is empty: Sleep until next interrupt. */ k_sem_take(&entropy_nrf5_data.sem_sync, K_FOREVER); continue; } len -= bytes; buf += bytes; } return 0; }
static int lsm9ds0_gyro_sample_fetch(struct device *dev, enum sensor_channel chan) { struct lsm9ds0_gyro_data *data = dev->driver_data; const struct lsm9ds0_gyro_config *config = dev->config->config_info; uint8_t x_l, x_h, y_l, y_h, z_l, z_h; __ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_GYRO_ANY); if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_X_L_G, &x_l) < 0 || i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_X_H_G, &x_h) < 0 || i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_Y_L_G, &y_l) < 0 || i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_Y_H_G, &y_h) < 0 || i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_Z_L_G, &z_l) < 0 || i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr, LSM9DS0_GYRO_REG_OUT_Z_H_G, &z_h) < 0) { SYS_LOG_DBG("failed to read sample"); return -EIO; } data->sample_x = (int16_t)((uint16_t)(x_l) | ((uint16_t)(x_h) << 8)); data->sample_y = (int16_t)((uint16_t)(y_l) | ((uint16_t)(y_h) << 8)); data->sample_z = (int16_t)((uint16_t)(z_l) | ((uint16_t)(z_h) << 8)); #if defined(CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME) data->sample_fs = data->fs; #endif return 0; }
int lis2ds12_trigger_set(struct device *dev, const struct sensor_trigger *trig, sensor_trigger_handler_t handler) { struct lis2ds12_data *data = dev->driver_data; u8_t buf[6]; __ASSERT_NO_MSG(trig->type == SENSOR_TRIG_DATA_READY); gpio_pin_disable_callback(data->gpio, DT_ST_LIS2DS12_0_IRQ_GPIOS_PIN); data->data_ready_handler = handler; if (handler == NULL) { LOG_WRN("lis2ds12: no handler"); return 0; } /* re-trigger lost interrupt */ if (data->hw_tf->read_data(data, LIS2DS12_REG_OUTX_L, buf, sizeof(buf)) < 0) { LOG_ERR("status reading error"); return -EIO; } data->data_ready_trigger = *trig; lis2ds12_init_interrupt(dev); gpio_pin_enable_callback(data->gpio, DT_ST_LIS2DS12_0_IRQ_GPIOS_PIN); return 0; }
void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the interrupt */ unsigned int vector /* vector to copy into the LVT */ ) { volatile int *pLvt; /* pointer to local vector table */ int32_t oldLevel; /* previous interrupt lock level */ /* * irq is actually an index to local APIC LVT register. * ASSERT if out of range for MVIC implementation. */ __ASSERT_NO_MSG(irq < LOAPIC_IRQ_COUNT); /* * The following mappings are used: * * LVT0 -> LOAPIC_TIMER * * It's assumed that LVTs are spaced by LOAPIC_LVT_REG_SPACING bytes */ pLvt = (volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_TIMER + (irq * LOAPIC_LVT_REG_SPACING)); /* update the 'vector' bits in the LVT */ oldLevel = irq_lock(); *pLvt = (*pLvt & ~LOAPIC_VECTOR) | vector; irq_unlock(oldLevel); }
void *get_scratch_packet(void) { void *packet = nano_fifo_get(&scratch_q_packets_fifo, TICKS_NONE); __ASSERT_NO_MSG(packet); return packet; }
/** * * @brief Process reply command for a pipe put operation * * @return N/A */ void _k_pipe_put_reply(struct k_args *ReqProc) { __ASSERT_NO_MSG( ReqProc->args.pipe_xfer_req.num_pending_xfers == 0 /* no pending Xfers */ && ReqProc->Time.timer == NULL /* no pending timer */ && ReqProc->head == NULL); /* not in list */ /* orig packet must be sent back, not ReqProc */ struct k_args *ReqOrig = ReqProc->Ctxt.args; PIPE_REQUEST_STATUS status; ReqOrig->Comm = _K_SVC_PIPE_PUT_ACK; /* determine return value: */ status = ReqProc->args.pipe_xfer_req.status; if (unlikely(status == TERM_TMO)) { ReqOrig->Time.rcode = RC_TIME; } else if ((TERM_XXX | XFER_IDLE) & status) { K_PIPE_OPTION Option = _k_pipe_option_get(&ReqProc->args); if (likely(ReqProc->args.pipe_xfer_req.xferred_size == ReqProc->args.pipe_xfer_req.total_size)) { /* All data has been transferred */ ReqOrig->Time.rcode = RC_OK; } else if (ReqProc->args.pipe_xfer_req.xferred_size != 0) { /* Some but not all data has been transferred */ ReqOrig->Time.rcode = (Option == _ALL_N) ? RC_INCOMPLETE : RC_OK; } else { /* No data has been transferred */ ReqOrig->Time.rcode = (Option == _0_TO_N) ? RC_OK : RC_FAIL; } } else { /* unknown (invalid) status */ __ASSERT_NO_MSG(1 == 0); /* should not come here */ } if (_k_pipe_request_type_get(&ReqOrig->args) != _ASYNCREQ) { ReqOrig->args.pipe_ack.xferred_size = ReqProc->args.pipe_xfer_req.xferred_size; } SENDARGS(ReqOrig); FREEARGS(ReqProc); }
/* This function will see if one or more 'areas' in the buffer can be made available (either for writing xor reading). Note: such a series of areas starts from the beginning. */ static int ScanMarkers(struct marker_list *pMarkerList, int *piSizeBWA, int *piSizeAWA, int *piNbrPendingXfers) { struct marker *pM; bool bMarkersAreNowAWA; int index; index = pMarkerList->iFirstMarker; __ASSERT_NO_MSG(-1 != index); bMarkersAreNowAWA = false; do { int index_next; __ASSERT_NO_MSG(index == pMarkerList->iFirstMarker); if (index == pMarkerList->iAWAMarker) { bMarkersAreNowAWA = true; /* from now on, everything is AWA */ } pM = &(pMarkerList->aMarkers[index]); if (pM->bXferBusy == true) { break; } if (!bMarkersAreNowAWA) { *piSizeBWA += pM->size; } else { *piSizeAWA += pM->size; } index_next = pM->Next; /* pMarkerList->iFirstMarker will be updated */ MarkerDelete(pMarkerList, index); /* adjust *piNbrPendingXfers */ if (piNbrPendingXfers) { __ASSERT_NO_MSG(0 <= *piNbrPendingXfers); (*piNbrPendingXfers)--; } index = index_next; } while (-1 != index); __ASSERT_NO_MSG(index == pMarkerList->iFirstMarker); if (bMarkersAreNowAWA) { pMarkerList->iAWAMarker = pMarkerList->iFirstMarker; } #ifdef STORE_NBR_MARKERS if (0 == pMarkerList->iNbrMarkers) { __ASSERT_NO_MSG(-1 == pMarkerList->iFirstMarker); __ASSERT_NO_MSG(-1 == pMarkerList->iLastMarker); __ASSERT_NO_MSG(-1 == pMarkerList->iAWAMarker); } #endif return pMarkerList->iFirstMarker; }
static int sx9500_sample_fetch(struct device *dev, enum sensor_channel chan) { struct sx9500_data *data = (struct sx9500_data *) dev->driver_data; __ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_PROX); return i2c_reg_read_byte(data->i2c_master, data->i2c_slave_addr, SX9500_REG_STAT, &data->prox_stat); }
static inline void __pwm_stm32_get_clock(struct device *dev) { struct pwm_stm32_data *data = DEV_DATA(dev); struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME); __ASSERT_NO_MSG(clk); data->clock = clk; }
static int rtc_stm32_init(struct device *dev) { struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME); const struct rtc_stm32_config *cfg = DEV_CFG(dev); __ASSERT_NO_MSG(clk); k_sem_init(DEV_SEM(dev), 1, UINT_MAX); DEV_DATA(dev)->cb_fn = NULL; clock_control_on(clk, (clock_control_subsys_t *) &cfg->pclken); LL_PWR_EnableBkUpAccess(); LL_RCC_ForceBackupDomainReset(); LL_RCC_ReleaseBackupDomainReset(); #if defined(CONFIG_RTC_STM32_CLOCK_LSI) LL_RCC_LSI_Enable(); while (LL_RCC_LSI_IsReady() != 1) ; LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI); #else /* CONFIG_RTC_STM32_CLOCK_LSE */ LL_RCC_LSE_SetDriveCapability(CONFIG_RTC_STM32_LSE_DRIVE_STRENGTH); LL_RCC_LSE_Enable(); /* Wait untill LSE is ready */ while (LL_RCC_LSE_IsReady() != 1) ; LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE); #endif /* CONFIG_RTC_STM32_CLOCK_SRC */ LL_RCC_EnableRTC(); if (LL_RTC_DeInit(RTC) != SUCCESS) { return -EIO; } if (LL_RTC_Init(RTC, ((LL_RTC_InitTypeDef *) &cfg->ll_rtc_config)) != SUCCESS) { return -EIO; } LL_RTC_EnableShadowRegBypass(RTC); LL_EXTI_EnableIT_0_31(EXTI_LINE); LL_EXTI_EnableRisingTrig_0_31(EXTI_LINE); rtc_stm32_irq_config(dev); return 0; }
static int i2c_sam_twi_transfer(struct device *dev, struct i2c_msg *msgs, u8_t num_msgs, u16_t addr) { const struct i2c_sam_twi_dev_cfg *const dev_cfg = DEV_CFG(dev); struct i2c_sam_twi_dev_data *const dev_data = DEV_DATA(dev); Twi *const twi = dev_cfg->regs; __ASSERT_NO_MSG(msgs); if (!num_msgs) { return 0; } /* Clear pending interrupts, such as NACK. */ (void)twi->TWI_SR; /* Set number of internal address bytes to 0, not used. */ twi->TWI_IADR = 0; for (; num_msgs > 0; num_msgs--, msgs++) { dev_data->msg.buf = msgs->buf; dev_data->msg.len = msgs->len; dev_data->msg.idx = 0; dev_data->msg.twi_sr = 0; dev_data->msg.flags = msgs->flags; /* * REMARK: Dirty workaround: * * The controller does not have a documented, generic way to * issue RESTART when changing transfer direction as master. * Send a stop condition in such a case. */ if (num_msgs > 1) { if ((msgs[0].flags & I2C_MSG_RW_MASK) != (msgs[1].flags & I2C_MSG_RW_MASK)) { dev_data->msg.flags |= I2C_MSG_STOP; } } if ((msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) { read_msg_start(twi, &dev_data->msg, addr); } else { write_msg_start(twi, &dev_data->msg, addr); } /* Wait for the transfer to complete */ k_sem_take(&dev_data->sem, K_FOREVER); if (dev_data->msg.twi_sr > 0) { /* Something went wrong */ return -EIO; } } return 0; }
/** * * @brief Perform timeout command for a pipe put operation * * @return N/A */ void _k_pipe_put_timeout(struct k_args *ReqProc) { __ASSERT_NO_MSG(ReqProc->Time.timer != NULL); myfreetimer(&(ReqProc->Time.timer)); _k_pipe_request_status_set(&ReqProc->args.pipe_xfer_req, TERM_TMO); DeListWaiter(ReqProc); if (ReqProc->args.pipe_xfer_req.num_pending_xfers == 0) { _k_pipe_put_reply(ReqProc); } }
static int i2c_qmsi_transfer(struct device *dev, struct i2c_msg *msgs, u8_t num_msgs, u16_t addr) { struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev); qm_i2c_t instance = GET_CONTROLLER_INSTANCE(dev); int rc; __ASSERT_NO_MSG(msgs); if (!num_msgs) { return 0; } device_busy_set(dev); for (int i = 0; i < num_msgs; i++) { u8_t op = msgs[i].flags & I2C_MSG_RW_MASK; bool stop = (msgs[i].flags & I2C_MSG_STOP) == I2C_MSG_STOP; qm_i2c_transfer_t xfer = { 0 }; if (op == I2C_MSG_WRITE) { xfer.tx = msgs[i].buf; xfer.tx_len = msgs[i].len; } else { xfer.rx = msgs[i].buf; xfer.rx_len = msgs[i].len; } xfer.callback = transfer_complete; xfer.callback_data = dev; xfer.stop = stop; k_sem_take(&driver_data->sem, K_FOREVER); rc = qm_i2c_master_irq_transfer(instance, &xfer, addr); k_sem_give(&driver_data->sem); if (rc != 0) { device_busy_clear(dev); return -EIO; } /* Block current thread until the I2C transfer completes. */ k_sem_take(&driver_data->device_sync_sem, K_FOREVER); if (driver_data->transfer_status != 0) { device_busy_clear(dev); return -EIO; } } device_busy_clear(dev); return 0; }
static int entropy_nrf5_get_entropy_isr(struct device *dev, u8_t *buf, u16_t len, u32_t flags) { u16_t cnt = len; /* Check if this API is called on correct driver instance. */ __ASSERT_NO_MSG(&entropy_nrf5_data == DEV_DATA(dev)); if (likely((flags & ENTROPY_BUSYWAIT) == 0)) { return rng_pool_get((struct rng_pool *)(entropy_nrf5_data.isr), buf, len); } if (len) { unsigned int key; int irq_enabled; key = irq_lock(); irq_enabled = irq_is_enabled(RNG_IRQn); irq_disable(RNG_IRQn); irq_unlock(key); nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); nrf_rng_task_trigger(NRF_RNG_TASK_START); do { int byte; while (!nrf_rng_event_get(NRF_RNG_EVENT_VALRDY)) { __WFE(); __SEV(); __WFE(); } byte = random_byte_get(); NVIC_ClearPendingIRQ(RNG_IRQn); if (byte < 0) { continue; } buf[--len] = byte; } while (len); if (irq_enabled) { irq_enable(RNG_IRQn); } } return cnt; }
static int sx9500_channel_get(struct device *dev, enum sensor_channel chan, struct sensor_value *val) { struct sx9500_data *data = (struct sx9500_data *) dev->driver_data; __ASSERT_NO_MSG(chan == SENSOR_CHAN_PROX); val->val1 = !!(data->prox_stat & (1 << (4 + CONFIG_SX9500_PROX_CHANNEL))); val->val2 = 0; return 0; }