HAL_StatusTypeDef ConfigureDMA(DMA_HandleTypeDef* DmaHandle, ADC_HandleTypeDef* AdcHandle) { __DMA2_CLK_ENABLE(); DmaHandle->Instance = DMA2_Stream0; DmaHandle->Init.Channel = DMA_CHANNEL_2; DmaHandle->Init.Direction = DMA_PERIPH_TO_MEMORY; DmaHandle->Init.PeriphInc = DMA_PINC_DISABLE; DmaHandle->Init.MemInc = DMA_MINC_ENABLE; DmaHandle->Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; DmaHandle->Init.MemDataAlignment = DMA_MDATAALIGN_WORD; DmaHandle->Init.Mode = DMA_NORMAL; DmaHandle->Init.Priority = DMA_PRIORITY_HIGH; DmaHandle->Init.FIFOMode = DMA_FIFOMODE_DISABLE; DmaHandle->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL; DmaHandle->Init.MemBurst = DMA_MBURST_SINGLE; DmaHandle->Init.PeriphBurst = DMA_PBURST_SINGLE; if (HAL_DMA_Init(DmaHandle) != HAL_OK) { /* Configuration Error */ return HAL_ERROR; } __HAL_LINKDMA(AdcHandle, DMA_Handle, *DmaHandle); HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); return HAL_OK; }
void Uart1DMAInit(UART_HandleTypeDef* huart) { __DMA2_CLK_ENABLE() ; huart->hdmatx = (DMA_HandleTypeDef*) calloc(1, sizeof(DMA_HandleTypeDef)); REQUIRE(huart->hdmatx!=0); huart->hdmatx->Instance = DMA2_Stream7; huart->hdmatx->Init.Channel = DMA_CHANNEL_4; huart->hdmatx->Init.Direction = DMA_MEMORY_TO_PERIPH; huart->hdmatx->Init.PeriphInc = DMA_PINC_DISABLE; huart->hdmatx->Init.MemInc = DMA_MINC_ENABLE; huart->hdmatx->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; huart->hdmatx->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; huart->hdmatx->Init.Mode = DMA_NORMAL; huart->hdmatx->Init.Priority = DMA_PRIORITY_LOW; huart->hdmatx->Init.FIFOMode = DMA_FIFOMODE_DISABLE; huart->hdmatx->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; huart->hdmatx->Init.MemBurst = DMA_MBURST_SINGLE; huart->hdmatx->Init.PeriphBurst = DMA_PBURST_SINGLE; HAL_DMA_Init(huart->hdmatx); huart->hdmatx->Parent = huart; HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA2_CLK_ENABLE(); /* DMA interrupt init */ }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); /* DMA interrupt init */ /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 7, 0); HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 8, 0); HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 7, 0); HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 2, 0); HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 2, 0); HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 7, 0); HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn); /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 7, 0); HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA2_CLK_ENABLE(); /* DMA interrupt init */ HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 10, 0); HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); }
/** * @brief Configure the DMA controller according to the Stream parameters * defined in main.h file * @note This function is used to : * -1- Enable DMA2 clock * -2- Select the DMA functional Parameters * -3- Select the DMA instance to be used for the transfer * -4- Select Callbacks functions called after Transfer complete and Transfer error interrupt detection * -5- Initialize the DMA stream * -6- Configure NVIC for DMA transfer complete/error interrupts * -7- Start the DMA transfer using the interrupt mode * @param None * @retval None */ static void DMA_Config(void) { /*## -1- Enable DMA2 clock #################################################*/ __DMA2_CLK_ENABLE(); /*##-2- Select the DMA functional Parameters ###############################*/ DmaHandle.Init.Channel = DMA_CHANNEL; /* DMA_CHANNEL_0 */ DmaHandle.Init.Direction = DMA_MEMORY_TO_MEMORY; /* M2M transfer mode */ DmaHandle.Init.PeriphInc = DMA_PINC_ENABLE; /* Peripheral increment mode Enable */ DmaHandle.Init.MemInc = DMA_MINC_ENABLE; /* Memory increment mode Enable */ DmaHandle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; /* Peripheral data alignment : Word */ DmaHandle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; /* memory data alignment : Word */ DmaHandle.Init.Mode = DMA_NORMAL; /* Normal DMA mode */ DmaHandle.Init.Priority = DMA_PRIORITY_HIGH; /* priority level : high */ DmaHandle.Init.FIFOMode = DMA_FIFOMODE_DISABLE; /* FIFO mode disabled */ DmaHandle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; DmaHandle.Init.MemBurst = DMA_MBURST_SINGLE; /* Memory burst */ DmaHandle.Init.PeriphBurst = DMA_PBURST_SINGLE; /* Peripheral burst */ /*##-3- Select the DMA instance to be used for the transfer : DMA2_Stream0 #*/ DmaHandle.Instance = DMA_STREAM; /*##-4- Select Callbacks functions called after Transfer complete and Transfer error */ DmaHandle.XferCpltCallback = TransferComplete; DmaHandle.XferErrorCallback = TransferError; /*##-5- Initialize the DMA stream ##########################################*/ if(HAL_DMA_Init(&DmaHandle) != HAL_OK) { /* Turn LED3/LED4 on: in case of Initialization Error */ BSP_LED_On(LED3); BSP_LED_On(LED4); while(1) { } } /*##-6- Configure NVIC for DMA transfer complete/error interrupts ##########*/ HAL_NVIC_SetPriority(DMA_STREAM_IRQ, 0, 0); HAL_NVIC_EnableIRQ(DMA_STREAM_IRQ); /*##-7- Start the DMA transfer using the interrupt mode ####################*/ /* Configure the source, destination and buffer size DMA fields and Start DMA Stream transfer */ /* Enable All the DMA interrupts */ if(HAL_DMA_Start_IT(&DmaHandle, (uint32_t)&aSRC_Const_Buffer, (uint32_t)&aDST_Buffer, BUFFER_SIZE) != HAL_OK) { /* Turn LED3/LED4 on: Transfer error */ BSP_LED_On(LED3); BSP_LED_On(LED4); while(1) { } } }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA2_CLK_ENABLE(); /* DMA interrupt init */ /* Sets the priority grouping field */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2); HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); DownlinkDMA1_Init(); DownlinkDMA2_Init(); DownlinkDMA3_Init(); DownlinkDMA4_Init(); UplinkDMA1_Init(); UplinkDMA2_Init(); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); /* DMA interrupt init */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); HAL_NVIC_SetPriority(DMA2_Channel2_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Channel2_IRQn); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); /* DMA interrupt init */ HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0); /* SPI */ HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 1, 0); /* SPI */ HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 2, 0); /* I2C */ HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 3, 0); /* UART */ HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); }
void ClockEnable (void) { __GPIOA_CLK_ENABLE(); __GPIOB_CLK_ENABLE(); __GPIOC_CLK_ENABLE(); __GPIOD_CLK_ENABLE(); __GPIOE_CLK_ENABLE(); __GPIOF_CLK_ENABLE(); __GPIOG_CLK_ENABLE(); __GPIOH_CLK_ENABLE(); __ADC1_CLK_ENABLE(); __ADC2_CLK_ENABLE(); __DAC_CLK_ENABLE(); __FSMC_CLK_ENABLE(); __SPI2_CLK_ENABLE(); __DMA2_CLK_ENABLE(); __TIM1_CLK_ENABLE(); __TIM2_CLK_ENABLE(); }
/** * Enable DMA controller clock */ void MX_DMA_Init(void) { /* DMA controller clock enable */ __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); /* DMA interrupt init */ HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 7); HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 0, 7); HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn); HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 7); HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); }
void dma_init(DMA_HandleTypeDef *dma, DMA_Stream_TypeDef *dma_stream, const DMA_InitTypeDef *dma_init, uint32_t dma_channel, uint32_t direction, void *data) { int dma_id = get_dma_id(dma_stream); //printf("dma_init(%p, %p(%d), 0x%x, 0x%x, %p)\n", dma, dma_stream, dma_id, (uint)dma_channel, (uint)direction, data); // TODO possibly don't need to clear the entire structure memset(dma, 0, sizeof(*dma)); // set global pointer for IRQ handler dma_handle[dma_id] = dma; // initialise parameters dma->Instance = dma_stream; dma->Init = *dma_init; dma->Init.Direction = direction; dma->Init.Channel = dma_channel; // half of __HAL_LINKDMA(data, xxx, *dma) // caller must implement other half by doing: data->xxx = dma dma->Parent = data; // if this stream was previously configured for this channel then we // can skip most of the initialisation if (dma_last_channel[dma_id] == dma_channel) { goto same_channel; } dma_last_channel[dma_id] = dma_channel; // enable clock for needed DMA peripheral if (dma_id <= 7) { __DMA1_CLK_ENABLE(); } else { __DMA2_CLK_ENABLE(); } // reset and configure DMA peripheral HAL_DMA_DeInit(dma); HAL_DMA_Init(dma); HAL_NVIC_SetPriority(dma_irqn[dma_id], 6, 0); same_channel: HAL_NVIC_EnableIRQ(dma_irqn[dma_id]); }
void initSerial() { __DMA2_CLK_ENABLE(); HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); huart1.Instance = USART1; huart1.Init.BaudRate = BAUDRATE; huart1.Init.WordLength = UART_WORDLENGTH_8B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; huart1.Init.Mode = UART_MODE_TX_RX; huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart1.Init.OverSampling = UART_OVERSAMPLING_16; HAL_UART_Init(&huart1); sendSerialString("[OK] Serial started..\n"); /* Start the receiver */ HAL_UART_Receive_DMA(&huart1, &rxBuffer, 1); }
void HAL_MspInit(void) { /* Set the system clock */ SystemClock_Config(); /* Config Systick */ HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); /* Enable GPIO clocks */ __GPIOA_CLK_ENABLE(); __GPIOB_CLK_ENABLE(); __GPIOC_CLK_ENABLE(); __GPIOD_CLK_ENABLE(); __GPIOE_CLK_ENABLE(); #ifdef OPENMV2 __GPIOF_CLK_ENABLE(); __GPIOG_CLK_ENABLE(); #endif /* Enable DMA clocks */ __DMA2_CLK_ENABLE(); /* Conigure DCMI GPIO */ GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.Pull = GPIO_PULLDOWN; GPIO_InitStructure.Speed = GPIO_SPEED_LOW; GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStructure.Pin = DCMI_RESET_PIN; HAL_GPIO_Init(DCMI_RESET_PORT, &GPIO_InitStructure); GPIO_InitStructure.Pin = DCMI_PWDN_PIN; HAL_GPIO_Init(DCMI_PWDN_PORT, &GPIO_InitStructure); /* Configure SD CD PIN */ GPIO_InitStructure.Pin = SD_CD_PIN; GPIO_InitStructure.Pull = GPIO_NOPULL; GPIO_InitStructure.Speed = GPIO_SPEED_LOW; GPIO_InitStructure.Mode = GPIO_MODE_INPUT; HAL_GPIO_Init(SD_CD_PORT, &GPIO_InitStructure); }
/** * @brief Initializes the DCMI MSP. * @param None * @retval None */ static void DCMI_MspInit(void) { static DMA_HandleTypeDef hdma; GPIO_InitTypeDef GPIO_Init_Structure; DCMI_HandleTypeDef *hdcmi = &hdcmi_eval; /*** Enable peripherals and GPIO clocks ***/ /* Enable DCMI clock */ __DCMI_CLK_ENABLE(); /* Enable DMA2 clock */ __DMA2_CLK_ENABLE(); /* Enable GPIO clocks */ __GPIOA_CLK_ENABLE(); __GPIOH_CLK_ENABLE(); __GPIOI_CLK_ENABLE(); /*** Configure the GPIO ***/ /* Configure DCMI GPIO as alternate function */ GPIO_Init_Structure.Pin = GPIO_PIN_6; GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP; GPIO_Init_Structure.Pull = GPIO_PULLUP; GPIO_Init_Structure.Speed = GPIO_SPEED_HIGH; GPIO_Init_Structure.Alternate = GPIO_AF13_DCMI; HAL_GPIO_Init(GPIOA, &GPIO_Init_Structure); GPIO_Init_Structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 |\ GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_14; GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP; GPIO_Init_Structure.Pull = GPIO_PULLUP; GPIO_Init_Structure.Speed = GPIO_SPEED_HIGH; GPIO_Init_Structure.Alternate = GPIO_AF13_DCMI; HAL_GPIO_Init(GPIOH, &GPIO_Init_Structure); GPIO_Init_Structure.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |\ GPIO_PIN_7; GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP; GPIO_Init_Structure.Pull = GPIO_PULLUP; GPIO_Init_Structure.Speed = GPIO_SPEED_HIGH; GPIO_Init_Structure.Alternate = GPIO_AF13_DCMI; HAL_GPIO_Init(GPIOI, &GPIO_Init_Structure); /*** Configure the DMA streams ***/ /* Configure the DMA handler for Transmission process */ hdma.Init.Channel = DMA_CHANNEL_1; hdma.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma.Init.PeriphInc = DMA_PINC_DISABLE; hdma.Init.MemInc = DMA_MINC_ENABLE; hdma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; hdma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; hdma.Init.Mode = DMA_CIRCULAR; hdma.Init.Priority = DMA_PRIORITY_HIGH; hdma.Init.FIFOMode = DMA_FIFOMODE_DISABLE; hdma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; hdma.Init.MemBurst = DMA_MBURST_SINGLE; hdma.Init.PeriphBurst = DMA_PBURST_SINGLE; hdma.Instance = DMA2_Stream1; /* Associate the initialized DMA handle to the DCMI handle */ __HAL_LINKDMA(hdcmi, DMA_Handle, hdma); /*** Configure the NVIC for DCMI and DMA ***/ /* NVIC configuration for DCMI transfer complete interrupt */ HAL_NVIC_SetPriority(DCMI_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DCMI_IRQn); /* NVIC configuration for DMA2 transfer complete interrupt */ HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); /* Configure the DMA stream */ HAL_DMA_Init(hdcmi->DMA_Handle); }
void SpiDma_Init(void) { /* DMA interrupt */ DMA2->HIFCR = 0xffffffff; /* Make sure all the IF are cleared */ HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn); __DMA2_CLK_ENABLE(); __SPI5_CLK_ENABLE(); /* DMA2 configuration and intialization */ DMA2_Stream4->CR &= 0xf0100000; while(DMA2_Stream4->CR & 1); /* Wait until DMA is disabled */ DMA2_Stream4->NDTR = COMPLETE_NDTR; /* Number of data transfers */ DMA2_Stream4->PAR = (uint32_t)(&(SPI5->DR)); #ifndef NO_SDRAM DMA2_Stream4->M0AR = (uint32_t)(((uint8_t *)dcmi_buff)); /* DMA address registers */ DMA2_Stream4->M1AR = (uint32_t)(((uint8_t *)dcmi_buff)); #else DMA2_Stream4->M0AR = (uint32_t)(&(dcmi_buff[0])); /* DMA address registers */ DMA2_Stream4->M1AR = (uint32_t)(&(dcmi_buff[0])); #endif DMA2_Stream4->CR |= /* Channel [0,7] */ 2<<25| \ /* Mburst */ 1<<23| \ /* Pburst */ 1<<21| \ /* Current target */ 0<<19| \ /* Double buffer */ 1<<18| \ /* Priority [0,3] */ 3<<16| \ /* Per inc offset (0= %Psize) */ 0<<15| \ /* Mem size */ 0<<13| \ /* Periph size (0b00=8bits) */ 0<<11| \ /* Memory increment */ 1<<10| \ /* Periph increment */ 0<< 9| \ /* Circular mode */ 1<< 8| \ /* Dir (0b01 == M2P) */ 1<< 6| \ /* Periph flow controller */ 0<< 5| \ /* Transfer complete IE */ 0<< 4| \ /* Half transfer IE */ 1<< 3| \ /* Transfer error IE */ 0<< 2| \ /* Direct mode error IE */ 0<< 1| \ /* Stream EN/Ready */ 0<< 0; DMA2_Stream4->FCR |= /* FIFO error IE */ 0<< 7| \ /* Direct mode disable */ 0<< 2| \ /* FIFO thres (1/4)*(X+1)*/ 0<< 0; DMA2_Stream4->CR |= 1; /* Enable */ while(!(DMA2_Stream4->CR & 1)); /* Wait until DMA is enabled */ /* SPI configuration and intialization */ SPI5->CR1 &= 0x0000; /* Clear all non-reserved bits */ SPI5->CR2 &= 0xff08; while(SPI5->CR1 & 0x0040); /* Wait until peripheral is disabled */ SPI5->CR1 |= /* BIDIMODE */ 0<<15| \ /* BIDIOE */ 0<<14| \ /* CRCEN */ 0<<13| \ /* CRCNEXT */ 0<<12| \ /* Data frame 0=8b, 1=16b */ 0<<11| \ /* RX only */ 0<<10| \ /* Slave management */ 0<< 9| \ /* Slave select */ 0<< 8| \ /* LSBfirst */ 0<< 7| \ /* SPI enable */ 0<< 6| \ /* Baud rate control */ 0<< 3| \ /* Master selection */ 0<< 2| \ /* Clock polarity when idle */ 1<< 1| \ /* Clock phase */ 0<< 0; SPI5->CR2 |= /* TXEIE */ 0<< 7| \ /* RXNEIE */ 0<< 6| \ /* Error interrupt enable */ 0<< 5| \ /* Frame format */ 0<< 4| \ /* SS output enable */ 0<< 2| \ /* TXDMAEN */ 1<< 1| \ /* RXDMAEN */ 0<< 0; }
void DcmiDma_Init(void) { /* DMA and DCMI interrupts */ DMA2->LIFCR = 0xffffffff; /* Make sure all the IF are cleared */ DCMI->ICR = 0x1f; #if DEB_INT HAL_NVIC_SetPriority(DCMI_IRQn, 5, 0); /* Enable interrupts */ HAL_NVIC_EnableIRQ(DCMI_IRQn); HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); #endif __DMA2_CLK_ENABLE(); __DCMI_CLK_ENABLE(); /* DMA2 configuration and intialization */ DMA2_Stream1->CR &= 0xf0100000; while(DMA2_Stream1->CR & 1); /* Wait until DMA is disabled */ DMA2_Stream1->NDTR = (uint32_t)(IMG_W*IMG_H/2);/* Number of data transfers */ DMA2_Stream1->PAR = (uint32_t)(&(DCMI->DR)); #ifndef NO_SDRAM DMA2_Stream1->M0AR = (uint32_t)(dcmi_buff); /* DMA address registers */ DMA2_Stream1->M1AR = (uint32_t)(dcmi_buff); #else DMA2_Stream1->M0AR = (uint32_t)(&(dcmi_buff[0])); /* DMA address registers */ DMA2_Stream1->M1AR = (uint32_t)(&(dcmi_buff[0])); #endif DMA2_Stream1->CR |= /* Channel [0,7] */ 1<<25| \ /* Mburst */ 0<<23| \ /* Pburst */ 0<<21| \ /* Current target */ 0<<19| \ /* Double buffer */ 0<<18| \ /* Priority [0,3] */ 2<<16| \ /* Per inc offset (0= %Psize) */ 1<<15| \ /* Mem size (0b10=32bits) */ 2<<13| \ /* Periph size (0b10=32bits) */ 2<<11| \ /* Memory increment */ 1<<10| \ /* Periph increment */ 0<< 9| \ /* Circular mode */ 1<< 8| \ /* Dir (0b00 == P2M) */ 0<< 6| \ /* Periph flow controller */ 0<< 5| \ /* Transfer complete IE */ 0<< 4| \ /* Half transfer IE */ 0<< 3| \ /* Transfer error IE */ 0<< 2| \ /* Direct mode error IE */ 0<< 1| \ /* Stream EN/Ready */ 0<< 0; DMA2_Stream1->FCR |= /* FIFO error IE */ 0<< 7| \ /* Direct mode disable */ 1<< 2| \ /* FIFO thres (1/4)*(X+1)*/ 3<< 0; DMA2_Stream1->CR |= 1; /* Enable */ while(!(DMA2_Stream1->CR & 1)); /* Wait until DMA is enabled */ /* DCMI configuration and intialization */ DCMI->CR &= 0xffffb000; /* Clear all non-reserved bits */ while(DCMI->CR & 0x00004000); /* Wait until peripheral is disabled */ DCMI->CR |= /* Extended data 00 = 8 bit*/ 0<<10| \ /* Frame capture 00 = all */ 0<< 9| \ /* VSPOL*/ 1<< 7| \ /* HSPOL */ 0<< 6| \ /* PCK polarity */ 1<< 5| \ /* Embedded syncro */ 0<< 4| \ /* JPEG */ 0<< 3| \ /* Crop*/ 0<< 2| \ /* Capture mode, 0 = continuous */ 0<< 1| \ /* Capture enable */ 1<< 0; DCMI->IER = /* LINE_IE */ 0<< 4| \ /* VSYNC_IE */ 0<< 3| \ /* ERR_IE */ 0<< 2| \ /* OVR_IE */ 0<< 1| \ /* FRAME_IE */ 0<< 0; DCMI->CR |= 0x00004000; /* Enable DCMI */ while(!(DCMI->CR & 0x00004000)); /* Wait until enabled */ }
/////////////////////////////////////////////////////////////////////////////// /// @brief Initializes all system components void sysInitialize(void) { HAL_Init(); // system clock setup halSystemClockConfig(); // GPIO Ports Clock Enable __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __DMA1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); // Init drivers halRTCInit(); sysHighresTimerInit(); drvServoInit(); drvPPMInit(); //imuInitialize(); // load configuration cfgStorageInit(); cfgLoadDefaultConfiguration(); cfgLoadConfiguration(); // init uarts halUARTInit(); // Init communication interfaces comManagerInit(); //comUARTInit(); //comUDPInit(); //comHIDInit(); //cfgSaveConfiguration(); // init commuication //comManagerInit(); //comUARTInit(); /* uint8_t i; // load configuration cfgStorageInit(); cfgLoadDefaultConfiguration(); cfgLoadConfiguration(); // init uarts for (i = 0; i < drvUART_MAX_COUNT; i++) { drvUARTInit(i); } // init commuication comManagerInit(); comUDPInit(); comUARTInit(); //comESP8266Init(); //drvEthernetInit(); //comManagerInit(); //UARTInit(0); //telemetryInit(); */ }
void new_spi_init(void) { GPIO_InitTypeDef gpioInitStructure; DMA_HandleTypeDef dma_is; HAL_SPI_MspInit(&SpiHandle); __SPI1_CLK_ENABLE(); __DMA2_CLK_ENABLE(); // SPI2 SCK and MOSI gpioInitStructure.Pin = SPI1_SCK.pin; gpioInitStructure.Speed = GPIO_SPEED_HIGH; gpioInitStructure.Mode = GPIO_MODE_AF_PP; gpioInitStructure.Alternate = GPIO_AF5_SPI1; gpioInitStructure.Pull = GPIO_NOPULL; HAL_GPIO_Init(SPI1_SCK.port, &gpioInitStructure); gpioInitStructure.Pin = SPI1_MOSI.pin; gpioInitStructure.Speed = GPIO_SPEED_HIGH; gpioInitStructure.Mode = GPIO_MODE_AF_PP; gpioInitStructure.Pull = GPIO_NOPULL; gpioInitStructure.Alternate = GPIO_AF5_SPI1; HAL_GPIO_Init(SPI1_MOSI.port, &gpioInitStructure); // SPI2 MISO gpioInitStructure.Pin = SPI1_MISO.pin; gpioInitStructure.Speed = GPIO_SPEED_HIGH; gpioInitStructure.Mode = GPIO_MODE_INPUT; gpioInitStructure.Pull = GPIO_PULLUP; gpioInitStructure.Alternate = GPIO_AF5_SPI1; HAL_GPIO_Init(SPI1_MISO.port, &gpioInitStructure); // RFID NSS gpioInitStructure.Pin = LCD_NSS.pin; gpioInitStructure.Speed = GPIO_SPEED_HIGH; gpioInitStructure.Mode = GPIO_MODE_OUTPUT_PP; gpioInitStructure.Pull = GPIO_NOPULL; gpioInitStructure.Alternate = 0; HAL_GPIO_Init(LCD_NSS.port, &gpioInitStructure); HAL_GPIO_WritePin(LCD_NSS.port, LCD_NSS.pin, 1); // TBD - should this be before init? SpiHandle.Instance = SPI1; SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; SpiHandle.Init.Mode = SPI_MODE_MASTER; SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED; SpiHandle.Init.NSS = SPI_NSS_SOFT; SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; SpiHandle.Init.CLKPhase = SPI_PHASE_2EDGE; SpiHandle.Init.CLKPolarity = SPI_POLARITY_HIGH; SpiHandle.Init.CRCPolynomial = 7; HAL_SPI_Init(&SpiHandle); HAL_DMA_DeInit(&dma_is); dma_is.Instance = DMA2_Stream3; dma_is.Init.Channel = DMA_CHANNEL_3; dma_is.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; dma_is.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; dma_is.Init.MemInc = DMA_MINC_ENABLE; dma_is.Init.Direction = DMA_MEMORY_TO_PERIPH; dma_is.Init.PeriphInc = DMA_PINC_DISABLE; dma_is.Init.Mode = DMA_NORMAL; dma_is.Init.Priority = DMA_PRIORITY_HIGH; dma_is.Init.MemBurst = DMA_MBURST_SINGLE; dma_is.Init.PeriphBurst = DMA_PBURST_SINGLE; dma_is.Init.FIFOMode = DMA_FIFOMODE_ENABLE; HAL_DMA_Init(&dma_is); // FIXME: hdmatx is not correct, but im not sure what is either __HAL_LINKDMA(SpiHandle, hdmatx, dma_is); }