void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) { if(tim_baseHandle->Instance==TIM7) { /* USER CODE BEGIN TIM7_MspDeInit 0 */ /* USER CODE END TIM7_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM7_CLK_DISABLE(); /* Peripheral interrupt Deinit*/ HAL_NVIC_DisableIRQ(TIM7_IRQn); } /* USER CODE BEGIN TIM7_MspDeInit 1 */ /* USER CODE END TIM7_MspDeInit 1 */ }
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM1) { /* USER CODE BEGIN TIM1_MspDeInit 0 */ /* USER CODE END TIM1_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM1_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn); /* USER CODE BEGIN TIM1_MspDeInit 1 */ /* USER CODE END TIM1_MspDeInit 1 */ } else if(htim_base->Instance==TIM2) { /* USER CODE BEGIN TIM2_MspDeInit 0 */ /* USER CODE END TIM2_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM2_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM2_IRQn); /* USER CODE BEGIN TIM2_MspDeInit 1 */ /* USER CODE END TIM2_MspDeInit 1 */ } else if(htim_base->Instance==TIM3) { /* USER CODE BEGIN TIM3_MspDeInit 0 */ /* USER CODE END TIM3_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM3_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM3_IRQn); /* USER CODE BEGIN TIM3_MspDeInit 1 */ /* USER CODE END TIM3_MspDeInit 1 */ } else if(htim_base->Instance==TIM4) { /* USER CODE BEGIN TIM4_MspDeInit 0 */ /* USER CODE END TIM4_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM4_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM4_IRQn); /* USER CODE BEGIN TIM4_MspDeInit 1 */ /* USER CODE END TIM4_MspDeInit 1 */ } else if(htim_base->Instance==TIM5) { /* USER CODE BEGIN TIM5_MspDeInit 0 */ /* USER CODE END TIM5_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM5_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM5_IRQn); /* USER CODE BEGIN TIM5_MspDeInit 1 */ /* USER CODE END TIM5_MspDeInit 1 */ } else if(htim_base->Instance==TIM6) { /* USER CODE BEGIN TIM6_MspDeInit 0 */ /* USER CODE END TIM6_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM6_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn); /* USER CODE BEGIN TIM6_MspDeInit 1 */ /* USER CODE END TIM6_MspDeInit 1 */ } else if(htim_base->Instance==TIM7) { /* USER CODE BEGIN TIM7_MspDeInit 0 */ /* USER CODE END TIM7_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM7_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM7_IRQn); /* USER CODE BEGIN TIM7_MspDeInit 1 */ /* USER CODE END TIM7_MspDeInit 1 */ } else if(htim_base->Instance==TIM8) { /* USER CODE BEGIN TIM8_MspDeInit 0 */ /* USER CODE END TIM8_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM8_CLK_DISABLE(); /* Peripheral interrupt DeInit*/ HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn); /* USER CODE BEGIN TIM8_MspDeInit 1 */ /* USER CODE END TIM8_MspDeInit 1 */ } }