int main()
{
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISAbits.TRISA4 = 0; // RA4 is output
TRISBbits.TRISB4 = 1; // RB4 is input
LATAbits.LATA4 = 1; // LED is on
__builtin_enable_interrupts();
while(1)
{
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
_CP0_SET_COUNT(0);
LATAINV = 0b10000;
for(;_CP0_GET_COUNT()<(WAIT_TIME+1);)
{
while(!PORTBbits.RB4){;}
}
}
}
/*TODO with this implementation it cannot be nested*/
int32_t platform_set_global_interrupts(int32_t status)
{
if (status == FALSE)
return __builtin_disable_interrupts();
else {
__builtin_mtc0(12, 0, status);
return 0;
}
}
int main()
{
char whoamiCheck = 0;
unsigned char data[14];
short output[7];
int oc1New = 0;
int oc2New = 0;
// PIC32 Setup
__builtin_disable_interrupts();
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
BMXCONbits.BMXWSDRM = 0x0; // 0 data RAM access wait states
INTCONbits.MVEC = 0x1; // enable multi vector interrupts
DDPCONbits.JTAGEN = 0; // disable JTAG to get pins back
TRISAbits.TRISA4 = 0; // RA4 output
TRISBbits.TRISB4 = 1; // RB4 input
LATAbits.LATA4 = 0; // LED off
i2cMasterSetup();
tim2Setup();
oc1Setup();
oc2Setup();
__builtin_enable_interrupts();
whoamiCheck = i2cMasterRead(IMU_ADDR,WHO_AM_I);
if (whoamiCheck == WHOAMI_VAL)
{
LATAbits.LATA4 = 1;
}
while(1)
{
_CP0_SET_COUNT(0);
i2cMasterReadAll(IMU_ADDR,OUT_TEMP_L,14,data);
char2short(data,output,14);
oc1New = (PER2+1)/2+(output[4]/20);
oc2New = (PER2+1)/2+(output[5]/20);
if(oc1New>(PER2+1)){
oc1New=(PER2+1);
}
if(oc2New>(PER2+1)){
oc2New=(PER2+1);
}
OC1RS = oc1New;
OC2RS = oc2New;
LATAbits.LATA4 = !LATAbits.LATA4;
while(_CP0_GET_COUNT()<UPDATER){
;
}
}
}
// Perform startup routines:
// Make NU32_LED1 and NU32_LED2 pins outputs (NU32_USER is by default an input)
// Initialize the serial port - UART3 (no interrupt)
// Enable interrupts
void NU32_Startup() {
// disable interrupts
__builtin_disable_interrupts();
// enable the cache
// This command sets the CP0 CONFIG register
// the lower 4 bits can be either 0b0011 (0x3) or 0b0010 (0x2)
// to indicate that kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core" of the PIC32 reference manual
// most of the other bits have prescribed values
// microchip does not provide a _CP0_SET_CONFIG macro, so we directly use
// the compiler built-in command _mtc0
// to disable cache, use 0xa4210582
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// set the prefectch cache wait state to 2, as per the
// electrical characteristics data sheet
CHECONbits.PFMWS = 0x2;
//enable prefetch for cacheable and noncacheable memory
CHECONbits.PREFEN = 0x3;
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get B10, B11, B12 and B13 back
DDPCONbits.JTAGEN = 0;
TRISFCLR = 0x0003; // Make F0 and F1 outputs (LED1 and LED2)
NU32_LED1 = 1; // LED1 is off
NU32_LED2 = 0; // LED2 is on
// turn on UART3 without an interrupt
U3MODEbits.BRGH = 0; // set baud to NU32_DESIRED_BAUD
U3BRG = ((NU32_SYS_FREQ / NU32_DESIRED_BAUD) / 16) - 1;
// 8 bit, no parity bit, and 2 stop bit (8N2 setup)
U3MODEbits.PDSEL = 0;
U3MODEbits.STSEL = 0;
// configure TX & RX pins as output & input pins
U3STAbits.UTXEN = 1;
U3STAbits.URXEN = 1;
// configure hardware flow control using RTS and CTS
U3MODEbits.UEN = 0;
// enable the uart
U3MODEbits.ON = 1;
__builtin_enable_interrupts();
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISAbits.TRISA4=0;
TRISBbits.TRISB4=1;
//spi_init();
i2c_master_setup();
// readaddress();
init_OC();
setlsm(0x10,0b10000000);
setlsm(0x11,0b10000000);
setlsm(0x12,0b00000100);
// i2c_readmulti();
__builtin_enable_interrupts();
LATAbits.LATA4=0;
while(1){
_CP0_SET_COUNT(0);
//LATAINV = 0x10; // make sure timer2 works
/*
if(PORTBbits.RB4==0)
{
if(read == 0x69)
LATAbits.LATA4=1;
else
LATAbits.LATA4=0;
}
else
LATAbits.LATA4=0;
*/
while(_CP0_GET_COUNT() < 480000) {
;
}
i2c_readmulti();
}
}
void i2c_master_setup() {
int ie = __builtin_disable_interrupts();
I2C1BRG = 90; // I2CBRG = [1/(2*Fsck) - PGD]*Pblck - 2
// Fsck is the frequency (usually 100khz or 400 khz), PGD = 104ns
// this is 400 khz mode
// enable the i2c interrupts
IPC8bits.I2C1IP = 1; // master has interrupt priority 1
IEC1bits.I2C1MIE = 1; // master interrupt is enabled
IFS1bits.I2C1MIF = 0; // clear the interrupt flag
I2C1CONbits.ON = 1; // turn on the I2C2 module
if(ie & 1) {
__builtin_enable_interrupts();
}
}
UBaseType_t uxPortSetInterruptMaskFromISR( void )
{
UBaseType_t uxSavedStatusRegister;
__builtin_disable_interrupts();
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
/* This clears the IPL bits, then sets them to
configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
from an interrupt that has a priority above
configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
can only result in the IPL being unchanged or raised, and therefore never
lowered. */
_CP0_SET_STATUS( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
return uxSavedStatusRegister;
}
int main(int argc, char** argv) {
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
BMXCONbits.BMXWSDRM = 0x0;
INTCONbits.MVEC = 0x1;
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
ANSELA = 0; // A Analogic off
ANSELB = 0; // B Analogic off
TRISBbits.TRISB2 = 0; // A4 output
TRISAbits.TRISA0 = 0; // A4 output
TRISAbits.TRISA4 = 0; // A4 output
TRISBbits.TRISB4 = 1; // B4 inuput
__builtin_disable_interrupts();
// starts the PINEX
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
BMXCONbits.BMXWSDRM = 0x0;
INTCONbits.MVEC = 0x1;
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
uart_init();
return 0;
start_PWM();
lcd_start();
while(1)
{
LATAbits.LATA4 = 0;
lcd_clearScreen(LCD_COLOR_BLACK);
lcd_printf("hello\nworld!",LCD_COLOR_WHITE);
//unsigned int t = timer_start();
//while (!timer_timeout(t, 500 * TIMER_MILLISECOND));
blink();
LATAbits.LATA4 = 1;
lcd_clearScreen(LCD_COLOR_WHITE);
lcd_printf("hello!",LCD_COLOR_BLACK);
//t = timer_start();
//while (!timer_timeout(t, 500 * TIMER_MILLISECOND));
}
return (EXIT_SUCCESS);
}
int main() {
char str[200];
ANSELBbits.ANSB13 = 0; // make analog input digital
U1RXRbits.U1RXR = 0b0000; // set U1RX to pin A2
RPB15Rbits.RPB15R = 0b0101; // set B15 to U1TX
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
// set up USER pin as input
TRISBbits.TRISB13 = 1;
// set up LED1 pin as a digital output
TRISBbits.TRISB7 = 0;
//use the functions to print "Hello world 1337!" at 28,32
int num = 1337;
display_init();
display_clear();
sprintf(str, "Hello world %d!", num);
display_oled(str,28,32);
return 0;
}
int main() {
unsigned char master_read = 0x00;
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
TRISAbits.TRISA4 = 1; //set port A4 (PIN12)as input pin for button input
TRISBbits.TRISB4 = 0; //set port B4 (PIN11)as output pin for LED
i2c_init();
i2c_imu_init();
__builtin_enable_interrupts();
//WHO_AM_I (0Fh)
i2c_master_start();
i2c_master_send(0xD6);
i2c_master_send(0x0F);
i2c_master_restart();
i2c_master_send(0xD7);
unsigned char input=i2c_master_recv();
i2c_master_ack(1);
i2c_master_stop();
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
__builtin_enable_interrupts();
TRISAbits.TRISA4 = 0; // set B4-B7 as digital outputs, 0-3 as digital inputs
TRISBbits.TRISB4 = 1;
while(1) {
_CP0_SET_COUNT(0);
LATAbits.LATA4=0;
while(_CP0_GET_COUNT()<12000){
;
}
_CP0_SET_COUNT(0);
LATAbits.LATA4=1;
while(_CP0_GET_COUNT()<12000){
;
}
while (PORTBbits.RB4==0){
;
}
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
}
}
int main() {
unsigned char master_read = 0x00;
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISAbits.TRISA4 = 1; //set portA4 as input pin for button input
TRISBbits.TRISB4 = 0; //set port B4 as output pin for LED
i2c_init();
i2c_expander_init();
__builtin_enable_interrupts();
while(1) {
master_read = getExpander();
if(master_read>>7 ==0x01)
{
setExpander(0,1);
}else{
setExpander(0,0);
}
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISAbits.TRISA4 = 0; //RA4 (PIN#12) for Green LED
LATAbits.LATA4 = 1;
TRISBbits.TRISB4 = 1; //RB4 (PIN#11) for pushbutton
__builtin_enable_interrupts();
while(1) {
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
_CP0_SET_COUNT(0);
while(_CP0_GET_COUNT() < 12000) {
;
}
if (PORTBbits.RB4 == 0) {
LATAbits.LATA4 = 1; // push button will make LED not blink.
}
else {
LATAINV = 0x10; // LED turn on/off for 0.5 ms, LED blinking.
}
}
}
void vHardwareConfigurePerformance( void )
{
/* set PBCLK2 to deliver 40Mhz clock for PMP/I2C/UART/SPI. */
SYSKEY = hwUNLOCK_KEY_0;
SYSKEY = hwUNLOCK_KEY_1;
/* 200MHz / 5 = 40MHz */
PB2DIVbits.PBDIV = 0b100;
/* Timers use clock PBCLK3, set this to 40MHz. */
PB3DIVbits.PBDIV = 0b100;
/* Ports use PBCLK4. */
PB4DIVbits.PBDIV = 0b000;
SYSKEY = 0;
/* Disable interrupts - note taskDISABLE_INTERRUPTS() cannot be used here as
FreeRTOS does not globally disable interrupt. */
__builtin_disable_interrupts();
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
//set port4A to digital out
TRISAbits.TRISA4 = 0;
LATAbits.LATA4 = 1;
_CP0_SET_COUNT(0);
__builtin_enable_interrupts();
while(1) {
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
if (_CP0_GET_COUNT()>2400000){
//change LED state
LATAbits.LATA4 = !LATAbits.LATA4;
//LATAbits.LATA4 = 0;
_CP0_SET_COUNT(0);
//LATAbits.LATA4 =1;j
}
}
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISAbits.TRISA4 = 0; // Set RA4 to output (green LED)
TRISBbits.TRISB4 = 1; // Set RB4 to input (user button)
LATAbits.LATA4 = 0; //Set green LED to 0 to start
__builtin_enable_interrupts();
_CP0_SET_COUNT(0);
while(1) {
if(_CP0_GET_COUNT()>=2400000){
LATAbits.LATA4 = !LATAbits.LATA4;
_CP0_SET_COUNT(0);
}
while(PORTBbits.RB4 == 0){
LATAbits.LATA4 = 0;
}
}
}
// Initializes the module and the peripherals it uses
void motor_init(void) {
// initializing the current control loop ISR - 5 kHz - Timer2
__builtin_disable_interrupts(); // INT step 2: disable interrupts at CPU
// INT step 3: setup TMR2 to call ISR at frequency of 5 kHz
PR2 = 15999; // set period register to 16,000
TMR2 = 0; // initialize count to 0
T2CONbits.TCKPS = 0; // set prescaler to 1:1
T2CONbits.ON = 1; // turn on Timer2
IPC2bits.T2IP = 5; // INT step 4: priority 5
IPC2bits.T2IS = 0; // subpriority 0
IFS0bits.T2IF = 0; // INT step 5: clear interrupt flag
IEC0bits.T2IE = 1; // INT step 6: enable interrupt
__builtin_enable_interrupts(); // INT step 7: enable interrupts at CPU
// initializing the PWM output - 20 kHz - Timer3
OC1CONbits.OCTSEL = 1; // Select Timer3 for comparison
T3CONbits.TCKPS = 0; // Timer3 prescaler N=1 (1:1)
PR3 = 3999; // period = (PR3+1) * N * 12.5 ns = 20 kHz
TMR3 = 0; // initial TMR3 count is 0
OC1CONbits.OCM = 0b110; // PWM mode with no fault pin; other OC1CON bits are defaults
OC1RS = 0; // duty cycle = OC1RS/(PR3+1) = 0%
OC1R = 0; // initialize before turning OC1 on; afterward it is read-only
T3CONbits.ON = 1; // turn on Timer3
OC1CONbits.ON = 1; // turn on OC1
// initializing the direction pin output - AN10/RB10 digital output
AD1PCFGbits.PCFG10 = 1; // pin AN10 is digital pin
TRISBbits.TRISB10 = 0; // RB10 is an output pin
LATBbits.LATB10 = 1;
}
int main(int argc, char** argv) {
__builtin_disable_interrupts();
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
BMXCONbits.BMXWSDRM = 0x0;
INTCONbits.MVEC = 0x1;
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
//TRISAbits.TRISA4=1;
TRISAbits.TRISA4 = 0;
TRISBbits.TRISB4 = 1;
__builtin_enable_interrupts();
int t = 24000;
int i = 0;
while(1) {
if (PORTBbits.RB4)
{
i = 22000;
}else
{
i = 3000;
}
//if (PORTBbits.RB4)
//__delay_ms(1000);
_CP0_SET_COUNT(0);
LATAbits.LATA4=1;
//__delay_ms(1000);
while (_CP0_GET_COUNT()<(t-i));
LATAbits.LATA4=0;
_CP0_SET_COUNT(0);
while (_CP0_GET_COUNT()<i);
//_CP0_SET_COUNT(0);
//_CP0_GET_COUNT();
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
}
return (EXIT_SUCCESS);
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISBbits.TRISB4 = 1; // Set B4 (push-button) as input pin
TRISAbits.TRISA4 = 0; // Set A4 (LED) as output
LATAbits.LATA4 = 1; // Set A4 as high
__builtin_enable_interrupts();
while(1) {
// Turn off LED while button is pressed
while(PORTBbits.RB4 == 0) {
LATAbits.LATA4 = 0;
}
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
// Toggle LED at 1000 Hz
if (_CP0_GET_COUNT() > 24000){
LATAbits.LATA4 = !LATAbits.LATA4;
_CP0_SET_COUNT(0);
}
}
}
Error send_packet(Data_Channel which_channel, uint8* data, uint8 data_size) {
uint interrupt_state;
Error ret = ERR_NO_ERR;
interrupt_state = __builtin_get_isr_state();
__builtin_disable_interrupts();
switch (which_channel) {
case PACKET_UART_CH_1:
send_UART(UART_CH_1, &(UART1_channel.control_byte), 1);
send_UART(UART_CH_1, &(data_size), 1);
ret = send_UART(UART_CH_1, data, data_size);
break;
case PACKET_UART_CH_2:
send_UART(UART_CH_2, &(UART2_channel.control_byte), 1);
send_UART(UART_CH_2, &(data_size), 1);
ret = send_UART(UART_CH_2, data, data_size);
break;
}
__builtin_set_isr_state(interrupt_state);
return ret;
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISBbits.TRISB4 = 1; // RB4 is an input
TRISAbits.TRISA4 = 0; // RA4 is an output
LATAbits.LATA4 = 1; // RA4 is set high
__builtin_enable_interrupts();
while(1) {
// use _CP0_SET_COUNT(0) and _CP0_GET_COUNT() to test the PIC timing
// remember the core timer runs at half the CPU speed
while(PORTBbits.RB4 == 0){} //wait while USER button is pressed
_CP0_SET_COUNT(0);
LATAbits.LATA4 = 1; // RA4 is set high
while (_CP0_GET_COUNT() < 12000){} // wait for 0.5ms
LATAbits.LATA4 = 0; // RA4 is set low
while (_CP0_GET_COUNT() < 24000){} // wait for 0.5ms
}
}
void systemInit(void)
{
//Execute system unlock sequence
SYSKEY = 0xAA996655;
SYSKEY = 0x556699AA;
//Check PBDIVRDY bit
while(!(PB2DIV & _PB2DIV_PBDIVRDY_MASK));
//Configure PBCLK2 clock divisor (SYSCLK / 5);
PB2DIV = _PB2DIV_ON_MASK | 4;
//Check PBDIVRDY bit
while(!(PB3DIV & _PB3DIV_PBDIVRDY_MASK));
//Configure PBCLK3 clock divisor (SYSCLK / 5);
PB3DIV = _PB3DIV_ON_MASK | 4;
//Check PBDIVRDY bit
while(!(PB4DIV & _PB4DIV_PBDIVRDY_MASK));
//Configure PBCLK4 clock divisor (SYSCLK / 1);
PB4DIV = _PB4DIV_ON_MASK | 0;
//Check PBDIVRDY bit
while(!(PB5DIV & _PB5DIV_PBDIVRDY_MASK));
//Configure PBCLK5 clock divisor (SYSCLK / 2);
PB5DIV = _PB5DIV_ON_MASK | 1;
//Relock the SYSKEY
SYSKEY = 0;
//Disable interrupts
__builtin_disable_interrupts();
//Set IV
_CP0_BIS_CAUSE(_CP0_CAUSE_IV_MASK);
//Enable multi-vectored mode
INTCONSET = _INTCON_MVEC_MASK;
}
void startup(void) {
// Startup code to run as fast as possible and get pins back from bad defaults
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
}
int main(void) {
// Cache on, min flash wait, interrupts on, LED/button init, UART init
NU32_Startup();
// =============================================================================================
// USER Button Interrupt
// =============================================================================================
__builtin_disable_interrupts(); // step 2: disable interrupts
INTCONCLR = 0x1; // step 3: INT0 triggers on falling edge
IPC2CLR = 0x1F << 24; // step 4: clear the 5 pri and subpri bits
IPC2 |= 9 << 24; // step 4: set priority to 2, subpriority to 1
IFS0bits.INT2IF = 0; // step 5: clear the int flag, or IFS0CLR=1<<3
IEC0SET = 1 << 11; // step 6: enable INT0 by setting IEC0<3>
__builtin_enable_interrupts(); // step 7: enable interrupts
// =============================================================================================
// PWM and digital output for piezoelectric droplet generator
// =============================================================================================
OC1CONbits.OCTSEL = 1; // Select Timer3 for comparison
T3CONbits.TCKPS = 0; // Timer3 prescaler N=1 (1:1)
PR3 = 3999; // period = (PR3+1) * N * 12.5 ns = 20 kHz
TMR3 = 0; // initial TMR3 count is 0
OC1CONbits.OCM = 0b110; // PWM mode with no fault pin; other OC1CON bits are defaults
OC1RS = 0; // duty cycle = OC1RS/(PR3+1) = 75%
OC1R = 0; // initialize before turning OC1 on; afterward it is read-only
T3CONbits.ON = 1; // turn on Timer3
OC1CONbits.ON = 1; // turn on OC1
// Set A10/A2 to digital output pins
TRISAbits.TRISA10 = 0; // RA10 is an output pin
TRISAbits.TRISA2 = 0; // RA2 is an output pin
//-Vcc: set L1 to HIGH, L2 to LOW, PWMA to >0
OC1RS = 4000;
LATAbits.LATA10 = 1;
LATAbits.LATA2 = 0;
/*
// =============================================================================================
// TrackCam ExSync Trigger
// =============================================================================================
// Set A3 to digital output pin
TRISAbits.TRISA3 = 0; // RA3 is an output pin
//Set A3 to HIGH
LATAbits.LATA3 = 1;
*/
// =============================================================================================
// Keep program running to look for interrupts
// =============================================================================================
while(1) {
;
}
return 0;
}
int main(void)
{
//Startup code to run as fast as possible and get pins back from bad defaults
__builtin_disable_interrupts(); //Disable interrupts for configuration
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210582);
//no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
// Pin B13 as USER Pin
ANSELBbits.ANSB13 = 0; // pin B13 as digital
TRISBbits.TRISB13 = 1; // pin B13 as input
// Pin B7 as digital output (LED1)
TRISBbits.TRISB7 = 0; // pin B7 as output
LATBbits.LATB7 = 1; // LED1 ON
// Pin B15 as output compare OC1, using Timer2 (1kHz)
RPB15Rbits.RPB15R = 0b0101; // RB15 as OC1 (see Ouput Pin Selection TAble 11-2)
T2CONbits.TCKPS = 0; // Prescaler N=1
PR2 = 39999; // period = (PR2+1) * N * 25ns = 1ms, 10kHz --> period = 1ms
TMR2 = 0; // initialize timer to 0
OC1CONbits.OCM = 0b110; // PWM mode without fault pin;
OC1RS = 10000; // 25% duty cycle (PR2+1)/2 = 10000
OC1R = 20000; // initialize OC1 on; larter read-only
T2CONbits.ON = 1; // turn on Timer2
OC1CONbits.ON = 1; // turn on OC1
// set up A0 as AN0
ANSELAbits.ANSA0 = 1;
AD1CON3bits.ADCS = 3;
AD1CHSbits.CH0SA = 0;
AD1CON1bits.ADON = 1;
// Set up timer1 for ISR
T1CONbits.TCKPS = 0b01; // Prescaler N=8
// T1CONbits.TGATE = 0; //(default)
// T1CONbits.TCS = 0; //(default)
PR1 = 499; // period = (PR1+1) * N * 25ns = 0.1ms, 10 kHz
TMR1 = 0; // initialize timer to 0
T1CONbits.ON = 1; // turn on Timer1
// Set Interrupt for Timer1
IPC1bits.T1IP = 7; // INT step 4: priority 7
IPC1bits.T1IS = 0; // subpriority 0
IFS0bits.T1IF = 0; // INT step 5: clear interrupt flag
IEC0bits.T1IE = 1; // INT step 6: enable interrupt
__builtin_enable_interrupts(); //re enable interrupts after configuration is complete
// Main while loop
while (1)
{
_CP0_SET_COUNT(0); // Reset core counter
while(_CP0_GET_COUNT() < 10000000) //The CP0 timer runs at 20kHZ (Half the core frequency)
{ if (PORTBbits.RB13 == 0){
break; } } //Skip the wait if USER Pin B13 is pushed
if (PORTBbits.RB13 == 1){ LATBINV = 0x0080; } // toggle LED1
else{ LATBbits.LATB7 = 1; } // LED1 ON
//*****This logic is better in an an ISR to guarantee a smoother dimmer*****//
// unsigned int ADCval;
// ADCval = readADC(); // read ADC (0-1024)
// OC1RS = 40000* ADCval/1024; //convert ADV calue to duty cycle
}
}
int main() {
// Startup code to run as fast as possible and get pins back from bad defaults
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
// set up USER pin (RB13) as a digital input
ANSELBbits.ANSB13 = 0;
TRISBbits.TRISB13 = 1;
// set up LED1 pin (RB7) as a digital output
RPB7Rbits.RPB7R = 0b0001;
TRISBbits.TRISB7 = 0;
LATBbits.LATB7 = 1;
// set up LED2 as OC1 using Timer2 at 1kHz
RPB15Rbits.RPB15R = 0b0101;
T2CONbits.TCKPS = 2; // Timer2 prescaler N=4 (1:4)
PR2 = 9999; // period = (PR2+1) * N * 25 ns = 1 ms, 1 kHz
TMR2 = 0; // initial TMR2 count is 0
OC1CONbits.OCM = 0b110; // PWM mode without fault pin; other OC1CON bits are defaults
OC1RS = 5000; // duty cycle = OC1RS/(PR2+1) = 50%
OC1R = 5000; // initialize before turning OC1 on; afterward it is read-only
T2CONbits.ON = 1; // turn on Timer2
OC1CONbits.ON = 1; // turn on OC1
// set up A0 as AN0
ANSELAbits.ANSA0 = 1;
AD1CON3bits.ADCS = 3;
AD1CHSbits.CH0SA = 0;
AD1CON1bits.ADON = 1;
display_init();
display_clear();
char message[20];
int num = 1337;
sprintf(message, "Hello World %d!",num);
display_now(message, 28, 32);
while (1) {
_CP0_SET_COUNT(0); // set core timer to 0, remember it counts at half the CPU clock
LATBINV = 0x0080; // invert a pin
// wait for half a second, setting LED brightness to pot angle while waiting
while (_CP0_GET_COUNT() < 10000000) {
OC1RS = readADC() * PR2/1024;
if (PORTBbits.RB13 == 1) {
// nothing
} else {
LATBINV = 0x0080;
}
}
}
}
int main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
initSPI1();
initI2C2();
i2c_master_setup();
initExpander();
//sine wave
int sine[1000];
int i;
for(i = 0; i < 1000; i++){
sine[i] = 128 + 127*sin(2*3.14*10*i/1000);
}
int triangle[1000];
i = 0;
for(i = 0; i < 1000; i++){
triangle[i] = .256*i;
}
i = 0;
while(1) {
_CP0_SET_COUNT(0);
if(_CP0_GET_COUNT() > 24000){
i++;
setVoltage(0, sine[i]);
setVoltage(1, triangle[i]);
_CP0_SET_COUNT(0);
}
if(i > 1000){
i = 0;
}
char status = getExpander(); //read the expander
char g7 = (status & 0x80) >> 7; //get level of pin g7
setExpander(0, g7); //set pin 0 to level of g7
}
}
int main() {
// startup
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
// set up USER pin as input
ANSELBbits.ANSB13 = 0;
TRISBbits.TRISB13 = 1;
INT4Rbits.INT4R = 0b0100;
// set up LED1 pin as a digital output
ANSELBbits.ANSB14 = 0;
TRISBbits.TRISB14 = 0;
//RPB14Rbits.RPB14R = 0b0001;
LATBbits.LATB14 = 1;
// set up LED2 as OC1 using Timer2 at 1kHz
ANSELBbits.ANSB15 = 0;
TRISBbits.TRISB15 = 0;
RPB15Rbits.RPB15R = 0b0101;
T2CONbits.T32 = 0;
T2CONbits.TCS = 0;
T2CONbits.TGATE = 0;
T2CONbits.TCKPS = 0b100;
PR2 = 4999;
TMR2 = 0;
T2CONbits.ON = 1;
OC1CONbits.OCM = 0b110;
OC1RS = 2500; // 50% duty cycle
OC1R = 2500;
OC1CONbits.ON = 1;
// set up A0 as AN0
ANSELAbits.ANSA0 = 1;
AD1CON3bits.ADCS = 3;
AD1CHSbits.CH0SA = 0;
AD1CON1bits.ADON = 1;
while (1) {
_CP0_SET_COUNT(0); // set core timer to 0, remember it counts at half the CPU clock
LATBINV = 0b100000000000000; // invert a pin
// wait for half a second, setting LED brightness to pot angle while waiting
while (_CP0_GET_COUNT() < 10000000) {
int val = readADC();
OC1RS = val*(5000/1024);
if (PORTBbits.RB13 == 1) {
// nothing
}
else {
LATBINV = 1<<14;
}
}
}
}
int main() {
// startup
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that
// kseg0 is cacheable (0x3) or uncacheable (0x2)
// see Chapter 2 "CPU for Devices with M4K Core"
// of the PIC32 reference manual
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// no cache on this chip!
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to be able to use TDI, TDO, TCK, TMS as digital
DDPCONbits.JTAGEN = 0;
__builtin_enable_interrupts();
// set up USER pin as input
ANSELBbits.ANSB13 = 0;
TRISBbits.TRISB13 = 1;
// set up LED1 pin as a digital output
TRISBbits.TRISB7 = 0;
LATBbits.LATB7 = 1;
// set up LED2 as OC1 using Timer2 at 1kHz
ANSELBbits.ANSB15 = 0;
RPB15Rbits.RPB15R = 0b0101;
// set up A0 as AN0
ANSELAbits.ANSA0 = 1;
AD1CON3bits.ADCS = 3;
AD1CHSbits.CH0SA = 0;
AD1CON1bits.ADON = 1;
//pwm
T2CONbits.TCKPS = 1; // Timer2 prescaler N=2
PR2 = 19999; // period = (PR2+1) * N * 25 ns => 1000 Hz
TMR2 = 0; // initial TMR4 count is 0
//OC1
OC1CONbits.OCM = 0b110; // PWM mode without fault pin; other OC1CON bits are defaults
OC1CONbits.OCTSEL = 0; // set timer select bit to 0 for using Timer2
OC1RS = 20000; // duty cycle = OC1RS/(PR3+1) = 75%
// OC1R = 19999; // initialize before turning OC1 on; afterward it is read-only
T2CONbits.ON = 1; //Turn Timer4 on
OC1CONbits.ON = 1; // turn on OC1
while (1) {
// invert pin every 0.5s, set PWM duty cycle % to the pot voltage output %
_CP0_SET_COUNT(0); // set core timer to 0, remember it counts at half the CPU clock
LATBINV = 0b10000000; // invert a pin
// wait for half a second, setting LED brightness to pot angle while waiting
while (_CP0_GET_COUNT() < 10000000) {
int val = readADC();
OC1RS = val * 20000/1023;
if (PORTBbits.RB13 == 1) {
// nothing
//EVERYTHING
} else {
LATBINV = 0b10000000;
}
}
}
}
void main() {
__builtin_disable_interrupts();
// set the CP0 CONFIG register to indicate that kseg0 is cacheable (0x3)
__builtin_mtc0(_CP0_CONFIG, _CP0_CONFIG_SELECT, 0xa4210583);
// 0 data RAM access wait states
BMXCONbits.BMXWSDRM = 0x0;
// enable multi vector interrupts
INTCONbits.MVEC = 0x1;
// disable JTAG to get pins back
DDPCONbits.JTAGEN = 0;
// do your TRIS and LAT commands here
TRISA = 0xFFCF;
TRISB = 0b0001111001110011;
i2c_master_setup();
ANSELBbits.ANSB2 = 0; //SDA2 set to digital
ANSELBbits.ANSB3 = 0; //SCL2 set to digital
__builtin_enable_interrupts();
// SYSTEMConfigPerformance(48000000);
SPI1_init();
LCD_init();
LCD_clearScreen(0);
// RPB13Rbits.RPB13R = 0b0011; //SDO
// SDI1Rbits.SDI1R = 0b0000; //A1
RPB7Rbits.RPB7R = 0b0101; //OC1
RPB8Rbits.RPB8R = 0b0101; //OC2
PORTAbits.RA4 = 1; //led init
T2CONbits.TCKPS = 2; //timer 2 prescale = 1:4
PR2 = 1999; //period = (PR2+1) * N * 12.5 ns = 100 us, 10 kHz
TMR2 = 0;
OC1RS = 1000;
OC1R = 1000;
OC2RS = 1000;
OC2R = 1000;
OC1CONbits.OCTSEL = 0; //select timer2
OC2CONbits.OCTSEL = 0;
OC1CONbits.OCM = 0b110; //set pwm mode
OC2CONbits.OCM = 0b110;
T2CONbits.ON = 1;
OC1CONbits.ON = 1;
OC2CONbits.ON = 1;
unsigned char x = 0; //sine counter
unsigned char y = 0; //triangle counter
char pressed = 0; //for tracking button logic
char counter = 0;
char m = 100; //(triangle wave frequency is 1000/2m)
unsigned char voltage = 0;
unsigned char channel = 0;
int bytes = 14;
unsigned char i2cdata[bytes];
unsigned char i2cdatatest;
unsigned char i2cwhoami;
short temp = 0;
short accel_x = 0;
short accel_y = 0;
short accel_z = 0;
short gyro_x = 0;
short gyro_y = 0;
short gyro_z = 0;
char i2cdatacount = 0;
char textbuffer[20];
char length = 0;
i2cwhoami = i2c_master_read(GYRO,WHOAMI,0,0);
i2c_master_write(GYRO,CTRL1_XL,0b10000000,0);
i2c_master_write(GYRO,CTRL2_G,0b10000000,0);
i2c_master_write(GYRO,CTRL3_C,0b00000100);
//i2cdatatest = i2c_master_read(GYRO,CTRL1_XL,0,0);
// i2c_master_write(GYRO,CTRL1_XL,0b10000000,1);
// i2c_master_send(0b10000000);
// i2c_master_send(0b00000100);
// i2c_master_stop();
CS = 1;
int leet = 1337;
sprintf(textbuffer,"Hello world %d!",leet);
char text[2] = {'H','6'};
//int text[5] = {40,30,50,30,20};
LCD_clearScreen(0);
while(1) {
length = sizeof(textbuffer);//size must be taken here otherwise pointer size is taken instead of
LCD_type(28,32,textbuffer,length,0b1111100000000000);
//LCD_char(28,32,30,0b1111100000000000);
i2c_master_multiread(GYRO,OUT_TEMP_L,bytes,i2cdata);
// //i2cdatatest = i2c_master_read(GYRO,0x28,0,0);
temp = i2cdata[1];
temp = (temp<<8)|i2cdata[0];
temp = (unsigned short)temp;
gyro_x = i2cdata[3];
gyro_x = (gyro_x<<8)|i2cdata[2];
gyro_x = (unsigned short)gyro_x;
gyro_y = i2cdata[5];
gyro_y = (gyro_y<<8)|i2cdata[4];
gyro_y = (unsigned short)gyro_y;
gyro_z = i2cdata[7];
gyro_z = (gyro_z<<8)|i2cdata[6];
gyro_z = (unsigned short)gyro_z;
accel_x = i2cdata[9];
accel_x = (i2cdata[9]<<8)|i2cdata[8];
accel_x = (unsigned short)accel_x;
accel_y = i2cdata[11];
accel_y = (i2cdata[11]<<8)|i2cdata[10];
accel_y = (unsigned short)accel_y;
accel_z = i2cdata[13];
accel_z = (accel_z<<8)|i2cdata[12];
accel_z = (unsigned short)accel_z;
OC1RS = floor((accel_x/16.768));
OC2RS = floor((accel_y/16.768));
if(OC1RS>2999){
OC1RS = 2000;
}
else if(OC1RS<1000){
OC1RS = 0;
}
else{
OC1RS = OC1RS - 1000;
}
if(OC2RS>2999){
OC2RS = 2000;
}
else if(OC2RS<1000){
OC2RS = 0;
}
else{
OC2RS = OC2RS - 1000;
}
// OC1R = floor((gyro_x/3.2768 + 10000));
// OC2R = floor((gyro_y/3.2768 + 10000));
//-------------SPI debugging for IMU------------------
// if (!PORTBbits.RB4){
// CS = 0;
// channel = counter;
// //voltage = floor(100*sin((x*2*pi)/100)+100);
// voltage = i2cwhoami;
// //char voltage = 0b10101001;
// spi1_set(channel,voltage);
// //delay(6000);
// CS = 1;
// }
// else {
// CS = 0;
// channel = counter;
// //voltage = floor(100*sin((x*2*pi)/100)+100);
// voltage = i2cdata[0];
// //char voltage = 0b10101001;
// spi1_set(channel,voltage);
// //delay(6000);
// CS = 1;
// //++i2cdatacount %14;
// }
//-------------------------------------------------------
delay(960000);
}
}