__asm void testOB(void) { //R12 will hold the pointer to the outputBase integer //During init, R11 holds the pointer to the outputArray which will be loaded into outputBase //Initialize push {r11, r12};Hierdie is nie nodig tydens init want ons sal later r11 en r12 se regte waardes inisialiseer ldr r12, =__cpp(&outputBase) ldr r11, =__cpp(&colOutput) str r11, [r12] pop {r11, r12} //Init done: the int outputBase now contains the start address to the output grid //To write to the output grid (value in r4 to be stored in output array): push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] strb r4, [r11] pop {r11, r12} //To increment the base value from where we will be operating: //r12 will hold the address of outputBase integer //r11 will hold the address of the outputgrid, which is the value inside outputBase integer push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] add r11, #100;r11 now holds value 100 places further that base address str r11, [r12] pop {r11, r12} }
__asm void os_sys_run (FUNCP func) { /* Run the function with parameters pushed on the stack. */ MOV R12,R0 ; func LDR R3,=__cpp(&sys_stktop) ; get SYS stack pointer LDR R3,[R3] SUBS R3,#12 ; get pushed parameters LDMIA R3!,{R0-R2}
__ASM void PendSV_Handler(void) { CPSID I; LDR R0, = __cpp(&Nano_TaskControlBlockCurrent); LDR R0,[R0]; //Get PSP Pointer LDR R1,[R0]; //Get the PSP MRS R3,MSP; MRS R2,PSP; MSR MSP,R2; //Switch psp to msp PUSH {R4-R11}; MRS R2,MSP; STR R2,[R0]; //Save the new stack LDR R0, = __cpp(&Nano_TaskControlBlockNext); LDR R0,[R0]; //Get PSP Pointer LDR R1,[R0]; //Get the PSP MSR MSP,R1; POP {R4-R11}; MRS R1,MSP; MSR PSP,R1; //Switch psp to msp MSR MSP,R3; LDR R0, = __cpp(&Nano_TaskControlBlockCurrent); LDR R1, = __cpp(&Nano_TaskControlBlockNext); LDR R1,[R1]; STR R1,[R0]; CPSIE I; BX LR; }
__ASM u32 GetBreakAddr(void) { nop mov r0,sp ;取SP指针地址 ldr r1,=__cpp(&InputSP) ;获取全局变量InputSP地址 ldr r1,[r1,#0] ;获取地址内数据 subs r0,r1,r0 ;当前SP地址减去起始SP地址 cmp r0,#8 ;检测是否中途恢复 beq n ;如果为中途恢复取消R0-8 subs r0,#8 ;R0-8修正返回地址 n mov r1,sp ;重新获取SP指针地址 adds r1,r0,r1 ;加上偏移量 pop {r0} ;R4出栈 pop {r0} ;函数返回地址出栈 mov sp,r1 ;设置SP地址 bx lr ;函数返回 }
return; } // ------------------------------------------------------------------------- /*! \brief Report HardFault when things goes wrong \note No need to disable interrupts since the fault handler is the second most important interrupt. */ __asm void HardFault_Handler(void) { TST LR, #4 ITE EQ MRSEQ R0, MSP MRSNE R0, PSP B __cpp(HardFault_Handler_C) } /*! \brief C part of the handler Printing process ID, processes stacks and stacked PC \param svc_args Stack */ void HardFault_Handler_C(unsigned int * svc_args) { //TWP: the macro should never be true ... major design revisions have made some code no longer valid #if ((ENABLE_KERNEL_PRINTF) && (ENABLE_KERNEL_PRINTF == 1)) uint32_t i;
__asm void firRow(void) { //Initialize ;load output array address in memory ldr r12, =__cpp(&outputBase) ldr r11, =__cpp(&rowOutput) str r11, [r12] ;init counters mov r1, #0; column counter mov r0, #0; row counter ;Load gain values ldr r12, =__cpp(&tap) ldr r11, [r12] ldr r10, [r12,#4] ldr r9, [r12,#8] ldr r8, [r12,#12] ldr r7, [r12,#16] ldr r12, =__cpp(&grid); pointer to grid start address //Outer Loop newRow //Reset column counter mov r1, #0; //Check whether last row has been reached cmp r0, #100; beq rgridDone; //Inner Loop colStart //Check whether last column has been reached cmp r1, #100; beq rowDone; //Load row values cmp r1, #0; special load operation at start of row beq rcounter0 ; cmp r1, #1; special load operation at start of row beq rcounter1 ; cmp r1, #2; special load operation at start of row beq rcounter2 ; cmp r1, #3; special load operation at start of row beq rcounter3 ; b rnormalLoad ;normal load operation rcounter0 mov r2, #0 mov r3, #0 mov r4, #0 mov r5, #0 ldrb r6, [r12];load leading value b rnext ; rcounter1 mov r2, #0 mov r3, #0 mov r4, #0 ldrb r5, [r12]; ldrb r6, [r12,#1]; b rnext ; rcounter2 mov r2, #0 mov r3, #0 ldrb r4, [r12] ldrb r5, [r12,#1] ldrb r6, [r12,#2] b rnext ; rcounter3 mov r2, #0 ldrb r3, [r12] ldrb r4, [r12,#1] ldrb r5, [r12,#2] ldrb r6, [r12,#3] b rnext ; rnormalLoad sub r1, #4; To reach first address, as R1 points to leading address ldrb r2, [r12, r1]; add r1, #1; ldrb r3, [r12, r1]; add r1, #1; ldrb r4, [r12, r1]; add r1, #1; ldrb r5, [r12, r1]; add r1, #1; ldrb r6, [r12, r1]; rnext //Do multiplication mul r6, r11; mul r5, r10; mul r4, r9; mul r3, r8 mul r2, r7 //add all taps add r2, r3 add r2, r4 add r2, r5; add r2, r6; //move result to memory push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] strb r2, [r11, r1] pop {r11, r12} //loop with counter r1 add r1, #1; b colStart rowDone add r0, #1; increase row counter add r12, #100; shift r12 to beginning of next row ;shift pointer to output grid with 100 push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] add r11, #100;r11 now holds value 100 places further that base address str r11, [r12] pop {r11, r12} b newRow rgridDone bx lr; }
__asm void firColumn(void) { //Initialize ;init the output array base value to memory ldr r12, =__cpp(&outputBase) ldr r11, =__cpp(&colOutput) str r11, [r12] ;init counters mov r1, #0; column counter mov r0, #0; row counter ;Load gain values ldr r12, =__cpp(&tap); ldr r11, [r12]; ldr r10, [r12,#4]; ldr r9, [r12,#8]; ldr r8, [r12,#12] ldr r7, [r12,#16] ldr r12, =__cpp(&grid); pointer to grid start address //Outer loop newColumn //Reset row counter mov r0, #0; //Inner Loop rowLoop //Load column values cmp r0, #0; //special load operation at start of column beq ccounter0 ; cmp r0, #1; //special load operation at start of column beq ccounter1 ; cmp r0, #2; //special load operation at start of column beq ccounter2 ; cmp r0, #3; //special load operation at start of column beq ccounter3 ; b cnormalLoad ; ccounter0 mov r2, #0 mov r3, #0 mov r4, #0; mov r5, #0; ldrb r6, [r12]; b cnext ; ccounter1 mov r2, #0 mov r3, #0 mov r4, #0; sub r12, #100 ldrb r5, [r12]; add r12, #100 ldrb r6, [r12]; b cnext ; ccounter2 mov r2, #0 mov r3, #0 sub r12, #200 ldrb r4, [r12] add r12, #100 ldrb r5, [r12] add r12, #100 ldrb r6, [r12]; b cnext ; ccounter3 mov r2, #0 sub r12, #300 ldrb r3, [r12] add r12, #100 ldrb r4, [r12] add r12, #100 ldrb r5, [r12] add r12, #100 ldrb r6, [r12]; b cnext ; cnormalLoad //normal load operation sub r12, #400; To reach first address, as r12 points to leading address ldrb r2, [r12] add r12, #100 ldrb r3, [r12] add r12, #100 ldrb r4, [r12] add r12, #100 ldrb r5, [r12] add r12, #100 ldrb r6, [r12] cnext //Do multiplication mul r6, r11 mul r5, r10 mul r4, r9 mul r3, r8 mul r2, r7 //add all taps add r2, r3 add r2, r4 add r2, r5 add r2, r6 //move result to memory push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] strb r2, [r11] pop {r11, r12} //increase column counter and base addresses add r0, #1 add r12, #100 ;increase base address of output grid push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] add r11, #100;r11 now holds value 100 places further that base address str r11, [r12] pop {r11, r12} //Check whether last row has been reached cmp r0, #100; beq colDone; b rowLoop colDone add r1, #1; increase row counter //Check whether last column has been reached cmp r1, #100; beq cgridDone; //restore r12 to base of column sub r12, #4000 sub r12, #4000 sub r12, #2000 add r12, #1; shift r12 to base of next column //restore r11 to base of column push {r11, r12} ldr r12, =__cpp(&outputBase) ldr r11, [r12] sub r11, #4000 sub r11, #4000 sub r11, #2000 add r11, #1; shift r11 to beginning of next column str r11, [r12]; store r11 to memory pop {r11, r12} b newColumn cgridDone bx lr; }
EXPORT __cy_memory_2_start EXPORT __cy_memory_2_length EXPORT __cy_memory_2_row_size /* XIP */ EXPORT __cy_memory_3_start EXPORT __cy_memory_3_length EXPORT __cy_memory_3_row_size /* eFuse */ EXPORT __cy_memory_4_start EXPORT __cy_memory_4_length EXPORT __cy_memory_4_row_size /* Flash */ __cy_memory_0_start EQU __cpp(CY_FLASH_BASE) __cy_memory_0_length EQU __cpp(CY_FLASH_SIZE) __cy_memory_0_row_size EQU 0x200 /* Flash region for EEPROM emulation */ __cy_memory_1_start EQU __cpp(CY_EM_EEPROM_BASE) __cy_memory_1_length EQU __cpp(CY_EM_EEPROM_SIZE) __cy_memory_1_row_size EQU 0x200 /* Supervisory Flash */ __cy_memory_2_start EQU __cpp(CY_SFLASH_BASE) __cy_memory_2_length EQU __cpp(CY_SFLASH_SIZE) __cy_memory_2_row_size EQU 0x200 /* XIP */ __cy_memory_3_start EQU __cpp(CY_XIP_BASE)
} if ((CFSRValue & SCB_CFSR_MMARVALID) != 0) { sprintf(str,"Memory Manage Address Register address valid flag\nMMFAR value = 0x%.8X\n", SCB->MMFAR); printErrorMsg(str); } } #if defined(__CC_ARM) __asm void HardFault_Handler(void) { TST lr, #4 ITE EQ MRSEQ r0, MSP MRSNE r0, PSP B __cpp(Hard_Fault_Handler) } #elif defined(__ICCARM__) void HardFault_Handler(void) { __asm("TST lr, #4"); __asm("ITE EQ"); __asm("MRSEQ r0, MSP"); __asm("MRSNE r0, PSP"); __asm("B Hard_Fault_Handler"); } #else #warning Not supported compiler type #endif enum { r0, r1, r2, r3, r12, lr, pc, psr};