static void gpio_init(void) { /* * Initialize SDRAM pins */ #if CONFIG_NR_DRAM_BANKS == 2 /* Use Two Banks: DCS0 and DCS1 */ __gpio_as_sdram_x2_32bit(); #else __gpio_as_sdram_32bit(); #endif /* * Initialize UART3 pins */ switch (CFG_UART_BASE) { case UART0_BASE: __gpio_as_uart0(); break; case UART1_BASE: __gpio_as_uart1(); break; case UART2_BASE: __gpio_as_uart2(); break; case UART3_BASE: __gpio_as_uart3(); break; } }
static void gpio_init(void) { /* * Initialize SDRAM pins */ #if CONFIG_NR_DRAM_BANKS == 2 /*Use Two Banks SDRAM*/ __gpio_as_sdram_x2_32bit(); #else __gpio_as_sdram_32bit(); #endif #ifdef CONFIG_MSC_U_BOOT if(CFG_NAND_IS_SHARE) REG_EMC_BCR &= ~EMC_BCR_BSR_UNSHARE; else REG_EMC_BCR |= EMC_BCR_BSR_UNSHARE; __gpio_as_nand_8bit(1); #endif /* * Initialize lcd pins */ __gpio_as_lcd_18bit(); /* * Initialize UART pins */ __gpio_as_uart3(); }
static void gpio_init(void) { /* * Initialize SDRAM pins */ #if CONFIG_NR_DRAM_BANKS == 2 /*Use Two Banks SDRAM*/ __gpio_as_sdram_x2_32bit(); #else __gpio_as_sdram_32bit(); #endif /* * Initialize UART1 pins */ __gpio_as_uart1(); }